Why 16-bit address with 12-bit offset results in 4KB page size? - memory-management

I'm reading the "Modern Operating System" book. And I'm confused about the "Page Size".
In the book, the author says,
The incoming 16-bit virtual address is
split into a 4-bit page number and
12-bit offset. With 4 bits for the
page number, we can have 16 pages, and
with 12 bits for the offset, we can
address all 4096 bytes within a
page.
Why 4096 bytes? With 12 bits, we can address 4096 entries within a page, correct. But, one entry is an address (in this case, address size = 16 bits). So I think we can address 4096(entry) * 16(bit) = 4096(entry) * 2(byte) = 8KB, but why the book says that we can address 4096 (bytes) ?
Thanks in advance! :)

This is assuming byte-addressed memory (which almost every machine made in the past 30 years uses), so each address refers to a byte, not an entry or address or any other larger value. To hold a 16-bit value, you'll need two consecutive addresses (two bytes).
More than 30 years ago, there used to be machines which were word addressed, which worked like you surmise. But such machines had a tough time dealing with byte-oriented data (such as ASCII characters), and so have fallen out of favor. Nowadays, things like byte addressability, 8-bit bytes and twos-complement integers are pretty much just assumed.

The 12 bits are an offset within a page. The offset is in bytes, not addresses. 2^12 is 4096.

Because with 12 bit, we can address 2^12=4096 slots. Each slot represents an address which size is 1 byte in byte-addressable memory. Hence the total size is 4096*1=4096 bytes = 4KB.

What you are calculating is the page size, i.e. the size of a page in the page table in the memory. As we use 12 bits for the offset, each frame in the physical memory is 2^12=4096K. However, each page in the page table occupies 2^12 entries x 2 bytes = 8K in the memory.

okay so you have 16 bit virtual address let see what does it mean .It means you have 2**16 =65536 bytes.
4 bit page number that means there are 16 pages as 2^4=16
Now You Name The Pages As page1,page2...page16.
Now We are left with 12bits let us see how many address can 12 bits represent 2**12=4096 bytes
65536 bytes could also be achieved by dividing it into 16 pages containing 4096 bytes each as 4096*16=65536

Related

How to calculate number of virtual pages

virtual adress size: 32 bits
page size = 4K =2^12 bytes
what is the number of pages?
i know the answer is (2^32)/(2^12) = 2^20 but why?
i think it should be (2^32)/(2^15) because of the byte bit conversion (2^12)*(8)=2^15
Every byte in memory has a numeric address starting from 0. The CPU has one or more registers which hold the address of that one byte which is being worked upon. A register is a physical device and has limits to how large a number it can store.
virtual address size: 32 bits
This means the address register can store one address (number) which could be anything between 0 and 2^32 -1.
As the largest address that the address register can store is 2^32 -1 there is no point in having more memory bytes. Because the CPU will never be able to work with them. So in general we assume the total memory to be 2^32 bytes.
page size = 4K =2^12 bytes
The total memory of millions of bytes is actually organized in chunks called pages. Here total memory of 2^32 bytes is chunked into pages of 2^12 bytes.
what is the number of pages?
the answer is (2^32)/(2^12) = 2^20. Good job!
but why? i think it should be (2^32)/(2^15) because of the byte bit conversion (2^12)*(8)=2^15
Here 2^32 is the total number of bytes in memory. 2^12 is total number of bytes in a page. Both numerator and denominator should be in same units - bytes. So you need not convert the denominator to bits.
Note:
I have used over simplification of terms like memory, address, register etc. Many of the statements made above are not valid for a real laptop - but useful for initial learning.

Calculating the memory address sizes for paging and offset and page table size.

This question is mostly just to clarify my understanding.
Say I have a 32-bit Computer, with virtual memory space of 2^32 bytes.
Memory paging is used, each page is 2^8 bytes.
So the memory address sizes are 24 bits. Since (2^32/2^8 = 2^24 bytes).
And the offset would be 8 bits? This I do not quite understand. Since I know that the total address is 32, and 24 is already taken by the pages, so the remainder is the offset of 8.
Lastly for the page size. If each physical memory address is stored in 32 bits (4 bytes), the table size would be 2^26 (2^24 * 2^2). Is this correct?
Page Table size = number of entries*size of entry
In your case, each page is 2^8 bytes, that is - you need 8 bits offset. You got that one right.
This leaves us with 24 bits for Page. 2^24 different pages.
Size of page-table for process X is: 2^24*Entry-Size. which is not provided by you here.
Lets assume it needs 32 bits per entry. Then, 2^24*32 = 2^24*2^5 = 2^29 bits.

Addressing Size Regarding Bytes

Just to make sure, does every single address contain one byte? So say you had theoretical addresses FFF0 and FFFF: there are 16 values between these two addresses, which means between them they contain 16 bytes, or 8 x 16 bits? Every individual address is linked to a single byte?
Just to make sure, does every single address contain one byte?
...which means between them they contain 16 bytes, or 8 x 16 bits?
Every individual address is linked to a single byte?
Yes to all three questions.
Which is why the limitation with 32-bit addressing, you can only access 2^32 bytes == 4,294,967,296 bytes == 4 GiB. Each addressable memory location gives access to 1 byte.
If we could access 2 bytes with one address, then that limit would have been 8 GiB. And the architecture of modern chips and all software would have to be modified to determine whether they want both bytes or just the first or the second. So you'd need, say, 1 more bit to determine that. Guess what, if you had 33-bit machines, that's what we'd get...max address-able space of 8 GiB. Which is still effectively 1-byte-containing addresses. Workarounds do exist but that's not related to your questions.
* GiB = Binary GigaBytes.
Note that this is not related to "types" where a char is 1 byte and an int is 4 bytes. Programming languages compensate for that when trying to access the value of a stored variable/data stored at a location(s). And they are actually calculated as total bits rather than total bytes. So an int is considered as 32 bits rather than 4 bytes. When C fetches an int's value from memory, it will fetch all 4 bytes even though the address of the int refers to just one, the address of the first byte.
Yes. Addresses map to bytes 1 to 1, even if they expect you to work with a word size of two or four bytes at a time.

Operating System Logical and Physical Address Mapping

Question is here:
Consider a logical-address space of 32 pages with page size 512 words,
mapped onto a physical memory of 128 frames.
I want to know if my attempting calculation below is correct:
so far I have come the:
**
32 pages = 2^5 bits
512 words = 2^9 bits
128 frames = 2^7 bits
**
How to calculate the logical address and physical address if i do not know the word size?
Word size depends on the computer architecture. Generally for a 32 bit CPU the word size is 32 bits(4 bytes) and for 64 bit CPU, it is 64 bits(8 bytes).
* Logical address will be generated by the CPU for a particular proceess, you don't need to calculate anything. As the CPU generates the logical address it will be mapped to physical address by Page Map Table or a fast Cache in Memory management unit(MMU).
* With respect to the details given above, your CPU generates the logical address of 14 bits, so it can address (2^14 words in memory). Assuming your processor is 32 bit, then it can access 2^16 bytes.
* Given the logical address of 14 bits, it looks in the page map table by using the first 9 bits for page. Then it finds the address where the page is actually located in the physical memory and it adds the offset to the physical address to find memory location in the Main memory.

I don't understand something in memory addressing

I have a very simple (n00b) question.
A 20-bit external address bus gave a 1 MB physical address space (2^20
= 1,048,576).(Wikipedia)
Why 1 MByte?
2^20 = 1,048,576 bit = 1Mbit = 128KByte not 1MB
I misunderstood something.
When you have 20 bits you can address up to 2^20. This is your range, not the number of bits.
I.e. if you have 8 bits your range is up to 255 (unsigned) not 2^8 bits.
So with 20 bits you can address up to 2^20 bytes i.e. 1MB
I.e. with 20 bits you can represent addresses from 0 up to 2^20 = 1,048,576. I.e. you can reference up to 1MB of memory.
1 << 20 addresses, that is 1,048,576 bytes addressable. Hence, 1 MB physical address space.
Because the smallest addressable unit of memory (in general - some architectures have small bit-addressable pieces of memory) is the byte, not the bit. That is, each address refers to a byte, rather than to a bit.
Why, you ask? Direct access to individual bits is almost never needed - and if you need it, you can still load the surrounding byte and get the bit with bit masks and shifts. Increasing the bits per address allows you to address more memory with the same address range.
Note that a byte doesn't have to be 8 bit, strictly speaking, though it's ubiquitous by now. But regardless of the byte size, you're grouping bits together to be able to handle larger quantities of them.

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