I have just started writing a character driver.So, i when inserted my first driver code that prints "hello kernel" from init_module1 and "Bye kernel" from exit module in kernel log. When i insert the driver and use dmesg to see kernel log i cant find the "Hello kernel" message but when i remove the driver(using rmmod) i get both "Hello kernel" as well as "Bye kernel" in the log.
Cant figure out how & why. This is my code...
header.h
#include<linux/init.h>
#include<linux/module.h>
MODULE_LICENSE("GPL");
init.c
#include"header.h"
static int init_module1(void)
{
printk(KERN_ALERT "Hello kernel");
return 0;
}
module_init(init_module1);
exit.c
#include"header.h"
static void exit_module(void)
{
printk(KERN_ALERT "Bye Kernel");
}
module_exit(exit_module);
Makefile-
INSTALLDIR= $(shell pwd)/modules
ifneq ($(KERNELRELEASE),)
obj-m := c.o
c-objs := init.o exit.o
else
KERNDIR ?= /lib/modules/$(shell uname -r)/build
PWD := $(shell pwd)
default:
$(MAKE) -C $(KERNDIR) M=$(PWD) modules
#rm -rf $(INSTALLDIR)
#mkdir $(INSTALLDIR)
#mv *.ko *.mod.c *.o .*.cmd $(INSTALLDIR)
clean:
rm -rf $(INSTALLDIR)
endif
The kernel log handles only complete lines.
Add the missing new line character:
printk(KERN_ALERT "Hello kernel\n");
Related
After Installng Omnetpp 5.5.1 in Ubuntu 18.04 ,For any folder in Omnetpp, make command is not making any sense.
As it showing the following message:
make: Nothing to be done for 'all'.
Even suggested methods on Internet are not working in my case.Please help.
My makefile is following for Aloha Folder.
#
# OMNeT++/OMNEST Makefile for aloha
#
# This file was generated with the command:
# opp_makemake -f --deep
#
# Name of target to be created (-o option)
TARGET = aloha$(D)$(EXE_SUFFIX)
TARGET_DIR = .
# User interface (uncomment one) (-u option)
USERIF_LIBS = $(ALL_ENV_LIBS) # that is, $(TKENV_LIBS) $(QTENV_LIBS) $(CMDENV_LIBS)
#USERIF_LIBS = $(CMDENV_LIBS)
#USERIF_LIBS = $(TKENV_LIBS)
#USERIF_LIBS = $(QTENV_LIBS)
# C++ include paths (with -I)
INCLUDE_PATH =
# Additional object and library files to link with
EXTRA_OBJS =
# Additional libraries (-L, -l options)
LIBS =
# Output directory
PROJECT_OUTPUT_DIR = out
PROJECTRELATIVE_PATH =
O = $(PROJECT_OUTPUT_DIR)/$(CONFIGNAME)/$(PROJECTRELATIVE_PATH)
# Object files for local .cc, .msg and .sm files
OBJS = $O/Host.o $O/Server.o
# Message files
MSGFILES =
# SM files
SMFILES =
#------------------------------------------------------------------------------
# Pull in OMNeT++ configuration (Makefile.inc)
ifneq ("$(OMNETPP_CONFIGFILE)","")
CONFIGFILE = $(OMNETPP_CONFIGFILE)
else
ifneq ("$(OMNETPP_ROOT)","")
CONFIGFILE = $(OMNETPP_ROOT)/Makefile.inc
else
CONFIGFILE = $(shell opp_configfilepath)
endif
endif
ifeq ("$(wildcard $(CONFIGFILE))","")
$(error Config file '$(CONFIGFILE)' does not exist -- add the OMNeT++ bin directory to the path so that opp_configfilepath can be found, or set the OMNETPP_CONFIGFILE variable to point to Makefile.inc)
endif
include $(CONFIGFILE)
# Simulation kernel and user interface libraries
OMNETPP_LIBS = $(OPPMAIN_LIB) $(USERIF_LIBS) $(KERNEL_LIBS) $(SYS_LIBS)
COPTS = $(CFLAGS) $(IMPORT_DEFINES) $(INCLUDE_PATH) -I$(OMNETPP_INCL_DIR)
MSGCOPTS = $(INCLUDE_PATH)
SMCOPTS =
# we want to recompile everything if COPTS changes,
# so we store COPTS into $COPTS_FILE and have object
# files depend on it (except when "make depend" was called)
COPTS_FILE = $O/.last-copts
ifneq ("$(COPTS)","$(shell cat $(COPTS_FILE) 2>/dev/null || echo '')")
$(shell $(MKPATH) "$O" && echo "$(COPTS)" >$(COPTS_FILE))
endif
#------------------------------------------------------------------------------
# User-supplied makefile fragment(s)
# >>>
# <<<
#------------------------------------------------------------------------------
# Main target
all: $(TARGET_DIR)/$(TARGET)
$(TARGET_DIR)/% :: $O/%
#mkdir -p $(TARGET_DIR)
$(Q)$(LN) $< $#
ifeq ($(TOOLCHAIN_NAME),clangc2)
$(Q)-$(LN) $(<:%.dll=%.lib) $(#:%.dll=%.lib)
endif
$O/$(TARGET): $(OBJS) $(wildcard $(EXTRA_OBJS)) Makefile $(CONFIGFILE)
#$(MKPATH) $O
#echo Creating executable: $#
$(Q)$(CXX) $(LDFLAGS) -o $O/$(TARGET) $(OBJS) $(EXTRA_OBJS) $(AS_NEEDED_OFF) $(WHOLE_ARCHIVE_ON) $(LIBS) $(WHOLE_ARCHIVE_OFF) $(OMNETPP_LIBS)
.PHONY: all clean cleanall depend msgheaders smheaders
.SUFFIXES: .cc
$O/%.o: %.cc $(COPTS_FILE) | msgheaders smheaders
#$(MKPATH) $(dir $#)
$(qecho) "$<"
$(Q)$(CXX) -c $(CXXFLAGS) $(COPTS) -o $# $<
%_m.cc %_m.h: %.msg
$(qecho) MSGC: $<
$(Q)$(MSGC) -s _m.cc -MD -MP -MF $O/$(basename $<)_m.h.d $(MSGCOPTS) $?
%_sm.cc %_sm.h: %.sm
$(qecho) SMC: $<
$(Q)$(SMC) -c++ -suffix cc $(SMCOPTS) $?
msgheaders: $(MSGFILES:.msg=_m.h)
smheaders: $(SMFILES:.sm=_sm.h)
clean:
$(qecho) Cleaning $(TARGET)
$(Q)-rm -rf $O
$(Q)-rm -f $(TARGET_DIR)/$(TARGET)
$(Q)-rm -f $(TARGET_DIR)/$(TARGET:%.dll=%.lib)
$(Q)-rm -f $(call opp_rwildcard, . , *_m.cc *_m.h *_sm.cc *_sm.h)
cleanall:
$(Q)$(MAKE) -s clean MODE=release
$(Q)$(MAKE) -s clean MODE=debug
$(Q)-rm -rf $(PROJECT_OUTPUT_DIR)
# include all dependencies
-include $(OBJS:%=%.d) $(MSGFILES:%.msg=$O/%_m.h.d)
This aforementioned file is missing some information like c++ INCLUDE_PATH and EXTRA_OBJS and LIBS.Is this the reason for not being run?Please Help.
The makefile says that 'Nothing to be done' because the executable is present and up to date, so it is indeed nothing to be done. This is not an error.
As you have indicated, you can execute ./aloha and then that throws a runtime error. This is NOT related to the build process.
I'm trying to create a Makefile where make only recompiles necessary .cpp files.
By default, it works well if I edit .cpp, however, when I edit .h files, it just ignores the changes.
So I've read of -MD flag and its friend -MP (used to avoid bugs when typing make).
However, I can't seem to make it working, if I use -MMD, it works perfectly but I rely on system includes too as I'm writing a library too that is evolving along with the project. Thus, if I update the libary header and reinstall the library, typing make in the main project should recompiles files that includes the changed header.
When using -MMD flag, it - as expected - does not recompile the project, however, using -MD flag, it does recompile everything. In fact, -MD recompiles everything every time, even when nothing changed.
Here is a minimal project structure that reproduce the issue:
./Makefile:
all: build
re: clean build
build: build_lib install_lib build_client
build_lib:
$(MAKE) -C lib
$(MAKE) install -C lib
build_client:
$(MAKE) -C client
install_lib:
$(MAKE) install -C lib
.PHONY: clean
clean: clean_lib clean_client
clean_lib:
$(MAKE) clean -C lib
clean_client:
$(MAKE) clean -C client
./client/Makefile:
CC = g++
INC = -I../lib
CXXFLAGS = -Wall $(INC) -g -MD -MP
EXEC_NAME = ../test
src = $(shell find $(SOURCEDIR) -name '*.cpp')
obj = $(src:.cpp=.o)
LIBRARIES = -ltest_lib
LDFLAGS = -rdynamic $(LIBRARIES)
all: $(EXEC_NAME)
re: clean $(EXEC_NAME)
$(EXEC_NAME): $(obj)
$(CC) -o $# $^ $(LDFLAGS)
-include $(obj:.o=.d)
.PHONY: clean
clean:
rm -f $(obj) $(EXEC_NAME)
./lib/Makefile:
.PHONY : clean
CXXFLAGS= -fPIC -g -Itest_lib/include -MMD -MP
LDFLAGS= -shared
SOURCES = $(shell find $(SOURCEDIR) -name '*.cpp')
HEADERS = $(shell find $(SOURCEDIR) -name '*.h')
OBJECTS=$(SOURCES:.cpp=.o)
TARGET=libtest_lib.so
INC_FOLDER=test_lib/include
CUR_DIR = $(shell pwd)
all: $(TARGET)
install:
sudo rm -rf /usr/local/lib/libtest_lib.so && sudo ln -s $(CUR_DIR)/$(TARGET) /usr/local/lib/libtest_lib.so
sudo rm -rf /usr/local/include/test_lib && sudo cp -r $(INC_FOLDER) /usr/local/include/test_lib
clean:
rm -f $(OBJECTS) $(TARGET)
$(TARGET) : $(OBJECTS)
$(CC) $(CFLAGS) $(OBJECTS) -o $# $(LDFLAGS)
-include $(OBJECTS:.o=.d)
./client/main.cpp:
#include "bar.h"
int main()
{
Bar b;
b.sayHello();
b.sayBye();
return 0;
}
./client/bar.h
#ifndef __BAR__
#define __BAR__
#include <test_lib/foo.h>
#include <iostream>
struct Bar : public Foo
{
Bar() {};
~Bar() {};
void sayBye() const {
std::cout << "Bye " << name << "..." << std::endl;
};
};
#endif
./lib/test_lib/include/foo.h
#ifndef __FOO__
#define __FOO__
struct Foo
{
const char *name;
Foo(const char *name = "world");
~Foo();
void sayHello() const;
};
#endif
./lib/test_lib/src
#include "foo.h"
#include <iostream>
Foo::Foo(const char *name) : name(name) {}
Foo::~Foo() {}
void Foo::sayHello() const
{
std::cout << "Hello " << name << " !" << std::endl;
}
Problem was that I copied the library headers all the time in /usr/local so the files got newer and the client make then thought every header of the library had changed.
A simple fix to this problem was to replace in the library Makefile the following line:
sudo rm -rf /usr/local/include/test_lib && sudo cp -r $(INC_FOLDER) /usr/local/include/test_lib
by
sudo rm -rf /usr/local/include/test_lib && sudo ln -s $(CUR_DIR)/$(INC_FOLDER) /usr/local/include/test_lib
On a side note, provided example is missing the removal of .d files on the clean rule.
I am trying to create a program in C++ that utilizes the rudeconfig library.
I run make, and get this:
g++ -o Homework5_executable helloworld.o -lrudeconfig -L/home/j/je/jea160530/hw5/libs
/bin/ld: cannot find -lrudeconfig
collect2: error: ld returned 1 exit status
make: *** [Homework5_executable] Error 1
I know this is happening because make is not recognizing the rudeconfig library, however I have followed the instructions on the rudeconfig site for install correctly.
Here is the code:
Makefile
#
# Set up info for C++ implicit rule
CXX = g++
CXXFLAGS = -Wall
CPPFLAGS = -I/home/012/j/je/jea160530/hw5/include
#
# Set up any Linker Flags
LDFLAGS = -L/home/012/j/je/jea160530/hw5/libs
#
# Set up libraries needer for compilation
LDLIBS = -lrudeconfig
#
# We choose the project name. This is used in building the file name for the backup target
PROJECTNAME = JesseAlotto_Homework5
#
# We choose the source files to include and name the output
SRCS = helloworld.cc
#
# We choose the name of the executable to be created
EXEC = Homework5_executable
#
# NORMALLY DON'T NEED TO CHANGE ANYTHING BELOW HERE
# =================================================
#
OBJS = $(SRCS:cc=o)
all: $(EXEC)
clean:
rm -f $(OBJS) *.d *~ \#* $(EXEC)
Makefile: $(SRCS:.cc=.d)
# Pattern for .d files.
# =====================
%.d:%.cc
#echo Updating .d Dependency File
#set -e; rm -f $#; \
$(CXX) -MM $(CPPFLAGS) $< > $#.$$$$; \
sed 's,\($*\)\.o[ :]*,\1.o $# : ,g' < $#.$$$$ > $#; \
rm -f $#.$$$$
# This is a rule to link the files. Pretty standard
# ================================================
$(EXEC): $(OBJS)
$(CXX) -o $(EXEC) $(OBJS) $(LDFLAGS) $(LDLIBS)
#echo Program compiled succesfully!
#
# Backup Target
# =============
backup: clean
#mkdir -p ~/backups; chmod 700 ~/backups
#$(eval CURDIRNAME := $(bash pwd))
#$(eval MKBKUPNAME := ~/backups/$(PROJECTNAME)-$(shell date +'%Y.%m.%d-%H:%M:%S').tar.gz)
#echo
#echo Writing Backup file to: $(MKBKUPNAME)
#echo
#tar -zcvf $(MKBKUPNAME) ./$(CURDIRNAME)
#chmod 600 $(MKBKUPNAME)
#echo
#echo Done!
#
# Include the dependency files
# ============================
-include $(SRCS:.cc=.d)
helloworld.cc
#include <string>
#include <iostream>
#include <fstream>
#include <tclap/CmdLine.h>
#include <map>
#include <stdlib.h>
#include <rude/config.h>
using namespace rude;
int main(int argc, char *argv[]){
std::string nextLine;
std::map<int, std::string> optionMap;
try{
std::cout << "hello world!";
//Command Line Variable
TCLAP::CmdLine cmd("CS3377.002 Program 5", ' ', "1.0");
//Switch Args
TCLAP::SwitchArg daemonSwitch("d", "daemon", "Run in daemon mode (forks to run as a daemon).", cmd, false);
//Unlabeled Value Args
TCLAP::UnlabeledValueArg<std::string> infileArg("infile", "The name of the configuration file. Defaults to cs3376dirmond.conf", true, "cs3376dirmond.conf", "config filename", false);
//Add leftover flags to cmdLine object
cmd.add(infileArg);
//Parse the command line
cmd.parse(argc, argv);
//Create an enumeratedlist for the mapping
enum flags {DAEMON, INFILE};
//Map keys and values to map
if (daemonSwitch.getValue()){
optionMap[DAEMON] = "1";
}
else{
optionMap[DAEMON] = "0";
}
optionMap[INFILE] = infileArg.getValue();
//Load input file
std::ifstream inputFile;
inputFile.open(optionMap[INFILE].c_str(), std::ios::in);
if(!inputFile){
std::cerr << "Error: no input file" << std::endl;
}
//============================================PARSE CONFIGURATION FILE==========================
Config config;
config.load("cs3376dirmond.conf");
//==============================================================================================
inputFile.close();
return 0;
} catch (TCLAP::ArgException &e) //catch any exceptions
{ std::cerr << "error: " << e.error() << " for arg " << e.argId() << std::endl;}
}
The error is caused by this command:
g++ -o Homework5_executable helloworld.o -lrudeconfig -L/home/j/je/jea160530/hw5/libs
not by make itself.
The error means that the linker isn’t finding librudeconfig.so in the library search path. From your comments, it turns out the library is named rudeconfig.so instead, so you need to specify
LDLIBS = -l:rudeconfig.so
instead of -lrudeconfig (which always expands to librudeconfig.so or librudeconfig.a).
Ideally, the library should be installed as librudeconfig.so...
---Full Makefile at the bottom ---
I'm currently finishing a project, so I'm coming to the packaging/compiling part.
I'm working with Make, and the specificity of my project is that it contains two projects with a main() in each of them.
I want a binary of the first project (named 'shell') and a binary of the second one (named 'ls'). I've edited the Makefile to separate targets, sources files, etc. Here are the important lines:
-- Projects --
TARGET_SHELL = shell
TARGET_LS = ls
-- Directories --
SOURCE = ./src
BIN = ./bin
DIRLIST = ${SOURCE} ${BIN}
-- Targets --
BINSHELL = ${TARGET_SHELL:%=${BIN}/%}
BINLS = ${TARGET_LS:%=${BIN}/%}
-- Files --
SRC_SHELL = ${wildcard ${SOURCE}/execution.c ${SOURCE}/shell.c}
SRC_LS = ${wildcard ${SOURCE}/commande_ls.c}
INT_SHELL = ${wildcard ${SOURCE}/execution.h}
INT_LS = ${wildcard ${SOURCE}/commande_ls.h}
OBJ_SHELL = ${SRC_SHELL:%.c=%.o}
OBJ_LS = ${SRC_LS:%.c=%.o}
-- Rules --
all : ${BINSHELL} ${BINLS}
-- Binaries --
${BIN}/${TARGET_SHELL} : ${${TARGET_SHELL}:%=${SOURCE}/%}
${BIN}/${TARGET_LS} : ${${TARGET_LS}:%=${SOURCE}/%}
${BIN}/% : $(OBJ_SHELL)
#echo
#echo Linking bytecode : $#
#echo ----------------
#echo
${CC} -o $# $^ ${LDFLAGS}
#echo
#echo Done
#echo
The 'make' command works perfectly. At the end, I have two binaries, one named 'shell' and the other one named 'ls'. Nice!
But in fact, the two binaries are exactly the same, they both execute the 'shell' project. I wanted the binary 'shell' to execute the 'shell' project, and the binary named 'ls' to execute the 'ls' project...
I know that I have to edit the end of the Makefile, but I don't know what :(
Thanks
#/// #file
#/// #brief Generic Makefile for the System 2 project.
#
#/// #detail If you just add some library files used by the project.c program, you have nothing to change to compile them if sources are in the ./src directory. To add a new binary, just add the name of the main file in the TARGETS variable.
#Nom du project
TARGET_SHELL = shell
TARGET_LS = ls
##############
# Constantes #
##############
# Repertoires
SOURCE = ./src
BIN = ./bin
DOCPATH = ${SOURCE}/dox
DOCTARGET = ./doc
DIRLIST = ${SOURCE} ${BIN}
#DEP = ${SOURCE}/depend
#DIRLIST = ${SOURCE} ${BIN} ${OPT} ${DEP}
# Cibles
BINSHELL = ${TARGET_SHELL:%=${BIN}/%}
BINLS = ${TARGET_LS:%=${BIN}/%}
# Commandes
CC = gcc
# Options
CFLAGS = -O0 -g -W -Wall -Wextra -Wconversion -Werror -mtune=native -march=native -std=c99 -D_POSIX_C_SOURCE=200809L -D_XOPEN_SOURCE=700
LDFLAGS = -lm -W -Wall -pedantic -L. -lm
# Fichiers
DOX = ${wildcard ${DOCPATH}/*.dox} # Sources
SRC_SHELL = ${wildcard ${SOURCE}/divers.c ${SOURCE}/commandes_externes.c ${SOURCE}/commandes_internes.c ${SOURCE}/entities.c ${SOURCE}/execution.c ${SOURCE}/parse.c ${SOURCE}/shell.c} # Sources
SRC_LS = ${wildcard ${SOURCE}/commande_ls.c}
INT_SHELL = ${wildcard ${SOURCE}/divers.h ${SOURCE}/commandes_externes.h ${SOURCE}/commandes_internes.h ${SOURCE}/execution.h ${SOURCE}/parse.h} # Interfaces
INT_LS = ${wildcard ${SOURCE}/commande_ls.h}
OBJ_SHELL = ${SRC_SHELL:%.c=%.o} # Objets
OBJ_LS = ${SRC_LS:%.c=%.o}
##########
# Regles #
##########
# ALL
all : ${BINSHELL} ${BINLS}
# CLEAN
clean :
#echo
#echo Cleaning : object files
#echo --------
#echo
rm -f ${OBJ_SHELL}
rm -f ${OBJ_LS}
clean-doc :
#echo
#echo Cleaning : object files
#echo --------
#echo
rm -fr ${DOCTARGET}
clean-emacs :
#echo
#echo Cleaning : emacs back-ups
#echo --------
#echo
rm -f ${SOURCE}/*~
rm -f ${SOURCE}/\#*\#
rm -f *~
rm -f \#*\#
clean-bin :
#echo
#echo Cleaning : binaries
#echo --------
#echo
rm -f ${BINSHELL}
rm -f ${BINLS}
distclean : clean clean-emacs clean-bin
dirs :
#for dir in ${DIRLIST} ;\
do \
echo Creating directory : $${dir} ;\
echo ------------------ ;\
if test -d $${dir} ;\
then \
echo Directory already exists ;\
else mkdir -p $${dir} ;\
fi ;\
echo Done ;\
echo ;\
done
# Binaires
${BIN}/${TARGET_SHELL} : ${${TARGET_SHELL}:%=${SOURCE}/%}
${BIN}/${TARGET_LS} : ${${TARGET_LS}:%=${SOURCE}/%}
${BIN}/% : $(OBJ_SHELL)
#echo
#echo Linking bytecode : $#
#echo ----------------
#echo
${CC} -o $# $^ ${LDFLAGS}
#echo
#echo Done
#echo
# Regles generiques
%.o : %.c %.h
#echo
#echo Compiling $#
#echo --------
#echo
$(CC) $(CFLAGS) -c $< -o $#
# Documentation
doc : ${SRC} ${INT} ${DOX}
doxygen; doxygen
#############################
# Inclusion et spécificités #
#############################
.PHONY : all clean clean-doc clean-emacs clean-bin distclean doc
Some fun with very dynamic makefile:
#
# Boilerplate.
#
define add_target
$(info add_target($1))
$(eval $(eval_args))
$(eval $(call eval_args,$1,\
OBJDIR := $(firstword $($1.OBJDIR) ./objs/$1),\
))
$(eval $(call eval_args,$1,\
objs := $(obj_from_source),
))
$(eval $1 := $($1.TARGET))
TARGETS += $($1)
PHONY_TARGETS += $1
CLEAN_TARGETS += clean_$1
.PHONY: clean_$1
clean_$1:; rm -rf $($1.OBJDIR) $($1)
.PHONY: $1
$1: $($1)
$($1): target:=$1
$($1): $($1.objs); $$(if $$(wildcard $$(#D)),,mkdir -p $$(#D) && )$$(add_target.link)
$($1.objs):; $$(if $$(wildcard $$(#D)),,mkdir -p $$(#D) && )$$(add_target.compile)
$(foreach $1.SOURCES,$($1.SOURCES),$(eval $(obj_from_source): $($1.SOURCES)))
$(info end)
endef
void :=
space := $(void) $(void)
obj_from_source = $(addprefix $($1.OBJDIR)/,$(addsuffix .o,$(basename $(notdir $($1.SOURCES)))))
eval_args = $(foreach i,2 3 4 5 6 7 8 9,$(call eval_arg,$1,$(strip $($i))))
eval_arg = $(if $2,$(info $(space)$(space)$1.$2)$(eval $1.$2))
# Link command line
add_target.link = $(CC) $($(target).LDLAGS) -o $# $^
# Compile command line
add_target.compile = $(CC) -c -o $# $($(target).CFLAGS) $<
# -- Directories --
SOURCE := ./src
BIN := ./bin
# Add 'shell' target to the project
$(eval $(call add_target,shell,\
TARGET := $(BIN)/shell,\
SOURCES += ${SOURCE}/execution.c,\
SOURCES += ${SOURCE}/shell.c,\
CFLAGS := -Wall -I./include,\
))
# Add 'ls' target to the project
$(eval $(call add_target,ls,\
TARGET := $(BIN)/ls,\
SOURCES := $(addprefix ${SOURCE}/,execution.c commande_ls.c),\
CFLAGS := -I./include,\
))
all: ${PHONY_TARGETS}
.PHONY: all
clean: | $(CLEAN_TARGETS)
.PHONY: clean
Environment:
$ find
.
./include
./include/execution.h
./src
./src/commande_ls.c
./src/execution.c
./src/shell.c
Source files:
$ for f in `find -type f`; do echo $f; cat $f; echo; done
./include/execution.h
void workload();
./src/commande_ls.c
#include <stdio.h>
#include "execution.h"
int main() {
printf("Welcome to ls\n");
workload();
}
./src/execution.c
#include <stdio.h>
#include "execution.h"
void workload() {
printf("Hello from %s\n", __FILE__);
}
./src/shell.c
#include <stdio.h>
#include "execution.h"
int main() {
printf("Welcome to shell\n");
workload();
}
Build all targets:
$ make -f ../Makefile.sample
add_target(shell)
shell.TARGET := ./bin/shell
shell.SOURCES += ./src/execution.c
shell.SOURCES += ./src/shell.c
shell.CFLAGS := -Wall -I./include
shell.OBJDIR := ./objs/shell
shell.objs := $(obj_from_source)
end
add_target(ls)
ls.TARGET := ./bin/ls
ls.SOURCES := ./src/execution.c ./src/commande_ls.c
ls.CFLAGS := -I./include
ls.OBJDIR := ./objs/ls
ls.objs := $(obj_from_source)
end
mkdir -p objs/shell && cc -c -o objs/shell/execution.o -Wall -I./include src/execution.c
cc -c -o objs/shell/shell.o -Wall -I./include src/shell.c
mkdir -p bin && cc -o bin/shell objs/shell/execution.o objs/shell/shell.o
mkdir -p objs/ls && cc -c -o objs/ls/execution.o -I./include src/execution.c
cc -c -o objs/ls/commande_ls.o -I./include src/commande_ls.c
cc -o bin/ls objs/ls/execution.o objs/ls/commande_ls.o
Run targets:
$ ./bin/ls.exe; ./bin/shell.exe
Welcome to ls
Hello from src/execution.c
Welcome to shell
Hello from src/execution.c
Clean ls and build all targets again (just for fun):
$ make -f ../Makefile.sample clean_ls
add_target(shell)
shell.TARGET := ./bin/shell
shell.SOURCES += ./src/execution.c
shell.SOURCES += ./src/shell.c
shell.CFLAGS := -Wall -I./include
shell.OBJDIR := ./objs/shell
shell.objs := $(obj_from_source)
end
add_target(ls)
ls.TARGET := ./bin/ls
ls.SOURCES := ./src/execution.c ./src/commande_ls.c
ls.CFLAGS := -I./include
ls.OBJDIR := ./objs/ls
ls.objs := $(obj_from_source)
end
rm -rf ./objs/ls ./bin/ls
$ make -f ../Makefile.sample
add_target(shell)
shell.TARGET := ./bin/shell
shell.SOURCES += ./src/execution.c
shell.SOURCES += ./src/shell.c
shell.CFLAGS := -Wall -I./include
shell.OBJDIR := ./objs/shell
shell.objs := $(obj_from_source)
end
add_target(ls)
ls.TARGET := ./bin/ls
ls.SOURCES := ./src/execution.c ./src/commande_ls.c
ls.CFLAGS := -I./include
ls.OBJDIR := ./objs/ls
ls.objs := $(obj_from_source)
end
mkdir -p objs/ls && cc -c -o objs/ls/execution.o -I./include src/execution.c
cc -c -o objs/ls/commande_ls.o -I./include src/commande_ls.c
cc -o bin/ls objs/ls/execution.o objs/ls/commande_ls.o
Note how handy $(add_target) function is. It provides way add as many targets to your project as you need without stupid code duplication. Still configuring of target build options is extremely flexible.
Should work with GNU Make 3.81 and up. Enjoy!
Did you try something like this:
SUBDIRS := common programs
all: subdir
ifdef SUBDIRS
.PHONY: subdir $(SUBDIRS)
subdir: $(SUBDIRS)
$(SUBDIRS):
$(MAKE) -s -C $# <-- ${BIN...
endif
SUBDIRS --> TARGET...
I'm trying to compile an example code where I added a new file under a new directory but I keep getting a dependency problem.
I have added a file "ipc.c" under "/interface".
I have added the source file to "srcs" and also added the directory with "-I/interface".
The Makefile looks as follows:
#
# ======== Makefile ========
#
include ../products.mak
srcs = main_host.c interface/ipc.c
objs = $(addprefix bin/$(PROFILE)/obj/,$(patsubst %.c,%.o$(SUFFIX),$(srcs)))
libs = $(SYSLINK_INSTALL_DIR)/packages/ti/syslink/lib/syslink.a_$(PROFILE)
MAKEVARS = \
SYSLINK_INSTALL_DIR=$(SYSLINK_INSTALL_DIR) \
PKGPATH=$(PKGPATH)
all:
#$(ECHO) "!"
#$(ECHO) "! Making $# ..."
$(MAKE) $(MAKEVARS) PROFILE=debug SUFFIX=v5T togs2_host
$(MAKE) $(MAKEVARS) PROFILE=release SUFFIX=v5T togs2_host
install:
#$(ECHO) "#"
#$(ECHO) "# Making $# ..."
#$(MKDIR) $(INSTALL_DIR)/debug
$(CP) bin/debug/togs2_host $(INSTALL_DIR)/debug
#$(MKDIR) $(INSTALL_DIR)/release
$(CP) bin/release/togs2_host $(INSTALL_DIR)/release
clean::
$(RMDIR) bin
#
#
# ======== rules ========
#
togs2_host: bin/$(PROFILE)/togs2_host
bin/$(PROFILE)/togs2_host: $(objs) $(libs)
#$(ECHO) "##"
#$(ECHO) "## Making $# ..."
$(LD) $(LDFLAGS) -o $# $^ $(LDLIBS)
bin/$(PROFILE)/obj/%.o$(SUFFIX): %.h
bin/$(PROFILE)/obj/%.o$(SUFFIX): %.c
#$(ECHO) "###"
#$(ECHO) "### Making $# ..."
$(CC) $(CPPFLAGS) $(CFLAGS) -o $# $<
# ======== create output directories ========
ifneq (clean,$(MAKECMDGOALS))
ifneq (,$(PROFILE))
ifeq (,$(wildcard bin/$(PROFILE)))
$(shell $(MKDIR) -p bin/$(PROFILE))
endif
ifeq (,$(wildcard bin/$(PROFILE)/obj))
$(shell $(MKDIR) -p bin/$(PROFILE)/obj)
endif
endif
endif
# ======== install validation ========
ifeq (install,$(MAKECMDGOALS))
ifeq (,$(INSTALL_DIR))
$(error must specify INSTALL_DIR)
endif
endif
# ======== toolchain macros ========
ifeq (v5T,$(SUFFIX))
CC = $(CS_ARM_INSTALL_DIR)gcc -c -MD -MF $#.dep -march=armv5t
AR = $(CS_ARM_INSTALL_DIR)ar cr
LD = $(CS_ARM_INSTALL_DIR)gcc
CPPFLAGS = -D_REENTRANT -Dxdc_target_name__=GCArmv5T \
-Dxdc_target_types__=gnu/targets/arm/std.h
CFLAGS = -Wall -ffloat-store -fPIC -Wunused -Dfar= $(CCPROFILE_$(PROFILE)) \
-I. -I/interface $(addprefix -I,$(subst +, ,$(PKGPATH)))
LDFLAGS = $(LDPROFILE_$(PROFILE)) -Wall -Wl,-Map=$#.map
LDLIBS = -lpthread -lc
CCPROFILE_debug = -ggdb -D DEBUG
CCPROFILE_release = -O3 -D NDEBUG
LDPROFILE_debug = -ggdb
LDPROFILE_release = -O3
endif
I keep getting this error:
fatal error: opening dependency file bin/debug/obj/interface/ipc.ov5T.dep: No such file or directory
This is how the the products.mak looks like:
#
# ======== products.mak ========
#
DEPOT = /opt
BIOS_INSTALL_DIR = $(DEPOT)/bios_6_33_01_25
IPC_INSTALL_DIR = $(DEPOT)/ti/ipc_1_23_05_40
SYSLINK_INSTALL_DIR = $(DEPOT)/syslink_2_10_02_17
TI_C6X_INSTALL_DIR = $(DEPOT)/ti/ccsv5/tools/compiler/c6000
CS_ARM_INSTALL_DIR = $(DEPOT)/CodeSourcery/Sourcery_G++_Lite/bin/arm-none-linux-gnueabi-
XDC_INSTALL_DIR = $(DEPOT)/xdctools_3_23_00_32
PKGPATH := $(SYSLINK_INSTALL_DIR)/packages
PKGPATH := $(PKGPATH)+$(BIOS_INSTALL_DIR)/packages
PKGPATH := $(PKGPATH)+$(IPC_INSTALL_DIR)/packages
PKGPATH := $(PKGPATH)+$(XDC_INSTALL_DIR)/packages
PKGPATH := $(PKGPATH)+$
# Use this goal to print your product variables.
.show-products:
#echo "BIOS_INSTALL_DIR = $(BIOS_INSTALL_DIR)"
#echo "IPC_INSTALL_DIR = $(IPC_INSTALL_DIR)"
#echo "SYSLINK_INSTALL_DIR = $(SYSLINK_INSTALL_DIR)"
#echo "TI_ARM_INSTALL_DIR = $(TI_ARM_INSTALL_DIR)"
#echo "TI_C6X_INSTALL_DIR = $(TI_C6X_INSTALL_DIR)"
#echo "CS_ARM_INSTALL_DIR = $(CS_ARM_INSTALL_DIR)"
#echo "XDC_INSTALL_DIR = $(XDC_INSTALL_DIR)"
# ======== standard macros ========
ifneq (,$(wildcard $(XDC_INSTALL_DIR)/bin/echo.exe))
# use these on Windows
CP = $(XDC_INSTALL_DIR)/bin/cp
ECHO = $(XDC_INSTALL_DIR)/bin/echo
MKDIR = $(XDC_INSTALL_DIR)/bin/mkdir -p
RM = $(XDC_INSTALL_DIR)/bin/rm -f
RMDIR = $(XDC_INSTALL_DIR)/bin/rm -rf
else
# use these on Linux
CP = cp
ECHO = echo
MKDIR = mkdir -p
RM = rm -f
RMDIR = rm -rf
endif
I'm not understanding the Makefile completely as it's a code example I'm simply expanding.
For the record: The error "fatal error: opening dependency file [...]: No such file or directory" can also be caused by a too long path. Happened to me on Cygwin/Windows with a path that was way over 200 characters (didn't check exactly).
Got it working.
Needed to add a rule to create the output directories.
So I added
ifeq (,$(wildcard bin/$(PROFILE)/obj/interface))
$(shell $(MKDIR) -p bin/$(PROFILE)/obj/interface)
endif
This makefile is pretty convoluted, so a certain amount of guesswork is required, but I think the trouble is that it doesn't know how to find interface/ipc.c. Try adding this line at the bottom and see if helps:
vpath %.c interface
If it doesn't, we can try some other things. (And if it does, I can suggest some ways to simplify the makefile.)