Compile two targets with one Makefile - shell

Question

---Full Makefile at the bottom ---
I'm currently finishing a project, so I'm coming to the packaging/compiling part.
I'm working with Make, and the specificity of my project is that it contains two projects with a main() in each of them.
I want a binary of the first project (named 'shell') and a binary of the second one (named 'ls'). I've edited the Makefile to separate targets, sources files, etc. Here are the important lines:
-- Projects --
TARGET_SHELL = shell
TARGET_LS = ls
-- Directories --
SOURCE = ./src
BIN = ./bin
DIRLIST = ${SOURCE} ${BIN}
-- Targets --
BINSHELL = ${TARGET_SHELL:%=${BIN}/%}
BINLS = ${TARGET_LS:%=${BIN}/%}
-- Files --
SRC_SHELL = ${wildcard ${SOURCE}/execution.c ${SOURCE}/shell.c}
SRC_LS = ${wildcard ${SOURCE}/commande_ls.c}
INT_SHELL = ${wildcard ${SOURCE}/execution.h}
INT_LS = ${wildcard ${SOURCE}/commande_ls.h}
OBJ_SHELL = ${SRC_SHELL:%.c=%.o}
OBJ_LS = ${SRC_LS:%.c=%.o}
-- Rules --
all : ${BINSHELL} ${BINLS}
-- Binaries --
${BIN}/${TARGET_SHELL} : ${${TARGET_SHELL}:%=${SOURCE}/%}
${BIN}/${TARGET_LS} : ${${TARGET_LS}:%=${SOURCE}/%}
${BIN}/% : $(OBJ_SHELL)
#echo
#echo Linking bytecode : $#
#echo ----------------
#echo
${CC} -o $# $^ ${LDFLAGS}
#echo
#echo Done
#echo
The 'make' command works perfectly. At the end, I have two binaries, one named 'shell' and the other one named 'ls'. Nice!
But in fact, the two binaries are exactly the same, they both execute the 'shell' project. I wanted the binary 'shell' to execute the 'shell' project, and the binary named 'ls' to execute the 'ls' project...
I know that I have to edit the end of the Makefile, but I don't know what :(
Thanks
#/// #file
#/// #brief Generic Makefile for the System 2 project.
#
#/// #detail If you just add some library files used by the project.c program, you have nothing to change to compile them if sources are in the ./src directory. To add a new binary, just add the name of the main file in the TARGETS variable.
#Nom du project
TARGET_SHELL = shell
TARGET_LS = ls
##############
# Constantes #
##############
# Repertoires
SOURCE = ./src
BIN = ./bin
DOCPATH = ${SOURCE}/dox
DOCTARGET = ./doc
DIRLIST = ${SOURCE} ${BIN}
#DEP = ${SOURCE}/depend
#DIRLIST = ${SOURCE} ${BIN} ${OPT} ${DEP}
# Cibles
BINSHELL = ${TARGET_SHELL:%=${BIN}/%}
BINLS = ${TARGET_LS:%=${BIN}/%}
# Commandes
CC = gcc
# Options
CFLAGS = -O0 -g -W -Wall -Wextra -Wconversion -Werror -mtune=native -march=native -std=c99 -D_POSIX_C_SOURCE=200809L -D_XOPEN_SOURCE=700
LDFLAGS = -lm -W -Wall -pedantic -L. -lm
# Fichiers
DOX = ${wildcard ${DOCPATH}/*.dox} # Sources
SRC_SHELL = ${wildcard ${SOURCE}/divers.c ${SOURCE}/commandes_externes.c ${SOURCE}/commandes_internes.c ${SOURCE}/entities.c ${SOURCE}/execution.c ${SOURCE}/parse.c ${SOURCE}/shell.c} # Sources
SRC_LS = ${wildcard ${SOURCE}/commande_ls.c}
INT_SHELL = ${wildcard ${SOURCE}/divers.h ${SOURCE}/commandes_externes.h ${SOURCE}/commandes_internes.h ${SOURCE}/execution.h ${SOURCE}/parse.h} # Interfaces
INT_LS = ${wildcard ${SOURCE}/commande_ls.h}
OBJ_SHELL = ${SRC_SHELL:%.c=%.o} # Objets
OBJ_LS = ${SRC_LS:%.c=%.o}
##########
# Regles #
##########
# ALL
all : ${BINSHELL} ${BINLS}
# CLEAN
clean :
#echo
#echo Cleaning : object files
#echo --------
#echo
rm -f ${OBJ_SHELL}
rm -f ${OBJ_LS}
clean-doc :
#echo
#echo Cleaning : object files
#echo --------
#echo
rm -fr ${DOCTARGET}
clean-emacs :
#echo
#echo Cleaning : emacs back-ups
#echo --------
#echo
rm -f ${SOURCE}/*~
rm -f ${SOURCE}/\#*\#
rm -f *~
rm -f \#*\#
clean-bin :
#echo
#echo Cleaning : binaries
#echo --------
#echo
rm -f ${BINSHELL}
rm -f ${BINLS}
distclean : clean clean-emacs clean-bin
dirs :
#for dir in ${DIRLIST} ;\
do \
echo Creating directory : $${dir} ;\
echo ------------------ ;\
if test -d $${dir} ;\
then \
echo Directory already exists ;\
else mkdir -p $${dir} ;\
fi ;\
echo Done ;\
echo ;\
done
# Binaires
${BIN}/${TARGET_SHELL} : ${${TARGET_SHELL}:%=${SOURCE}/%}
${BIN}/${TARGET_LS} : ${${TARGET_LS}:%=${SOURCE}/%}
${BIN}/% : $(OBJ_SHELL)
#echo
#echo Linking bytecode : $#
#echo ----------------
#echo
${CC} -o $# $^ ${LDFLAGS}
#echo
#echo Done
#echo
# Regles generiques
%.o : %.c %.h
#echo
#echo Compiling $#
#echo --------
#echo
$(CC) $(CFLAGS) -c $< -o $#
# Documentation
doc : ${SRC} ${INT} ${DOX}
doxygen; doxygen
#############################
# Inclusion et spécificités #
#############################
.PHONY : all clean clean-doc clean-emacs clean-bin distclean doc

Answer 1

Some fun with very dynamic makefile:
#
# Boilerplate.
#
define add_target
$(info add_target($1))
$(eval $(eval_args))
$(eval $(call eval_args,$1,\
OBJDIR := $(firstword $($1.OBJDIR) ./objs/$1),\
))
$(eval $(call eval_args,$1,\
objs := $(obj_from_source),
))
$(eval $1 := $($1.TARGET))
TARGETS += $($1)
PHONY_TARGETS += $1
CLEAN_TARGETS += clean_$1
.PHONY: clean_$1
clean_$1:; rm -rf $($1.OBJDIR) $($1)
.PHONY: $1
$1: $($1)
$($1): target:=$1
$($1): $($1.objs); $$(if $$(wildcard $$(#D)),,mkdir -p $$(#D) && )$$(add_target.link)
$($1.objs):; $$(if $$(wildcard $$(#D)),,mkdir -p $$(#D) && )$$(add_target.compile)
$(foreach $1.SOURCES,$($1.SOURCES),$(eval $(obj_from_source): $($1.SOURCES)))
$(info end)
endef
void :=
space := $(void) $(void)
obj_from_source = $(addprefix $($1.OBJDIR)/,$(addsuffix .o,$(basename $(notdir $($1.SOURCES)))))
eval_args = $(foreach i,2 3 4 5 6 7 8 9,$(call eval_arg,$1,$(strip $($i))))
eval_arg = $(if $2,$(info $(space)$(space)$1.$2)$(eval $1.$2))
# Link command line
add_target.link = $(CC) $($(target).LDLAGS) -o $# $^
# Compile command line
add_target.compile = $(CC) -c -o $# $($(target).CFLAGS) $<
# -- Directories --
SOURCE := ./src
BIN := ./bin
# Add 'shell' target to the project
$(eval $(call add_target,shell,\
TARGET := $(BIN)/shell,\
SOURCES += ${SOURCE}/execution.c,\
SOURCES += ${SOURCE}/shell.c,\
CFLAGS := -Wall -I./include,\
))
# Add 'ls' target to the project
$(eval $(call add_target,ls,\
TARGET := $(BIN)/ls,\
SOURCES := $(addprefix ${SOURCE}/,execution.c commande_ls.c),\
CFLAGS := -I./include,\
))
all: ${PHONY_TARGETS}
.PHONY: all
clean: | $(CLEAN_TARGETS)
.PHONY: clean
Environment:
$ find
.
./include
./include/execution.h
./src
./src/commande_ls.c
./src/execution.c
./src/shell.c
Source files:
$ for f in `find -type f`; do echo $f; cat $f; echo; done
./include/execution.h
void workload();
./src/commande_ls.c
#include <stdio.h>
#include "execution.h"
int main() {
printf("Welcome to ls\n");
workload();
}
./src/execution.c
#include <stdio.h>
#include "execution.h"
void workload() {
printf("Hello from %s\n", __FILE__);
}
./src/shell.c
#include <stdio.h>
#include "execution.h"
int main() {
printf("Welcome to shell\n");
workload();
}
Build all targets:
$ make -f ../Makefile.sample
add_target(shell)
shell.TARGET := ./bin/shell
shell.SOURCES += ./src/execution.c
shell.SOURCES += ./src/shell.c
shell.CFLAGS := -Wall -I./include
shell.OBJDIR := ./objs/shell
shell.objs := $(obj_from_source)
end
add_target(ls)
ls.TARGET := ./bin/ls
ls.SOURCES := ./src/execution.c ./src/commande_ls.c
ls.CFLAGS := -I./include
ls.OBJDIR := ./objs/ls
ls.objs := $(obj_from_source)
end
mkdir -p objs/shell && cc -c -o objs/shell/execution.o -Wall -I./include src/execution.c
cc -c -o objs/shell/shell.o -Wall -I./include src/shell.c
mkdir -p bin && cc -o bin/shell objs/shell/execution.o objs/shell/shell.o
mkdir -p objs/ls && cc -c -o objs/ls/execution.o -I./include src/execution.c
cc -c -o objs/ls/commande_ls.o -I./include src/commande_ls.c
cc -o bin/ls objs/ls/execution.o objs/ls/commande_ls.o
Run targets:
$ ./bin/ls.exe; ./bin/shell.exe
Welcome to ls
Hello from src/execution.c
Welcome to shell
Hello from src/execution.c
Clean ls and build all targets again (just for fun):
$ make -f ../Makefile.sample clean_ls
add_target(shell)
shell.TARGET := ./bin/shell
shell.SOURCES += ./src/execution.c
shell.SOURCES += ./src/shell.c
shell.CFLAGS := -Wall -I./include
shell.OBJDIR := ./objs/shell
shell.objs := $(obj_from_source)
end
add_target(ls)
ls.TARGET := ./bin/ls
ls.SOURCES := ./src/execution.c ./src/commande_ls.c
ls.CFLAGS := -I./include
ls.OBJDIR := ./objs/ls
ls.objs := $(obj_from_source)
end
rm -rf ./objs/ls ./bin/ls
$ make -f ../Makefile.sample
add_target(shell)
shell.TARGET := ./bin/shell
shell.SOURCES += ./src/execution.c
shell.SOURCES += ./src/shell.c
shell.CFLAGS := -Wall -I./include
shell.OBJDIR := ./objs/shell
shell.objs := $(obj_from_source)
end
add_target(ls)
ls.TARGET := ./bin/ls
ls.SOURCES := ./src/execution.c ./src/commande_ls.c
ls.CFLAGS := -I./include
ls.OBJDIR := ./objs/ls
ls.objs := $(obj_from_source)
end
mkdir -p objs/ls && cc -c -o objs/ls/execution.o -I./include src/execution.c
cc -c -o objs/ls/commande_ls.o -I./include src/commande_ls.c
cc -o bin/ls objs/ls/execution.o objs/ls/commande_ls.o
Note how handy $(add_target) function is. It provides way add as many targets to your project as you need without stupid code duplication. Still configuring of target build options is extremely flexible.
Should work with GNU Make 3.81 and up. Enjoy!

Answer 2

Did you try something like this:
SUBDIRS := common programs
all: subdir
ifdef SUBDIRS
.PHONY: subdir $(SUBDIRS)
subdir: $(SUBDIRS)
$(SUBDIRS):
$(MAKE) -s -C $# <-- ${BIN...
endif
SUBDIRS --> TARGET...