Is there interesting projects written in VHDL (possibly along with other languages) that serve beyond just circuit design?
I have worked with VHDL in Xilinx and done electrical circuit design as you have said. You can use vhdl and assembly to code for numerous different projects such as writing the code behind a microprocessor such as intel 8088 or running a client server simple program using the RS232 port between two computers etc. Probably a million things you can do with it but the only limitations are that generally the language itself (VHDL) was designed to emulate and code and test hardware and its functioning. Meant for simulation and not really to code for anything else, I suggest you try other languages that can be used for better projects.
Related
I am totally new to the RISC-V domain. I am targeting to implement the Rocket Chip core on my FPGA as a module of a bigger project.
As far as I know, SiFive is a supplier for the Rocket Chip. To my knowledge, SiFive makes all its cores implementable only on Xilinx Artix-7 FPGAs. Yet, I am wondering if it is possible to implement it on other FPGAs (Eg. Xilinx Virtex 7 or Zynq)?
If yes, would that require some further modifications of any kind? Or I am fine with the regular flow demonstrated on Github?
Thanks.
LiteX has support for building SoCs around the Rocket core on a range of platforms. It has been tested on both Xilinx FPGAs and Lattice ECP5.
https://www.contrib.andrew.cmu.edu/~somlo/BTCP/ is a description of this flow aimed primarily at the Versa ECP5 development board. But LiteX supports a range of other platforms including some Virtex and Zynq boards.
BTW, Rocket-Chip is not (just) a SiFive project, it was originally developed by Berkeley and is now maintained by Chips Alliance.
Originally, Rocket Chip was supported for Zynq FPGAs: https://github.com/ucb-bar/fpga-zynq
That repo is deprecated and no longer supported, but perhaps something useful can be gleamed from it.
I managed to implement 32-bit single tiny core over Xilinx VC-709 board Virtex-7 fpga for baremetal.
I'm pretty sure you can implement bigger core with linux image.
Modification as per your requirement is not that tough.Just learn chisel and go through with interfaces and architecture.
On hardware side just need knowledge of dpi interface and design flow for fpga.
I'm using the VC707 Fpga board which include a Virtex 7 Xilinx FPGA.
I want to transfer the Data from the DDR 3 memory to a PC via the PCIexpress.
Is there any tutorial that exist to do so?
I have been nreading this tutorial https://www.xilinx.com/support/documentation/boards_and_kits/vc707/2014_4/xtp207-vc707-pcie-c-2014-4.pdf
But it isn't that helpful
Thanks
Your question is missing some information, for example you don't tell us how the data gets into the DDR memory. I'll leave that for now.
You want to have an FPGA with DDR and PCIe. Both are very high speed interfaces and require a good understanding of electronics. You are using a commercial board so we can assume the board has been proven to work with DDR and PCIe.
You first need to make an FPGA with these interfaces. Thus you have to make a DDR block and and a PCIe block. Xilinx has done most of the work but you have to drive the tools to fill in the detail. That is what the tutorial is about.
Some Virtex-7 chips have a ready built PCIe block, but not all. What I have seen, none has a ready built DDR interface. There may be an similar tutorial how to make a DDR interface.
If you manage to work your way through that you have two individual blocks of logic. You then need the HDL skills to connect those up.
If you are lucky both blocks work. If, for some reason, they do NOT work the above mentioned knowledge of high speed interfaces and electronics must be applied as well as ho to debug an FPGA system.
Last but not least you have to write PCIe device drivers on your PC to access all what you have built.
My question about the tutorial was to assess your skills in FPGA and HDL. What you want to achieve requires experience and knowledge with FPGAs, HDL design and the Xilinx tools. If your have not worked with FPGA, HDL, Xilinx before you have two options:
First spend a few weeks/month to get more experienced in those fields.
Find somebody who has that experience already to do the most difficult work for (with?) you.
I am PLC programmer for Omron devices and now I found ruby as a very nice language. I saw there is embedded ruby for embedded devices. I'm wondering if there any gem for PLC, if not I might consider to research on how to develop one.
PLCs are typically programmed using the IEC 61131-3 languages. See here.
If you are doing normal PLC programming in an industrial environment, the standard way to do what you are describing is to write your Ruby application on a server, and use OPC or something similar to communicate with the PLC, and keep the PLC logic in the IEC languages.
It is very common for industrial controls engineers to get called in to work on controllers that have been in the field for ten or more years. If you use Ruby to do your PLC program, you could be forcing someone to teach themselves Ruby on the fly, during a plant shutdown, just to troubleshoot some minor I/O issue.
My advice is to keep the PLC languages in the PLC and the high-level languages on the server.
Is there any quite good tool to generate State Machine graph from VHDL code? I'm using Xilinx ISE Webpack. Cheers!
Active HDL has a feature called "Code2Graphics" which supports this.
Additionally, some synthesis tools (typically ones you would have to pay for) also support this.
Note that an RTL view is more commonly available in synthesis tools (such as XST).
Modelsim SE (and DE?) have these kind of things. But, not for free :-(
My company is trying to build a pcb with an obsolete xilinx fpga (XC3042A) which is part of the XC3000 series chips. Does anyone have any experience programming the data to the chip? I'm looking for what software, hardware, etc. people have used.
I have programmed old Xilinx chips (XC4010XL) using a custom built interface to the ISA bus.
I used Turbo-C on a DOS box and a home-made ISA card with '245 (bidir transceiver) and a 74LS74 (dual flip flop D) for strobe signals on a slave parallel configuration.
It is not difficult to implement the same using a parallel port, for instance.
You should be able to find the programming specs from the Xilinx website. They provide documentation on the different methods used in programming their FPGA. It should be in their AppNotes. They have several modes - typically slave serial or select map (parallel). That means some sort of SPI flash, or parallel flash, or JTAG.
If you look around, you may find schematics for a DIY programming cable too! You can also interface a small micro, say a 8-bit PIC to handle the programming specs while you design your own custom interface to it or interface it to a SD card or something else.
The current Xilinx tools and cables will program old parts.
The XC3000 series does not use the JTAG interface, so you can not use the Xilinx programmer to download your configuration.
You can do so by either using an external EPROM or an embedded processor to download the code.
Take a look at this applications note from Xilinx:
http://www.xilinx.com/support/documentation/application_notes/xapp090.pdf
For daisy chain:
http://www.xilinx.com/support/documentation/application_notes/xapp091.pdf
It describes the data format as well as signal info for downloading the configuration file to the FPGA.
You can use older version of the Xilinx programmer from their web site and configure the devices, I believe the last version of the xilinx supporting the 3000 series was version 8 but I am not sure.
Check out FTDI. You might be able to convince them to go with some updated hardware. It's currently $150 CAD for USB + FPGA, and $80 CAD extra if you bundle it with a Manual. Plus shipping.
It even supports the free web kit available from the Xilinx website.