Is there any quite good tool to generate State Machine graph from VHDL code? I'm using Xilinx ISE Webpack. Cheers!
Active HDL has a feature called "Code2Graphics" which supports this.
Additionally, some synthesis tools (typically ones you would have to pay for) also support this.
Note that an RTL view is more commonly available in synthesis tools (such as XST).
Modelsim SE (and DE?) have these kind of things. But, not for free :-(
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I tried Vivado and Quartus, but both of them are quite heavy, and the tools are very complicated for a starter. Is there a lightweight free IDE + Simulator for a starter who is learning VHDL?
VHDL-Simulation:
There are ports of the linux programs GHDL and GTKwave for windows:
https://github.com/ghdl/ghdl/releases
http://gtkwave.sourceforge.net/
http://gtkwave.sourceforge.net/gtkwave.pdf
GHDL is a command line tool to compile VHDL files and "simulate" them. the output is a waveform file, which can be viewed/inspected by gtkwave. You can write some scripts (I would advice PowerShell) to automate the compilation or you can use a build tool.
In my opinion (Quartus) ModelSim / QuestaSim is not lightweight. The Xilinx simulators iSim (included in ISE) and xSim (included in Vivado) are good enough for every day simulations. ghdl is very fast, but does not support all (advanced) VHDL features.
VHDL-IDEs:
If you are familiar with state-of-the art coding environments like Visual Studio, SharDevelop, MonoDevelop, Eclipse or NetBeans then I would say coding HDLs is still in the stone-age !!
All big vendors offer free HDL toolchains, which are paided by the devices, but these tools are only multi-tabbed text editors with a design hierarchy viewer and some buttons to hide the command line tool executions.
The mentioned Sigasi Eclipse plugin (there is also e free version) is new on the market and has some advantages. This plugin is under constant development and still increasing in its features. I tested several versions in the past, but I'm not satisfied with some features so I'm still using ISE :)
As a students I have not the chance to try some professional tools from Aldec, Mentor, ...
For simulation, ModelSim-Altera Starter Edition is a free version of ModelSim provided by Altera, and is very user friendly and widely used. It has a build in editor with VHDL color coding, so you can do editing, compile, and simulation from within ModelSim.
Vivado (Xilinx) and Quartus (Altera) are synthesis tools, which can transform your VHDL design files into a hardware representation that can be downloaded into an FPGA. These synthesis tools are used for step two, after a design has been created and simulated to verify proper operation.
If you are a student, you can get a free student license for Sigasi. It's an eclipse based vhdl IDE, with all the modern IDE features like on the fly error checking, formatting, hovers...
It has integration with Modelsim, ISim and riviera, Sigasi compiles the the vhdl files for you in the background and you can start the simulator with 1 click. It's not the 100% IDE experience but it's as close as you can get for VHDL.
VHDL is complicated and not lightweight. Live with it.
For a list of free simulators, see: http://www.sigasi.com/faq/which-free-vhdl-simulator-can-i-use
I have a vhdl design that is created in Xilinx ISE and I would like to bring it over to the XPS/EDK 14.2 as a pcore. The issue is, I am not really sure how I should be hooking it up. The XPS utility gives me the option of an AXI Burst bus. Am I suppose to create an interface to hook up the AXI signals to my module? I am not really sure how I am suppose to use it as a pcore, since I am new to the XPS tool. I was under the impression the XPS tool would make the appropriate hook ups for me (i.e. ACLK would connect to my clock, etc.).
Any background information would be appreciated. I am only finding tutorials with the older version of XPS and it doesn't really cover my issue.
Have you looked into tools like ImpulseC from Impulse Accelerated Technologies?
I have had years of good results using that tool to develop pcores in ANSI-C and them exporting the results into correctly formed Xilinx pcores.
If you asked, I'm sure you could get a demo license to see if it would help in your situation.
It spits everything out in VHDL and you can read through the results to see how to do it.
I have xilinx macros for uart (.edn files) and i don't know how to use the in activehdl
when i simulate the macros the give uninitialized output ? so what if any one can help me with the right way to use the macro ...?
Use the Xilinx uniMacro library. You may need to compile or download it for your simulator.
ActiveHDL is a simulator package. It typically operates by compile VHDL or Verilog code. The "macros" you are refering to with the extension ".edn" are EDIF netlist files. These are not files that can typically be used by simulator, but are in almost all cases only usable by the synthesizer for the exact device they are targeting.
It may be the case that ActelHDL can import EDIF files. In this case, it still will only work if the primitives used by the EDIF file are also added as part of the project. As another answer said, this most likely would be primitives from the Xilinx unisim library.
The best option is to probably run the EDIF files you have through the Xilinx tools (specifically "Translate" (ngdbuild) and "Generate Simulation Netlist" (netgen)) to generate a simulation model for these pieces. The result will likely require the Xilinx unisim and simprims libraries, which are usually available precompiled for most simulators, but can also easily just be pointed to the source in the Xilinx ISE install.
Is there interesting projects written in VHDL (possibly along with other languages) that serve beyond just circuit design?
I have worked with VHDL in Xilinx and done electrical circuit design as you have said. You can use vhdl and assembly to code for numerous different projects such as writing the code behind a microprocessor such as intel 8088 or running a client server simple program using the RS232 port between two computers etc. Probably a million things you can do with it but the only limitations are that generally the language itself (VHDL) was designed to emulate and code and test hardware and its functioning. Meant for simulation and not really to code for anything else, I suggest you try other languages that can be used for better projects.
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I want to pick up FPGA programming. I've heard all types of horror stories of proprietary tools. Is there any entirely open-source tool chain available?
If not, how should I learn this? My background: familiar with Scheme, C++, assembly, and MIPS architecture.
There will likely never be a complete open source tool chain for FPGAs unless we manage to develop an open source FPGA architecture. The FPGA companies control the bitstream formats used to program their parts and they have onerous legal language in their user agreements that make it a rather dangerous proposition to try to develop open source tools by reverse engineering (nobody wants to lose their house).
The good news, though, is that many of the patents that protect FPGA architectures are expiring over the next few years. That could make it possible to develop an open source FPGA architecture. Of course, you'd need a few semiconductor companies to get on board and actually manufacture it...
As has been pointed out, there are free HDL simulation tools like Icarus Verilog and GHDL (a VHDL frontend for gcc). But all you can do with them is simulate your design to ensure that it's functionally correct. You then need some sort of synthesis tool to take your HDL to gates and eventually to the bitstream. Xilinx and Altera have free web editions of such tools, but they are definitely not open source.
Icarus is an open source Verilog implementation. You will still need the tool chain from your FPGA vendor to get the code on the FPGA itself.
The gEDA project has some free EDA tools that you may want to check out. The above mentioned Icarus is part of gEDA.
Also check out Fedora Electronic Lab. This is something new to me so I can't provide more info.
I don't think there are any open source complete toolchains available. You might want to look at the Altera Web edition. A free trial download. You can use the MIPS-like Nios2 processor and program it in C and C++ (GNU toolset). There is a Linux port available also.
While proprietary, there hasn't been an open-source toolchain since the late 90's for Altera/Intel or Xilinx. However both Altera and Xilinx have had their free limited version for long enough you would be safe using them.
If you wish to just learn the language, one of the tools above would work. But I would still use a real vendor's toolchain. Since you would be just writing standard Verilog or VHDL, you could take your source to another vendor, just like C.
It looks like the other posts have directly answered the question here. Just thought I'd also mention taking a look at opencores.com... This site has open source HDL (Verilog and VHDL) implementations of working hardware...
You still require the vendor's tool to actually program the FPGA device (as mentioned by others), but companies like Altera provide free web edition tools (Quartus II web-edition) which is free to download. The free versions don't have all the bells and whistles, but it will be enough to get you going for some of their lower-mid range devices (Cyclone II, III, Stratix II)... Pretty cheap chips sometimes (US$80 or so for the Cyclone III 40k gate FPGA).
-So putting it all together, go to the FPGA vendor's website, check out Cyclone series FPGAs and make a purchase for what you need.
-Set up your environment with the free web-edition (Altera.. I am not sure about Xilinx)
-Grab a complete simple project from opencores.com
-Program the FPGA and test it (simulation is separate software tool from current Quartus II tool version)
Note, you may need to buy a vendor-specific programmer (JTAG pins)... A good place to check out some basic projects may be at sparkfun.com.
Happy developing!
Check out a list of ready-to-use boards at http://www.fpga-faq.com/FPGA_Boards.shtml.