My company is trying to build a pcb with an obsolete xilinx fpga (XC3042A) which is part of the XC3000 series chips. Does anyone have any experience programming the data to the chip? I'm looking for what software, hardware, etc. people have used.
I have programmed old Xilinx chips (XC4010XL) using a custom built interface to the ISA bus.
I used Turbo-C on a DOS box and a home-made ISA card with '245 (bidir transceiver) and a 74LS74 (dual flip flop D) for strobe signals on a slave parallel configuration.
It is not difficult to implement the same using a parallel port, for instance.
You should be able to find the programming specs from the Xilinx website. They provide documentation on the different methods used in programming their FPGA. It should be in their AppNotes. They have several modes - typically slave serial or select map (parallel). That means some sort of SPI flash, or parallel flash, or JTAG.
If you look around, you may find schematics for a DIY programming cable too! You can also interface a small micro, say a 8-bit PIC to handle the programming specs while you design your own custom interface to it or interface it to a SD card or something else.
The current Xilinx tools and cables will program old parts.
The XC3000 series does not use the JTAG interface, so you can not use the Xilinx programmer to download your configuration.
You can do so by either using an external EPROM or an embedded processor to download the code.
Take a look at this applications note from Xilinx:
http://www.xilinx.com/support/documentation/application_notes/xapp090.pdf
For daisy chain:
http://www.xilinx.com/support/documentation/application_notes/xapp091.pdf
It describes the data format as well as signal info for downloading the configuration file to the FPGA.
You can use older version of the Xilinx programmer from their web site and configure the devices, I believe the last version of the xilinx supporting the 3000 series was version 8 but I am not sure.
Check out FTDI. You might be able to convince them to go with some updated hardware. It's currently $150 CAD for USB + FPGA, and $80 CAD extra if you bundle it with a Manual. Plus shipping.
It even supports the free web kit available from the Xilinx website.
Related
I am totally new to the RISC-V domain. I am targeting to implement the Rocket Chip core on my FPGA as a module of a bigger project.
As far as I know, SiFive is a supplier for the Rocket Chip. To my knowledge, SiFive makes all its cores implementable only on Xilinx Artix-7 FPGAs. Yet, I am wondering if it is possible to implement it on other FPGAs (Eg. Xilinx Virtex 7 or Zynq)?
If yes, would that require some further modifications of any kind? Or I am fine with the regular flow demonstrated on Github?
Thanks.
LiteX has support for building SoCs around the Rocket core on a range of platforms. It has been tested on both Xilinx FPGAs and Lattice ECP5.
https://www.contrib.andrew.cmu.edu/~somlo/BTCP/ is a description of this flow aimed primarily at the Versa ECP5 development board. But LiteX supports a range of other platforms including some Virtex and Zynq boards.
BTW, Rocket-Chip is not (just) a SiFive project, it was originally developed by Berkeley and is now maintained by Chips Alliance.
Originally, Rocket Chip was supported for Zynq FPGAs: https://github.com/ucb-bar/fpga-zynq
That repo is deprecated and no longer supported, but perhaps something useful can be gleamed from it.
I managed to implement 32-bit single tiny core over Xilinx VC-709 board Virtex-7 fpga for baremetal.
I'm pretty sure you can implement bigger core with linux image.
Modification as per your requirement is not that tough.Just learn chisel and go through with interfaces and architecture.
On hardware side just need knowledge of dpi interface and design flow for fpga.
I'm using the VC707 Fpga board which include a Virtex 7 Xilinx FPGA.
I want to transfer the Data from the DDR 3 memory to a PC via the PCIexpress.
Is there any tutorial that exist to do so?
I have been nreading this tutorial https://www.xilinx.com/support/documentation/boards_and_kits/vc707/2014_4/xtp207-vc707-pcie-c-2014-4.pdf
But it isn't that helpful
Thanks
Your question is missing some information, for example you don't tell us how the data gets into the DDR memory. I'll leave that for now.
You want to have an FPGA with DDR and PCIe. Both are very high speed interfaces and require a good understanding of electronics. You are using a commercial board so we can assume the board has been proven to work with DDR and PCIe.
You first need to make an FPGA with these interfaces. Thus you have to make a DDR block and and a PCIe block. Xilinx has done most of the work but you have to drive the tools to fill in the detail. That is what the tutorial is about.
Some Virtex-7 chips have a ready built PCIe block, but not all. What I have seen, none has a ready built DDR interface. There may be an similar tutorial how to make a DDR interface.
If you manage to work your way through that you have two individual blocks of logic. You then need the HDL skills to connect those up.
If you are lucky both blocks work. If, for some reason, they do NOT work the above mentioned knowledge of high speed interfaces and electronics must be applied as well as ho to debug an FPGA system.
Last but not least you have to write PCIe device drivers on your PC to access all what you have built.
My question about the tutorial was to assess your skills in FPGA and HDL. What you want to achieve requires experience and knowledge with FPGAs, HDL design and the Xilinx tools. If your have not worked with FPGA, HDL, Xilinx before you have two options:
First spend a few weeks/month to get more experienced in those fields.
Find somebody who has that experience already to do the most difficult work for (with?) you.
I have a usb modem with MT6272M chipset, can I take out its chipset and program it? I know that some ICs are programmable and some are not but I really want to program an IC without investing on arduino, rhasberry pi, or intel gallileo so trying to recycle electronic wastes.
Most of the ICs in the electronic waste are not programmable. Because they are specifically designed to do one job efficiently and that program is bound to the IC.
What you are searching is Programmable Integrated Circuit or Micro-controller chips. These are specifically designed to re-program again and again.
Anyhow if you find a specific Integrated Circuit from the waste,
First and most importantly, find its data-sheet (mostly available
in their manufacturer's website for free).
check whether is it a Programmable Integrated Circuit.
if yes, what is the hardware requirement to program it and build the
hardware circuit
write the program according to the specific requirements using
compatible libraries.
connect to the PC
Find the correct boot loader and upload it to the IC.
upload the program, which you have written, to the Programmable Integrated Circuit.
Test it
As you can see, you will need to build different hardware for different Programmable Integrated Circuit. So it is cheaper for you to buy arduino or raspberry circuit board. Then you can reprogram more chips using same board again and again plus the help of the community and the thousands of libraries.
Edit
If it is not mentioned in the datasheet whether you can program it or not , most probably it can't reprogram.
And other thing is that the main function of a modem is signal processing. For example, old cable modems are converting analog signals into digital signals. So they are not designed to reprogram or to do logical calculations. With my personal experience, you better start with a simple micro-controller and once you know the basics, you can go for higher level. Anyway I admire your idea to recycle the waste ICs.
I have a PCIe generated core / endpoint with the xilinx core generator tool for a spartan6 fpga on a development board which I have modified a bit to enable MSI and send these every couple of seconds.
Also, I did a simple C kernel module on my linux desktop in which I plugged in the development board. This registers device, allocates memory, enables bus mastership for device and handles the interrupts etc.
What I want to do now is some DMA transfer from the board to the PC, and then will send an interrupt when finished, so that the cpu can go and read it. I'm not a Verilog expert, and the code I have doesn't seem to be capable of any DMA functions.
I couldn't find any relevant information online, so this is my last hope.
Original text from comment above:
Have you implemented a transaction layer above the generated PCIe core? Why don't you use a free PCIe core if your HDL skills are not so high? PCIe is a very big thing....
Yes, the Xilinx IPCore generator adds a very simple PIO interface ontop of the link layer to handle simple PIO transactioons. Note: PIO transaction are outdated and not allowed for new devices.
Currently I know two rather good IPCores:
XILLYBUS
free educational license
create the IPCore for your FPGA device online and download a netlist
free linux and windows drivers (the linux driver will be included in the standard kernel)
8-bit and 32-bit FIFO interface and a memory interface
linux-driver mapps FPGA to /dev/xillybus_read /dev/xillybus_write devices
RIFFA
I'm not sure if this core is still maintained
free driver
it has a strange interface with up to 12 FIFO channels
free HDL sources
All these cores require the Xilinx Core Generator to generate a PCIe core for your device/board. The core itself provides transaction handling, ...
I'm new to fpga programming, and I'm wondering how to make my fpga design distributable. Here's the scenario I have in mind. I have a network of computers, each deployed with an fpga based peripheral. I want to update the fpga design on the peripherals periodically. How do I accomplish this without spending a fortune on software licenses?
I have a small dev kit for an fpga that shipped with an executable to load example design files (it was an Altera fpga FYI). Does anyone know how I would create such an executable?
Some specifics:
My fpgas are Xilinx Spartan 6Es. I'm using Xilinx ISE for fpga development. The host computers are running debian linux.
Thanks for any and all advice!
If youre dealing with Altera: one computer would have the software tools and licenses needed to synthesize the project. Assuming all the FPGAs are the same model on each station/node, Quartus will generate an .sof file which you can copy and open from station to station. All you would need to do is download the Altera programmer tool (I believe you can download it separately from Quartus II) on each station which is free. Then upload the .sof to the board using the programmer, where you can permanently store it on the fpga prom using a technique similar to the following:
https://m.youtube.com/watch?v=ZrMe8JS7Ktk
However if you have Xilinx and Altera mix, Xilinx has .bit/xdl files, and uses another tool (impact) to upload their bitstreams. They can't be converted to and from bit and sof. So it's recommended that you probably stick to one make (Xilinx or Altera) and model based on your plans.
It looks like what you are looking for is how to make your FPGA's field upgradable. Assuming your FPGA is loading from an external memory such as an SPI flash chip, then you need to modify your design so that it is capable of writing to the SPI chip (or whatever) itself. This is most simply done by putting a register in your design which maps to the individual pins on the flash chip, and then "bit bang" the register from a connected computer. Assuming your FPGAs feed data into your own software running on the computer, then you would modify this software to have the functionality of manipulating this register to reflash the flash device. Obviously, if this goes wrong you bricked your device until it can be flashed again with the JTAG, but it provides a way for all the devices to get updated in the systems they operate without needing to buy a JTAG cable for every single station.
If you have Ethernet on your board you can use the remote programming tool from fpga-cores.
Then you can remote login to the network and program the FPGAs or mail the new config file to you customer and they run the programmer. This is how we remotely updates our boards.
Spartan 6 is supported. As a bonus you can also do some remote debugging with the remote logic analyzer.
Everything is free for non commercial use.