I'm new to C programming. I want to compile C program using Make file. I can compile the source code file with the command:
gcc `xml2-config --cflags --libs` -o xmlexample readelementsfile.c
But when I create make file and I add the above commend into the make file I get this error:
Makefile:1: *** missing separator. Stop.
Can you tell me where I'm wrong?
You need to specify a target:
all:
gcc `xml2-config --cflags --libs` -o xmlexample readelementsfile.c
The whitespace at the start of the second line should be a Tab character.
You can also specify dependencies so that not all of your commands are run every time you build.
Related
Makefile Tutorial
Related
I've got a C++ program with a Makefile, building (g++) and running on Windows cmd. Thing is, sometimes it takes a while to run and save the results, and I want to run it with different parameters at the same time so that I can do something else while I wait for the first instance to finish. It doesn't work though, because of the executable I guess:
>make
g++ -c -o main.o main.cpp
Assembler messages:
Fatal error: can't create main.o: Permission denied
make: *** [main.o] Error 1
You have two problems: The one you ask about, and the reason you ask this question in the first place.
Lets start with the problem you have...
Judging by the Makefile you show, you have it all wrong.
Rules are in the format
target: sources_the_target_depend_on
The target is usually a file that need to be created. For an object file that is the name of the actual object file itself. The source files that the object files then depend on should be on the right-hand side.
To take an example from you Makefile (before you edited it away):
graph2: graph2.o
g++ -g -c graph.cpp -o graph2.o
Here you tell make that the file graph2 depends on the file graph2.o, and then it creates the graph2.o file. That's wrong. The rule should be that the file graph2.o depends om the file graph.cpp and go on to generate the file graph2.o:
graph2.o: graph.cpp
g++ -g -c graph.cpp -o graph2.o
This indirectly leads to the problem you have, with this line (deduced from your error and the Makefile):
main: main.o utils.o graph.o heuristics.o
g++ -g main.cpp -o main.o utils.o graph.o heuristics.o
This contains the same error as discussed above: You say that the file main depends on main.o and then the rule create main.o. Your rule should be
main: main.cpp utils.o graph.o heuristics.o
g++ -g main.cpp -o main utils.o graph.o heuristics.o
Note also how I no longer name the executable file main.o, as that is supposed to be used for object files.
Now lets continue with the reason you have the problem in the first place: That you need to edit the code to change data or values.
This is a problem that you need to solve. One common way to solve it is through command line arguments. If your program parses the command line arguments passed to your program you can pass it the values that could change from run to run.
How to do this is whole chapter on its own, so I wont give you any more details. There are plenty of tutorials online.
Lastly, you can simplify your Makefile considerably, by using implicit rules and variables.
I would simply create the Makefile to look something like this
# The compiler to use
CXX = g++
# Flags to pass to the compiler (add warnings when building)
CXXFLAGS = -Wall
# The main executable file to generate
TARGET = main
# List the object files needed to generate the main executable file
OBJECTS = main.o utils.o graph.o heuristics.o
# The all target depends on your main executable file
# Also as the first target in the Makefile, if no specific target is specified
# this will be the one that is used (it's the "default" target for the Makefile)
all: $(TARGET)
# The main executable file depends on the object files
$(TARGET): $(OBJECTS)
This is really it. the object files will be built automatically from their respective source files, and then the executable program will be linked using the object files listed.
I have a project that basically compiles from the command line in the following form:
g++ -o stack_raster stack_raster.cpp -lgdal -lboost_filesystem -lboost_system
I made a Makefile, and this is the content:
CXX =g++
LDDFLAGS = -lgdal -lboost_system -lboost_filesystem
all: clean stack_raster
clean:
rm -f stack_raster
However I got a collect2: error: ld returned 1 exit status.
A second variation of my Makefile I tried was:
CXX = g++
CPPFLAGS = -lgdal -lboost_system -lboost_filesystem
all: clean stack_raster
clean:
rem -f stack_raster
but I still receive the following message (even though the compile flags appear as they should for my program to compile successfully).
collect2: error: ld returned 1 exit status
<builtin>: recipe for target `stack_raster` failed
make: *** [stack_raster] Error 1
Does anyone could help me with a reference or hint about my problem, and how could I tackle it?
Does anyone could help me with a reference or hint about my problem, and how could I tackle it?
To begin with, you should have a look at the actual link command that make executed. It should have been echoed to make's output just before the error message from collect2. Understanding what's wrong with the command is the first step in determining how to fix your makefile.
In the first case, the command is probably something like
g++ stack_raster.cpp -o stack_raster
In the second, it is probably something like
g++ -lgdal -lboost_system -lboost_filesystem stack_raster.cpp -o stack_raster
The latter is probably also very similar to what you would get with the first makefile if you corrected the spelling of LDDFLAGS to LDFLAGS.
You will note that the library flags come in a different place in that command than they do in your manual command, and I assume you know that the order of objects and library flags on the linker command line is significant to Unix-style linkers such as GNU's (which is the one that the g++ driver will use).
You can certainly fix this by writing an explicit rule, as you describe in your own answer, but your makes' built-in rules may be up to the task, too. If you are using GNU make then they certainly are. For this purpose it is useful to know what the built-in rules actually are, and essential to know what the variables on which these rules depend mean.
Specifically,
LDFLAGS provides options to pass when invoking the linker, and conventionally, they appear on the command line before the objects being linked. As a result, this variable typically is not appropriate for specifying libraries (but it is fine for other link-specific options, such as -L to add directories to the library search path).
CPPFLAGS provides options for modulating the behavior of the C preprocessor (including when compiling C++). These do not typically appear at all in link(-only) commands executed by make, but they will appear (early) in commands for compiling object files from C or C++ sources, and in rules for building executables directly from C or C++ sources.
Neither of those is what you want, but if you are using GNU make, then its documentation for the former explicitly tells you what (with that make implementation) you should do instead:
Extra flags to give to compilers when they are supposed to invoke the
linker, ‘ld’, such as -L. Libraries (-lfoo) should be added to the
LDLIBS variable instead.
(emphasis added)
In GNU make, and perhaps some others, the LDLIBS variable serves exactly the purpose you need: to specify the libraries to link. These will appear at the end of the link command line from built-in rules, as you can confirm from GNU make's catalog of implicit rules, or from the list obtainable by running make -p in a directory containing no makefile.
So, with GNU make you can get the build you seem to want from the built-in rules, with this:
CXX = g++
LDLIBS = -lgdal -lboost_system -lboost_filesystem
all: clean stack_raster
clean:
rm -f stack_raster
In closing, I note that cleaning before building by default, as your examples do and mine imitates, largely defeats the purpose of using make instead of a simple script. Part of the point of make is to do the minimum work necessary, and if your target executable is present and not out of date with respect to its sources then there is no reason to force it to be rebuilt.
Check out the answer:
Set up my makefile to compile C with just "make"
YOu have to specify in the Makefile the file you want to create in this case stack_raster.exe and the objective file in this case stack_raster.cpp and specify the command line arguments you normally pass for compiling. So the Makefile would be something like:
CXX=g++
stack_raster.exe: stack_raster.cpp
g++ -o stack_raster.exe stack_raster.cpp -lgdal -lboost_filesystem -lboost_system
all: clean stack_raster.exe
clean:
rm -f stack_raster.exe
GNUMake has implicit rules to compile certain file types, for instance, in my directory if I have a file 1.cpp, and I write on terminal make 1, the following command gets executed:
g++ 1.cpp -o 1
All this happens without any Makefile in the directory, due to implicit Make rules. However, I am unable to figure out how to modify these rules for my benefit. For instance, if I need to compile my file like this:
g++ -std=c++14 -O2 -g -w -o 1 1.cpp
and for doing this, I want to run the command: make 1, it should do it. Also, it should be generic for any file, for instance I now create a file 2.cpp and write make 2, it should compile it and produce the executable, even if there is no rule for 2 in my Makefile.
Also, if I now go to another directory where this explicit rule has not been mentioned, it should compile according to the default implicit rules only. How to I achieve this?
One way is to set the variables used by the implicit rules in your environment
set CXXFLAGS="-std=c++14 -O2 -g -w"
If you only want this to apply to a single directory, then place a Makefile in the directory with the following
CXXFLAGS := -std=c++14 -O2 -g -w
I am trying to compile using gfortran using the following:
$ gfortran -I/usr/local/include -O3 -Wall -Wno-uninitialized -fbounds-check -g alignparts_lmbfgs.f90 /home/vincent/test/lmbfgs/Lbfgsb.3.0/lbfgsb.f /home/vincent/test/lmbfgs/Lbfgsb.3.0/linpack.f /home/vincent/test/lmbfgs/Lbfgsb.3.0/blas.f /home/vincent/test/lmbfgs/Lbfgsb.3.0/timer.f /home/vincent/test/lmbfgs/minimal_libraries/imlib2010.a /home/vincent/test/lmbfgs/minimal_libraries/genlib.a -o alignparts_lmbfgs.exe -lfftw3 -lm
but it gave me the error
alignparts_lmbfgs.f90:105: Error: Can't open included file '/usr/include/fftw3.f'
even though I specified the -I opitions where the fftw3.f resides.
What am I doing wrong? I don't have root privileges so I can't just move the files from /usr/local/include to /usr/inlcude
I am a noob in compiling. I am only compiling because this is the only way I am getting the executable. Please be as noob-proof as possible when explaining. Thank you so much!
The compiler reports:
alignparts_lmbfgs.f90:105: Error: Can't open included file '/usr/include/fftw3.f'
This means that your source file alignparts_lmbfgs.f90 contains
a line #105 like:
INCLUDE '/usr/include/fftw3.f'
which tells the compiler to copy the file /usr/include/fftw3.f in place
of that line #105. But there is no such file.
You have passed the compiler option -I/usr/local/include which
tells the compiler to search for included files in /usr/local/include,
and you say:
I specified the -I options where the fftw3.f resides.
So probably there is such a file as /usr/local/include/fftw3.f?
In that case, can change:
INCLUDE '/usr/include/fftw3.f'
to:
INCLUDE '/usr/local/include/fftw3.f'
However, if you do that, then the compiler option:
-I/usr/local/include
is pointless, because /usr/local/include/fftw3.f is an absolute filename:
it either exists or it doesn't.
If you want the program to be compilable independently of the absolute location
of fftw3.f - which is emphatically the best practice - then replace line #105 with:
INCLUDE 'fftw3.f'
Then, if fftw3.f is in fact located in /usr/local/include, you can compile
the program with the option -I/usr/local/include, and in general if the file
is located in directory /look/here/for/headers, you can compile the program
with the option -I/look/here/for/headers.
I'm facing an issue with a simple makefile and gcc (MinGW with Windows 10).
This is my simple makefile
IJNI=-I"C:\Program Files (x86)\Java\jdk1.7.0_79\include"
IJNIWIN32=-I"C:\Program Files (x86)\Java\jdk1.7.0_79\include/win32"
CC=gcc
default: main
main: lowlevelAccess.o
$(CC) $(IJNI) $(IJNIWIN32) -c lowlevelAccess -o lowlevelAccess.o
When from a command promp I launch make, I obtain:
gcc -c -o lowlevelAccess.o lowlevelAccess.c
lowlevelAccess.c:7:17: fatal error: jni.h: No such file or directory
#include <jni.h>
^
compilation terminated.
make: *** [lowlevelAccess.o] Error 1
What is wrong?
Thank you!
You aren't adding your -I flags on the lowlevelAccess.o compilation but that's the rule that needs it (not the linking rule where you have it now).
Try adding CFLAGS += $(IJNI) $(IJNIWIN32) to your makefile (possibly use CPPFLAGS instead I'm not sure offhand which is technically more correct here).
See Variables Used by Implicit Rules for what those variables are and Catalogue of Built-In Rules (or the output from make -qp) to see what the default rules that use those variables look like.