Identify set in 12MB 16-way L3 cache with 64B cache lines - cpu

The number of sets will be (12 * 2^20) / (16 * 2^6 ) = 3 * 2^12. Since the number of sets is not a power of two , how do the physical addresses map to the sets ?

Related

Odoo14 - Questions about limit_memory soft and hard

I'm trying to figure out how memory limits work and how to choose the right values.
My test server (VM) has 16GB of RAM and 4 vCPUs but it is a shared server, so I choose to use only 2 vCPUs and 2GB of RAM.
I look in the official documentation, and I calculate how many workers and RAM I need (https://www.odoo.com/documentation/14.0/administration/install/deploy.html#worker-number-calculation) .
W = Workers (workers)
2 workers for 1 CPU
CW = Cron Workers (max_cron_threads)
TW = W + CW
Worker number calculation
(#CPU * 2) + CW
(2 * 2) + 1 = 5 theorical maximal workers
Memory size calculation
Needed RAM = W * ( (light_worker_ratio * light_worker_ram_estimation) + (heavy_worker_ratio * heavy_worker_ram_estimation) )
5 * ((0.8 * 150) + (0.2 * 1024)) = 1624 (~2GB of RAM).
Ok, now, I go to the "configuration sample" (https://www.odoo.com/documentation/14.0/administration/install/deploy.html#id5) and I see I need to estimate how many concurrent users I'll have.
Can you confirm that the number of concurrent users includes all website visitors and not only the connected users?
In the configuration sample, how do you calculate/estimate the value of the limit? (limit_memory_hard, limit_memory_soft, limit_request, limit_time_cpu, limit_time_real)
I've read a lot of documentations (official or not), but they never say how to calculate these values.
Examples:
https://github.com/DocCyblade/tkl-odoo/issues/49 (I really don't understand how DocCyblade finds its values with its formula)
https://github.com/DocCyblade/tkl-odoo/blob/master/overlay/etc/odoo/openerp-server.conf
https://linuxize.com/post/how-to-install-odoo-14-on-ubuntu-20-04/
https://www.rosehosting.com/blog/how-to-speed-up-odoo/. 2048 is the default value since Odoo 10, not 640. If I try its formula, I will find that :
limit memory soft : 5 * 2147483648 = 10737418240
limit memory hard : 5 * 2684354560 = 13421772800
Can you help me, please?
Thanks

Direct mapped cache example

i am really confused on the topic Direct Mapped Cache i've been looking around for an example with a good explanation and it's making me more confused then ever.
For example: I have
2048 byte memory
64 byte big cache
8 byte cache lines
with direct mapped cache how do i determine the 'LINE' 'TAG' and "Byte offset'?
i believe that the total number of addressing bits is 11 bits because 2048 = 2^11
2048/64 = 2^5 = 32 blocks (0 to 31) (5bits needed) (tag)
64/8 = 8 = 2^3 = 3 bits for the index
8 byte cache lines = 2^3 which means i need 3 bits for the byte offset
so the addres would be like this: 5 for the tag, 3 for the index and 3 for the byte offset
Do i have this figured out correctly?
Do i figured out correctly? YES
Explanation
1) Main memmory size is 2048 bytes = 211. So you need 11 bits to address a byte (If your word size is 1 byte) [word = smallest individual unit that will be accessed with the address]
2) You can calculating tag bits in direct mapping by doing (main memmory size / cash size). But i will explain a little more about tag bits.
Here the size of a cashe line( which is always same as size of a main memmory block) is 8 bytes. which is 23 bytes. So you need 3 bits to represent a byte within a cashe line. Now you have 8 bits (11 - 3) are remaining in the address.
Now the total number of lines present in the cache is (cashe size / line size) = 26 / 23 = 23
So, you have 3 bits to represent the line in which the your required byte is present.
The number of remaining bits now are 5 (8 - 3).
These 5 bits can be used to represent a tag. :)
3) 3 bit for index. If you were trying to label the number of bits needed to represent a line as index. Yes you are right.
4) 3 bits will be used to access a byte withing a cache line. (8 = 23)
So,
11 bits total address length = 5 tag bits + 3 bits to represent a line + 3 bits to represent a byte(word) withing a line
Hope there is no confusion now.

Calculating the total data+overhead of a set associative cache

This is a question from a Computer Architecture exam and I don't understand how to get to the correct answer.
Here is the question:
This question deals with main and cache memory only.
Address size: 32 bits
Block size: 128 items
Item size: 8 bits
Cache Layout: 6 way set associative
Cache Size: 192 KB (data only)
Write policy: Write Back
What is the total number of cache bits?
In order to get the number of tag bits, I find that 7 bits of the address are used for byte offset (0-127) and 8 bits are used for the block number (0-250) (250 = 192000/128/6), therefore 17 bits of the address are left for the tag.
To find the total number of bits in the cache, I would take (valid bit + tag size + bits per block) * number of blocks per set * number of sets = (1 + 17 + 1024) * 250 * 6 = 1,536,000. This is not the correct answer though.
The correct answer is 1,602,048 total bits in the cache and part of the answer is that there are 17 tag bits. After trying to reverse engineer the answer, I found that 1,602,048 = 1043 * 256 * 6 but I don't know if that is relevant to the solution because I don't know why those numbers would be used.
I'd like if someone could explain what I did wrong in my calculation to get a different answer.

How to calculate set associative cache size?

A 32-bit processor has a two-way associative cache set that uses the 32 address bits as follows: 31-14 tags, 13-5 index, 4-0 offsets.
Calculate :
The size of the cache line in number of words
The total cache size in bits
I do not understand how to solve it, in my slides there is almost nothing on the set associative caches.
Solutions :
2^3 = 8 words (remaining 3 offset bits removed 2 bits for byte address)
2 * 2^9 * (1 + 18 + 8 * 2^5)
For 1 Shouldn't it be 2^(number of offset bits) so 2^5?
And for 2 what is the formula used?
The size of a word and the smallest entity addressable are not given. But, if we assume that addresses are byte oriented and that a word hold 4 bytes, there are 2^5 bytes/line and 2^3 words
2 * 2^9 * (1 + 18 + 8 * 2^5)
2 (number of ways/sets) * 2^9 (number of sets based on index)
* (1 (valid bit) + 18 (tag size) + 8 (bits/byte) * 2^5 (line size in bytes))

Calculating Page Table Size

I'm reading through an example of page tables and just found this:
Consider a system with a 32-bit logical address space. If the page size in such a system is 4 KB (2^12), then a page table may consist of up to 1 million entries (2^32/2^12). Assuming that each entry consists of 4 bytes, each process may need up to 4 MB of physical address space for the page table alone.
I don't really understand what this 4MB result represents. Does it represent the space the actual page table takes up?
Since we have a virtual address space of 2^32 and each page size is 2^12, we can store (2^32/2^12) = 2^20 pages. Since each entry into this page table has an address of size 4 bytes, then we have 2^20*4 = 4MB. So the page table takes up 4MB in memory.
My explanation uses elementary building blocks that helped me to understand. Note I am leveraging #Deepak Goyal's answer above since he provided clarity:
We were given a logical 32-bit address space (i.e. We have a 32 bit computer)
Consider a system with a 32-bit logical address space
This means that every memory address can be 32 bits long.
"A 32-bit entry can point to one of 2^32 physical page frames"[2], stated differently,
"A 32-bit register can store 2^32 different values"
We were also told that
each page size is 4 KB
1 KB (kilobyte) = 1 x 1024 bytes = 2^10 bytes
4 x 1024 bytes = 2^2 x 2^10 bytes => 4 KB (i.e. 2^12 bytes)
The size of each page is thus 4 KB (Kilobytes NOT kilobits).
As Depaak said, we calculate the number of pages in the page table with this formula:
Num_Pages_in_PgTable = Total_Possible_Logical_Address_Entries / page size
Num_Pages_in_PgTable = 2^32 / 2^12
Num_Pages_in_PgTable = 2^20 (i.e. 1 million)
The authors go on to give the case where each entry in the page table takes 4 bytes. That means that the total size of the page table in physical memory will be 4MB:
Memory_Required_Per_Page = Size_of_Page_Entry_in_bytes x Num_Pages_in_PgTable
Memory_Required_Per_Page = 4 x 2^20
Memory_Required_Per_Page = 4 MB (Megabytes)
So yes, each process would require at least 4MB of memory to run, in increments of 4MB.
Example
Now if a professor wanted to make the question a bit more challenging than the explanation from the book, they might ask about a 64-bit computer. Let's say they want memory in bits. To solve the question, we'd follow the same process, only being sure to convert MB to Mbits.
Let's step through this example.
Givens:
Logical address space: 64-bit
Page Size: 4KB
Entry_Size_Per_Page: 4 bytes
Recall: A 64-bit entry can point to one of 2^64 physical page frames
- Since Page size is 4 KB, then we still have 2^12 byte page sizes
1 KB (kilobyte) = 1 x 1024 bytes = 2^10 bytes
Size of each page = 4 x 1024 bytes = 2^2 x 2^10 bytes = 2^12 bytes
How Many pages In Page Table?
`Num_Pages_in_PgTable = Total_Possible_Logical_Address_Entries / page size
Num_Pages_in_PgTable = 2^64 / 2^12
Num_Pages_in_PgTable = 2^52
Num_Pages_in_PgTable = 2^2 x 2^50
Num_Pages_in_PgTable = 4 x 2^50 `
How Much Memory in BITS Per Page?
Memory_Required_Per_Page = Size_of_Page_Entry_in_bytes x Num_Pages_in_PgTable
Memory_Required_Per_Page = 4 bytes x 8 bits/byte x 2^52
Memory_Required_Per_Page = 32 bits x 2^2 x 2^50
Memory_Required_Per_Page = 32 bits x 4 x 2^50
Memory_Required_Per_Page = 128 Petabits
[2]: Operating System Concepts (9th Ed) - Gagne, Silberschatz, and Galvin
In 32 bit virtual address system we can have 2^32 unique address, since the page size given is 4KB = 2^12, we will need (2^32/2^12 = 2^20) entries in the page table, if each entry is 4Bytes then total size of the page table = 4 * 2^20 Bytes = 4MB
Suppose logical address space is 32 bit so total possible logical entries will be 2^32 and other hand suppose each page size is 4 kilobyte then size of one page is 2^22^10=2^12...
now we know that no. of pages in page table is
pages=total possible logical address entries/page size
so pages=2^32/2^12 =2^20
Now suppose that each entry in page table takes 4 bytes then total size of page table in physical memory will be=2^22^20=2^22=4mb**
Since the Logical Address space is 32-bit long that means program size is 2^32 bytes i.e. 4GB.
Now we have the page size of 4KB i.e.2^12 bytes.Thus the number of pages in program are 2^20.(no. of pages in program = program size/page size).Now the size of page table entry is 4 byte hence the size of page table is 2^20*4 = 4MB(size of page table = no. of pages in program * page table entry size). Hence 4MB space is required in Memory to store the page table.
yes it represents the space the actual page table takes for one process.
if each page is 4KB -> 12 bits for offset (how?)
1 kb is 2^10 bytes => 4 kb is 4*2^10 bytes which is 2^12 => hence 12 bits for offset and the remaining 20 bits for VPN => 2^20 translations which means 2^20 pages are there which means 2^20 entries in the page table.
Hence, size of page table = number of entries in the page table * size of one entry
=> size of page table = 2^20 * 4 KB = 2^22 kB and 1 MB is 2^20 KB => 4 MB

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