This is a question from a Computer Architecture exam and I don't understand how to get to the correct answer.
Here is the question:
This question deals with main and cache memory only.
Address size: 32 bits
Block size: 128 items
Item size: 8 bits
Cache Layout: 6 way set associative
Cache Size: 192 KB (data only)
Write policy: Write Back
What is the total number of cache bits?
In order to get the number of tag bits, I find that 7 bits of the address are used for byte offset (0-127) and 8 bits are used for the block number (0-250) (250 = 192000/128/6), therefore 17 bits of the address are left for the tag.
To find the total number of bits in the cache, I would take (valid bit + tag size + bits per block) * number of blocks per set * number of sets = (1 + 17 + 1024) * 250 * 6 = 1,536,000. This is not the correct answer though.
The correct answer is 1,602,048 total bits in the cache and part of the answer is that there are 17 tag bits. After trying to reverse engineer the answer, I found that 1,602,048 = 1043 * 256 * 6 but I don't know if that is relevant to the solution because I don't know why those numbers would be used.
I'd like if someone could explain what I did wrong in my calculation to get a different answer.
Related
I am studying for my computer architecture exam that is due tomorrow and am stuck on a practice exercise regarding tag size and the total number of cache bits. Here is the question:
Question 8:
This question deals with main and cache memory only.
Address size: 32 bits
Block size: 128 items
Item size: 8 bits
Cache Layout: 6 way set associative
Cache Size: 192 KB (data only)
Write Policy: Write Back
Answer: The tag size is 17 bits. The total number of cache bits is 1602048.
I know that this a failry straight-forward exercise, but I seem to be lacking the proper formulas. I also know that the structure of a N set way associative is |TAG 25 bits|SET 2 bits|OFFSET 5 bits|. And that Tag size = AddrSize - Set - Offset (- item size if any) thus giving the answer of 17 bits tag size.
However, how do I calculate the total number of cache bits please?
cache size in bytes: 192*1024 = 196608
number of blocks: 196608 / 128 = 1536
number of sets: 1536 / 6 = 256
set number bits: log2(256) = 8
offset number bits: log2(128) = 7
tag size: 32-(8+7) = 17
metadata: valid+dirty = 2 bits
total tag + metadata: (17+2)*1536 = 29184 bits
total data: 1536*128*8 = 1572864 bits
total size: 29184 + 1572864 = 1,602,048
There could also be bits used for the replacement policy, but we can assume it's random to make the answer work.
i am really confused on the topic Direct Mapped Cache i've been looking around for an example with a good explanation and it's making me more confused then ever.
For example: I have
2048 byte memory
64 byte big cache
8 byte cache lines
with direct mapped cache how do i determine the 'LINE' 'TAG' and "Byte offset'?
i believe that the total number of addressing bits is 11 bits because 2048 = 2^11
2048/64 = 2^5 = 32 blocks (0 to 31) (5bits needed) (tag)
64/8 = 8 = 2^3 = 3 bits for the index
8 byte cache lines = 2^3 which means i need 3 bits for the byte offset
so the addres would be like this: 5 for the tag, 3 for the index and 3 for the byte offset
Do i have this figured out correctly?
Do i figured out correctly? YES
Explanation
1) Main memmory size is 2048 bytes = 211. So you need 11 bits to address a byte (If your word size is 1 byte) [word = smallest individual unit that will be accessed with the address]
2) You can calculating tag bits in direct mapping by doing (main memmory size / cash size). But i will explain a little more about tag bits.
Here the size of a cashe line( which is always same as size of a main memmory block) is 8 bytes. which is 23 bytes. So you need 3 bits to represent a byte within a cashe line. Now you have 8 bits (11 - 3) are remaining in the address.
Now the total number of lines present in the cache is (cashe size / line size) = 26 / 23 = 23
So, you have 3 bits to represent the line in which the your required byte is present.
The number of remaining bits now are 5 (8 - 3).
These 5 bits can be used to represent a tag. :)
3) 3 bit for index. If you were trying to label the number of bits needed to represent a line as index. Yes you are right.
4) 3 bits will be used to access a byte withing a cache line. (8 = 23)
So,
11 bits total address length = 5 tag bits + 3 bits to represent a line + 3 bits to represent a byte(word) withing a line
Hope there is no confusion now.
I have this problem:
A program that calculates the sum of 128x128 matrix of 32-bit integers (by rows). I have one-way cache that has 8 sets with block size of 64 bytes, considering only the access to the matrix not the instruction.
I should calculate its miss rate.
And also the miss rate by reading the matrix by column. Sorry if there are grammar mistakes, I only translated it to English.
What I've done so far is that (correct me if I'm wrong):
Integer size = 4B
64/4 = 16 (integers inside a block)
128/16 = 8 (blocks per row)
15 hit and 1 miss (each block)
120 hit and 8 miss (each row)
960 hit and 64 miss (all the matrix)
miss rate = 64/1024 = 0.06 = 6%
I get why we have the number 1024 instead of 1000 to use the suffix "kilo" in computing (computer uses base 2, so 2 ^ 10, blah blah blah). So I get the kilo part, but why is it called a kilo - "byte"? To make a kilo - "byte", we need to use bits with 10 digits from 0000000000 to 1111111111. That is not 8 digits, shouldn't it be called something else.
I.e. a kilobyte is not 1024 groupings of 8 bit binary digits, it is 1024 groups of 10 bit binary digits and a megabyte has even more than 10 binary digits - not 8. If asked how many bits are in 1 kilobytes, people calculate it as 1*1024*8. But that's wrong! It should be 1*1024*10.
I.e. a kilobyte is not 1024 groupings of 8 bit binary digits, it is
1024 groups of 10 bit binary digits
You are confusing the size of a byte with the size of the value needed to address those bytes.
On most systems a byte is 8 bits, which means 1000 bytes is exactly 1000*8 bits, and 2000 bytes is exactly 2000*8 bits (i.e. exactly the double, which makes sense).
To address or index those bytes you need 10 bits in the first example (2^10) and 11 bits in the second (2^11 up to 2048 bytes). It wouldn't make a lot of sense if the size of a byte was changing when there are more bytes in a data structure.
As for the 1000 (kilobyte) vs 1024 (kibibyte):
1 kB (kilobyte) = 10^3 = 1000
1 KiB (kibibyte) = 2^10 = 1024
A kilobyte used to be generally accepted as being 1024 bytes. However at some point hard disk manufacturers started to count 1 kB as 1000 bytes (kilo being 1000 which is actually correct):
1 GB = 1000^3 = 1000000000
1 GiB = 1024^3 = 1073741824
Windows still used 1 kB = 1024 bytes to show the hard disk size, i.e. it showed 954MB for 1GB of hard disk space. I remember a lot of customers complaining about that when checking, for example, the size of their 250GB drive which only showed 233GB in Windows.
I'm struggling to solve this question, I've looked around but all of the similar questions are more advanced than mine, making use of logs, it's more advanced than we've done in our class. Here's the question:
Suppose you have a 4-way set associative cache which has in total
4096 bytes of cache memory and each cache line is 128 bytes. How many
sets are there is this cache? If memory is byte addressable and addresses
are 16 bits then how many bytes are used for the tag?
Here's what I have so far:
4096/128 = num lines
4096/128/4 = 8 = num sets (each set is 4 lines in 4-way set assoiative)
So, need 3 bits to choose set (2^3=8)
We have 16-3 = 13 bits left for the tag and word.
Because the question says that memory is byte addressable, I think that this means that the word is 8 bits (= 1 byte) long, and thus the tag is 16-3-8 = 5 bits long.
Although I'm not quite sure about this. Does anyone have a solution to this problem?
If memory is byte addressable
This statement just tell us that the main memory is byte addressable ie., architectures where data can be accessed 8 bits at a time, irrespective of the width of the data and address buses.
This doesn't affect the number of bit the tag has.
Solution:
4-way set associative
Total cache memory = 4096 bytes
Block size(cache line) = 128 byte
Number of cache line = 4096 / 128 = 32 lines
Number of sets in cache = 32 / 4 = 8 sets
╔════════════════════════════╗
║ 16 bit address ║
╠══════════╤════════╤════════╣
║ tag bit? │ 3 bits │ 7 bits ║
╚══════════╧════════╧════════╝
Word offset = log28 = 3 bits
Set offset = log2128 = 7 bits
Answer:
Tag bit = 16 - ( 3 + 7 ) = 6 bits
╔══════════════════════════╗
║ 16 bit address ║
╠════════╤════════╤════════╣
║ 6 bits │ 3 bits │ 7 bits ║
╚════════╧════════╧════════╝
cache capacity is 4096 bytes means (2^12) bytes .
Each Block/line in cache contains (2^7) bytes
-therefore number of lines or blocks in cache is:(2^12)/(2^7)=2^5 blocks or lines in a cache
As it is 4 way set associative, each set contains 4 blocks, number of sets in a cache is :
(2^5)/2^2 = 2^3 sets are there. so from these we got to know that 3 bits are required for adressing set offset.
As it is byte addressable , to address a byte offset we require 7 bits as we have 128(2^7) bytes in each block.
Remaining 6 bits will be allocated for tag.