Direct mapped cache example - caching

i am really confused on the topic Direct Mapped Cache i've been looking around for an example with a good explanation and it's making me more confused then ever.
For example: I have
2048 byte memory
64 byte big cache
8 byte cache lines
with direct mapped cache how do i determine the 'LINE' 'TAG' and "Byte offset'?
i believe that the total number of addressing bits is 11 bits because 2048 = 2^11
2048/64 = 2^5 = 32 blocks (0 to 31) (5bits needed) (tag)
64/8 = 8 = 2^3 = 3 bits for the index
8 byte cache lines = 2^3 which means i need 3 bits for the byte offset
so the addres would be like this: 5 for the tag, 3 for the index and 3 for the byte offset
Do i have this figured out correctly?

Do i figured out correctly? YES
Explanation
1) Main memmory size is 2048 bytes = 211. So you need 11 bits to address a byte (If your word size is 1 byte) [word = smallest individual unit that will be accessed with the address]
2) You can calculating tag bits in direct mapping by doing (main memmory size / cash size). But i will explain a little more about tag bits.
Here the size of a cashe line( which is always same as size of a main memmory block) is 8 bytes. which is 23 bytes. So you need 3 bits to represent a byte within a cashe line. Now you have 8 bits (11 - 3) are remaining in the address.
Now the total number of lines present in the cache is (cashe size / line size) = 26 / 23 = 23
So, you have 3 bits to represent the line in which the your required byte is present.
The number of remaining bits now are 5 (8 - 3).
These 5 bits can be used to represent a tag. :)
3) 3 bit for index. If you were trying to label the number of bits needed to represent a line as index. Yes you are right.
4) 3 bits will be used to access a byte withing a cache line. (8 = 23)
So,
11 bits total address length = 5 tag bits + 3 bits to represent a line + 3 bits to represent a byte(word) withing a line
Hope there is no confusion now.

Related

What is the offset size in FlatBuffers?

The major part of our data is strings with possible substring duplication (eg. domains - "some.thing.com" and "thing.com"). We'd like to reuse the substrings to reduce file size and memory consumption with FlatBuffers, so i'm planning to use [string] as i can just reference to some existing substrings, eg. thing.com will be just a string created with let substr_offset = builder.create_string("thing.com") and "some.thing.com" will be stored as [builder.create_string("some."), substr_offset].
However it seems referencing has the costs, so probably there is no benefit of referencing is the string is too short (less than offset variable size). Is it correct? Is offset type just usize? What are better alternatives for prefix/postfix strings representations with FlatBuffers?
PS. BTW what is string array instead of just string cost? Is it just one more offset cost?
Both strings and vectors are addressed over a 32-bit offset to them, and also have a 32-bit size field prefixed. So:
"some.thing.com" 14 chars + 1 terminator + 4 size bytes == 19.
Or:
"thing.com" 9 chars + 1 terminator + 4 size bytes == 14.
"some." 5 chars + 1 terminator + 4 size bytes == 10.
vector of 2 strings: 2x4 bytes of offsets + 4 size bytes = 12.
total: 36
of those 36, 14 are shared, leaving 22 bytes of unique data which is larger than the original. So the shared string needs to be 13 bytes or larger for this technique to be worth it, assuming it is shared often.
For details: https://google.github.io/flatbuffers/flatbuffers_internals.html
The offset seems to be uint32 (4 bytes, not usize) according to the doc.

Calculating the total data+overhead of a set associative cache

This is a question from a Computer Architecture exam and I don't understand how to get to the correct answer.
Here is the question:
This question deals with main and cache memory only.
Address size: 32 bits
Block size: 128 items
Item size: 8 bits
Cache Layout: 6 way set associative
Cache Size: 192 KB (data only)
Write policy: Write Back
What is the total number of cache bits?
In order to get the number of tag bits, I find that 7 bits of the address are used for byte offset (0-127) and 8 bits are used for the block number (0-250) (250 = 192000/128/6), therefore 17 bits of the address are left for the tag.
To find the total number of bits in the cache, I would take (valid bit + tag size + bits per block) * number of blocks per set * number of sets = (1 + 17 + 1024) * 250 * 6 = 1,536,000. This is not the correct answer though.
The correct answer is 1,602,048 total bits in the cache and part of the answer is that there are 17 tag bits. After trying to reverse engineer the answer, I found that 1,602,048 = 1043 * 256 * 6 but I don't know if that is relevant to the solution because I don't know why those numbers would be used.
I'd like if someone could explain what I did wrong in my calculation to get a different answer.

How to calculate set associative cache size?

A 32-bit processor has a two-way associative cache set that uses the 32 address bits as follows: 31-14 tags, 13-5 index, 4-0 offsets.
Calculate :
The size of the cache line in number of words
The total cache size in bits
I do not understand how to solve it, in my slides there is almost nothing on the set associative caches.
Solutions :
2^3 = 8 words (remaining 3 offset bits removed 2 bits for byte address)
2 * 2^9 * (1 + 18 + 8 * 2^5)
For 1 Shouldn't it be 2^(number of offset bits) so 2^5?
And for 2 what is the formula used?
The size of a word and the smallest entity addressable are not given. But, if we assume that addresses are byte oriented and that a word hold 4 bytes, there are 2^5 bytes/line and 2^3 words
2 * 2^9 * (1 + 18 + 8 * 2^5)
2 (number of ways/sets) * 2^9 (number of sets based on index)
* (1 (valid bit) + 18 (tag size) + 8 (bits/byte) * 2^5 (line size in bytes))

FAT filesystem: calculate the size and search a byte

I have this question in an Operating System test:
Given a disk of 1GB with 16KB blocks:
(1) Calculate the size of the File Allocation Table:
My Answer: since there are 2^16 blocks in the disk, we have a table with 2^16 entry, and every entry needs to store 16 bit (since there are 2^16 different blocks, we need 16 bit to identify each of them). So the size is 2^16 times 16 bit = 2^16 x 2^4 = 2^20 bit = 2^17 byte = 128Kb.
(2) Given the following table, indicate in which block are stored the following byte:
-byte 131080 of FileA starting at block 4.
-byte 62230 of FileB starting at block 3.
Entry Content
0 10
1 2
2 0
3 6
4 1
5 8
6 7
7 11
8 12
So FileA is (4) -> (1) -> (2) but the problem is: since every block is 16Kb = 2^4 x 2^10 byte = 2^14 byte = 16384 byte, block 4 contains from 1 to 16384, block 1 contains from 16385 to 32768, and block 2 from 32769 to 49152, where am I supposed to find the byte 131080???
Where is this wrong??

Set Associative Cache: Calculate size of tag?

I'm struggling to solve this question, I've looked around but all of the similar questions are more advanced than mine, making use of logs, it's more advanced than we've done in our class. Here's the question:
Suppose you have a 4-way set associative cache which has in total
4096 bytes of cache memory and each cache line is 128 bytes. How many
sets are there is this cache? If memory is byte addressable and addresses
are 16 bits then how many bytes are used for the tag?
Here's what I have so far:
4096/128 = num lines
4096/128/4 = 8 = num sets (each set is 4 lines in 4-way set assoiative)
So, need 3 bits to choose set (2^3=8)
We have 16-3 = 13 bits left for the tag and word.
Because the question says that memory is byte addressable, I think that this means that the word is 8 bits (= 1 byte) long, and thus the tag is 16-3-8 = 5 bits long.
Although I'm not quite sure about this. Does anyone have a solution to this problem?
If memory is byte addressable
This statement just tell us that the main memory is byte addressable ie., architectures where data can be accessed 8 bits at a time, irrespective of the width of the data and address buses.
This doesn't affect the number of bit the tag has.
Solution:
4-way set associative
Total cache memory = 4096 bytes
Block size(cache line) = 128 byte
Number of cache line = 4096 / 128 = 32 lines
Number of sets in cache = 32 / 4 = 8 sets
╔════════════════════════════╗
║ 16 bit address ║
╠══════════╤════════╤════════╣
║ tag bit? │ 3 bits │ 7 bits ║
╚══════════╧════════╧════════╝
Word offset = log28 = 3 bits
Set offset = log2128 = 7 bits
Answer:
Tag bit = 16 - ( 3 + 7 ) = 6 bits
╔══════════════════════════╗
║ 16 bit address ║
╠════════╤════════╤════════╣
║ 6 bits │ 3 bits │ 7 bits ║
╚════════╧════════╧════════╝
cache capacity is 4096 bytes means (2^12) bytes .
Each Block/line in cache contains (2^7) bytes
-therefore number of lines or blocks in cache is:(2^12)/(2^7)=2^5 blocks or lines in a cache
As it is 4 way set associative, each set contains 4 blocks, number of sets in a cache is :
(2^5)/2^2 = 2^3 sets are there. so from these we got to know that 3 bits are required for adressing set offset.
As it is byte addressable , to address a byte offset we require 7 bits as we have 128(2^7) bytes in each block.
Remaining 6 bits will be allocated for tag.

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