How can I design my own MAC layer function to access Ethernet chip instead of using altera IP function. My board is DE1-SoC with cyclone V 5CSEMA5F31C6 chip. The pins to access Ethernet chip are made to be HPS pins which I can't assign my own signals to.
It is possible for Cyclone V as well. I have my own Ethernet IP working on the fpga side in a DE1-SOC board using the HPS pins. I used them through the pin multiplexing feature of the hps component. You have to configure them and make the hps boot the preloader code for that configuration. However, you cannot use the DDR feature (consequently you cannot achieve 1Gbps) in the cyclone v (Altera said that).
For the process, you should set the pin multiplexing, generate Qsys and compile Quartus. This process creates the folder spl_bsp. Then you have to create a SD card with the image provided by Altera (the image contains all the partition requiered). After this you are able to make the preloader:
1) bsp-generate-files.exe --settings ./software/spl_bsp/settings.bsp --bsp-dir ./hps_isw_handoff/soc_system_hps_0
2) cd software/spl_bsp/
3) make
4) make uboot
5) alt-boot-disk-util.exe -p preloader-mkpimage.bin -a write -d e // e is the drive of the SD card
6) cp uboot-socfpga/u-boot.img /cygdrive/e
Finally, put the SD card in the fpga kit and programm the FPGA. The HPS boots from the SD card and the pin multiplexing matrix configures the pins for output.
This is possible on the new Arria 10 SoC, but not in Cyclone V. Arria 10 has shared I/Os that are configurable to the HPS or the FPGA.
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What I've been trying to do is send UART communications from an STM32 L152RE Nucleo board to an ESP32, however when I attempt to send these communications I get nothing on the ESP serial monitor. What I am able to see is the STM32 sending messages to its own serial monitor which is great but not what I want.
What I've read so far is that UART 2 is connected to ST-Link so that it can do specifically what I've been witnessing and it explains how this can be reconfigured to allow for the messages to be sent to a peripheral UART device but I'm not sure exactly how to do that.
So in the picture below it says to do this I need to "turn off" SB13 and SB14 and "turn on" SB62 and SB63. I don't really understand how to interpret that, other than to mean "remove resistors from SB13 and SB14 and Place them on SB62 and SB63", is this correct?
I know there are another set of UART pins on the board, can I use those instead somehow?
Your guess ist correct. "SB" means "Solder Bridge". It is just a pair of pads which can be connected with a solder ball, like a simple jumper. Setting SB13 to ON means to connect the pads with a solder ball, setting SB62 to OFF means to remove an existing solder ball connection.
Using a different USART is even easier. Have a look at the STM32L151xE Datasheet to find out that e.g. USART1 is available on pins PA9 (TX) and PA10 (RX). According to user manual of the NUCLEO-L152RE board these pins are available on the ST morpho connector CN10: PA9 at Pin 21 and PA10 at Pin 33.
I have 3 devices(GPS-Rx only, tft display-TxRx and a motor driver-Rx only) that connect only using uart. 2 of which only Tx, while one another has both Tx and Rx. I am using uart 0, for tx-rx peripheral. Flash mode and peripheral usage with device are separated with a push switch.
I also have a micro sd card requirement, so pins of uart1 has to be changed from spi pins.
I am using esp-idf and I am trying to use uart_set_pin. Now I have 2 questions,
How do I set no pin for Tx? Setting "UART_PIN_NO_CHANGE" would set it only to default Tx pin.
Can I use GPIO 16 and 17 for Rx pins of uart1 and uart2 respectively?
I'm using a board with the next GPIO as the image:
Also im ussing a TTL to RS-485 module at 5V with chipset MAX485.
ESP32
MAX485
RX
DI
TX
RO
15
DE & RE
When I add the line to init uart, the board doesn't reply more.
from machine import UART
print("hello")
uart = UART(1,baudrate=9600, bits=8, parity=None, stop=1, rx=3,tx=1)
print("bye")
As anyone know about what I'm doing bad?
many thanks
Seems that board shares the tx+rx pins 1&3 with the usb debug, cause of that i lost my com with the esp32 and is the cause of "no response"
I found on https://github.com/Xilinx/XilinxBoardStore/blob/2020.1.1/boards/Xilinx/au50/production/1.0/part0_pins.xml
two pin names I dont understand. What are purpose of
<pin index="9" name ="FPGA_TXD_MSP" iostandard="LVCMOS18" loc="BB25"/>
<pin index="10" name ="FPGA_RXD_MSP" iostandard="LVCMOS18" loc="BB26"/>
in line 29?
Best'
I have found some information about the pin on the alveo product guide, section Maintenance Connector Interface, which I quote:
The Alveo U50 accelerator card provides access to the FPGA through the
JTAG interface using a debug and maintenance board (DMB) connected to
the 30-pin maintenance connector. The connector pinout supports three
UART debug interfaces: PMBus, FPGA JTAG, and satellite controller
JTAG.
(From here you can dive deeper into the UG1377)
By looking at another u50 alveo PG we can find more info about the satellite controller (page 5).
A TI MSP432 satellite controller resides on the U50/U50 LV card to
control and monitor voltages, currents and temperatures
By looking at the picture, , it seems that the PINs you are searching for are UART pins (TX,RX) to communicate to the TI satellite controller from directly the FPGA.
I have a MicroZed board with Xillinux 1.3 running on it. I wanted to interface an external SPI ADC to it, and write an application in linux to read values from the ADC. Zynq device's hardware SPI interface isn't enabled in Xillinux. How can I go about enabling it, I would have to recompile the FSBL and U-boot, but I don't know where to start. Can I just modify the Xillinux's Vivado design and proceed from there or will I have to start from scratch?
You should not have to modify FSBL or U-boot. You should only have to add the SPI controller to the device tree and update the programmable logic so that the SPI pins connect to your ADC.
Xilinx SDK has tools for creating the device tree file, described on the Build Device Tree Blob page.
I usually edit .dts files by hand, but you still need to run dtc to convert them to binary format as described on that page.
For an example, here is a .dts fragment for a zynq-zc770-xm013.dts board enabling SPI connected to a flash chip:
&spi0 {
status = "okay";
num-cs = <4>;
is-decoded-cs = <0>;
eeprom: at25#0 {
at25,byte-len = <8192>;
at25,addr-mode = <2>;
at25,page-size = <32>;
compatible = "atmel,at25";
reg = <2>;
spi-max-frequency = <1000000>;
};
};
you have to do 2 steps.
1- modify the hardware descriptor file (.h) of your board in your kernel sources and add the spi device. First, take a look at the schematic of the board and the datasheet of the processo to make sure to use the right device with the right name
2- add spidev on your kernel config
now build and boot the kernel, if you check on /dev/ you should find spidev** something.