Ethernet Media-Independent Interface Management Control results in "link down" - vhdl

I am working on an Ethernet driver for the Digilent Nexys4 board (Artix7 FPGA). I have written a VHDL component to communicate with the LAN8720A PHY in MDIO protocol. It works well, When I send a frame asking to write in a register, I can read the value I wrote. But when I ask to read the Basic Status Register, it returns a link down status.
That means the Ethernet link is down and I cannot send Ethernet frames. I have absolutely no idea of why I have the link down status. Even when I let the auto-negociation enabled, after the auto-negiacion is over when I try to send a frame, I have a link down status.
Does anyone have an idea of why this is happening and maybe how I can fix this ?
Thanks.
EDIT : it seems it is because of the DATA_VALID signal of the LAN8720A. Does anyone know how can I set the signal to '1' ?
EDIT2 : for more precisions, DATA_VALID is an internal signal of the LAN8720A. It is used to pull up or down the link state bit of the status register.

I have found a solution to my problem : I did not respect the interframe time. Now that I respect the interframe time, the link state does not go down, it stays up. Though the frame is still not sent, it is a great step forward.

Related

Cypress S25FL256S Flash memory read delay issue

I am currently using an s25fl256s flash memory, but when I try accessing it (using an SPI master on an Artix7 FPGA) the first read access has a delay of 19 clock cycle (more or less) and afterward the data is received correctly, does anyone know what causes the delay on the first read access ? according to the datasheet there should be no delays : https://www.infineon.com/dgdl/Infineon-S25FL128S_S25FL256S_128_Mb_(16_MB)_256_Mb_(32_MB)_3.0V_SPI_Flash_Memory-DataSheet-v18_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfb6a64a17
I was expecting to start receiving the data on the first sclk rising edge that follws the LSB of my adress
Be sure to observe the power up delay, tPU, describe on page 33 of the datasheet before trying to communicate with the device.

Writing to a peripheral in Vivado and then outputting to a LED

I want to create a basic project in Vivado that takes a value that i input to a client, which is sent to a server I made (in C), and then the server writes that value to a peripheral in Vivado, and then that data in the peripheral is sent to an output pin that assigns to LED's, making the LED light up.
Basically I want to go from client-->server-->peripheral-->LED lights up
For example, in the client (a GUI) I want to give it a value such as 0011, which is received by the server. Then the server writes that value to the peripheral which will then make, in this case, LED0 & LED1 not light, but LED2 & LED3 will light.
I know how to make an AXI4 peripheral in Vivado, and the client-server (TCP/IP) has been made. My question is what code/design block I would need to then take the data written to the peripheral and assign it to the LED's?
Should I make the peripheral a Master or Slave? Overall confused how should i proceed from here. I am using a Red Pitaya (Xilinx Zynq 7010 SoC) connected by an Ethernet cable to my computer.
Also, I thought of running the program on the Red Pitaya by loading the bitstream on to it (using WinSCP) by running the command
cat FILE_NAME.bit > /dev/xdevcfg
in PuTTY (connected to the Pitaya by IP address), then running the server on the pitaya, and then sending the signal from the client for the server to receive. Is that the correct way of approaching it?
If my logic is off in anyway please let me know
I am somewhat thrown by your statements.
First you say "I know how to make an AXI4 peripheral in Vivado"
Next I read: "Should I make the peripheral a Master or Slave?"
Maybe I am wrong but to me it says you don't really know what you are doing.
Simplest is to:
Instance a zynq system.
Add the IP with the name "AXI GPIO". (Which, by the way, is an AXI slave.)
Run the auto connection.
Assign the right I/O pins to the GPIO port. (check your development system manual)
Build the system.
By the way you find the address of the peripheral in the address tab and it normally is 0x0080000000.
You wrote that you made a server (TCP/IP). "All" it has to do is write the received value to a register in the GPIO block. (Here I assume Xilinx has a document which describes how the GPIO block works and has example GPIO drivers.)

MCP2515 & ATMEGA328 SPI peculiarity

I am facing a CAN bus communication problem to which I don't know the reason. I have MCP2515 as a SPI->CAN interface connected to the MCP2551 (in the past) and now the TI's HVD256.
Currently, the components are connected as depicted in the schema. SCK, MOSI, MISO and CAN-CS are connected to the appropriate pins of the AVR.
schematic + oscilloscope screenshots
The problem lies in the fact, that the CAN communication sometimes work and sometimes does not while the latter prevails significantly. Sometimes I even get no response from the MCP2515 while the MISO (green) signal looks like on the left oscilloscope screenshot.
I've been even recommended to try using pull-downs or pull-ups on the MISO line (which I've never encountered before); then the signal is on the right.
Any idea why that may be happening?
There is also a secondary problem - in the rare case the MCP2515 communicates well over the SPI, content of all registers make sense, there is no signal/data on the TX pin which goes out to the consequent MCP2551 (or HVD256). The output is either 0V or +5V but no data.
Many thanks for any clues!!
-blume-
Do you have resistors between CanLo/CanHigh on the line? It should be there at least on one end of the line.
See here: SN65HVD256 with MCU example schematics
As far as I know, the pull-downs are supposed to be there by the specification. 120 Ohm resistor is a common nominal, I guess.

I cannot get the Xilinx uartlite IP to work

Im attempting to use the Xilinx uartlite 2.0 IP with an AXI4-lite interface to transmit a byte without a microblaze processor. Unfortunately, all the ready signals remain low after I set the data and valid signals and the tx signal never transmits.
I've included my simulation results. any ideas?
For posterity, Had to invert the reset and ensure all the inputs were initialized. Thank you for the helpful comments. I've attached a working simulation

Is it possible to query serial port tx pin status (signal low / high) in windows?

Is it possible to query serial port tx (send) pin status if it is active or not ?
For example when issuin break command (SetCommBreak) tx pin is set to active (low). I'd like to know when it is active or not. Thanks.
No. (at least not likely)
If you are using the "16550" family of UARTs, then I am confident that you can not query the serial port tx pin status. Of course, if you are using some new version or other UART family, maybe.
You can assume that the TX pin is in the SPACE state ('0', +Volts) whilst performing SetCommBreak(), but I suspect that is not enough for you.
If you are look to debug your code to know if a break occurred, you can short pins 2 & 3 on a 9-pin D-sub, thus loop backing the transmit to the receive. A paper clip will do. Your receive code would detect the incoming BREAK. Shorting to the incorrect pin does not cause a lasting problem with a conforming serial port, but be careful. Try this first with simple data, before testing BREAK condition.
If you have a "16550"-like UART.
You can put the UART into loop-back mode and see if you receiving you own outgoing BREAK signal. Its somewhat complicated in current PCs. Other UART type may support loop-back.

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