Recently, I am working on GNU Make.So I wrote such a file:
SOURCE_FILES := $(wildcard src/*.c)
OBJECT_FILES := $(SOURCE_FILES:src/%.c=dist/%.o)
all: ${OBJECT_FILES}
cc -o main $?
${OBJECT_FILES} : dist/%.o : src/*.c
cc -c $? -o $#
But I got the error below:
cc -c src/demo.c src/main.c -o dist/demo.o
cc -c src/demo.c src/main.c -o dist/main.o
cc -o main dist/demo.o dist/main.o
clang: error: no such file or directory: 'dist/demo.o'
clang: error: no such file or directory: 'dist/main.o'
clang: error: no input files
My question is, now that, the target is individual for target static pattern matching.
Why the $? refer to all the prerequisites?
How to get the prerequisites for individual target in static pattern matching？
I found the $< special automaic variable.
That works!
Related
So I have been searching and looking for something that could help me with the Makefile, but I did not find anything, so thats why I am here.
My makefile right now is like this:
CC = gcc
CFLAGS = -Wall
LDFLAGS += -L$(LIBB)
LDFLAGS += -static lib1.h
LDLIBS = -lm -lpthread -lrt -l
SOURCES=lib1.c prac3.c prac3_reader.c
LIBRARIES=lib1.o
INCLUDES=lib1.h
PROGRAMS=prac3 prac3_reader
all: $(OBJS) $(PROGRAMS)
$(PROGRAMS): $(LIBRARIES) $(INCLUDES)
$(CC) $(LDFLAGS) $(LIBRARIES) $(LDLIBS) $#.o -o $#
%.o: %.c $(INCLUDES)
$(CC) $(CFLAGS) -o $# -c $<
clean:
rm -rf *.o *~ $(PROGRAMS)
I know there are probably a lot of things that can be removed, but I do not really know which ones are. I have two programs called
prac3.c
and
prac3_reader.c
Also, I have my own library called
lib1.c
and also compiled like
lib1.h
When I go to my directory with the terminal and use the command make I recive this error:
gcc -L -static lib1.h lib1.o -lm -lpthread -lrt -l prac3.o -o prac3
/usr/bin/ld: no se puede encontrar -lprac3.o
collect2: error: ld returned 1 exit status
Makefile:15: recipe for target 'prac3' failed
make: *** [prac3] Error 1
I am running on Ubuntu.
The -l flag expects an argument. When it is combined in the gcc statement it causes the prac3.o argument to be considered as the name of a library. There is no such library prac3.o, so you get the error.
In general .o files aren't "libraries". They are object files. Remove the -l flag and you will be fine.
"libraries" are generally .a or .so files from a library path - but even then, you wouldn't specify the suffix (.e.g "-lpthreads").
I have an object file main.o, and need to link it against a shared library at ./libsvm/libsvm.so.2. I have the following Makefile but it doesn't work for me. Library path has been specified in -L./libsvm but gcc -lsvm still can't find the shared library (libsvm.so.2).
This is my Makefile:
CC = g++ -g
CFLAGS = -Wall
HEADERS = -I./libsvm
OBJ = main.o
LIBS = -L./libsvm
all: lib $(OBJ)
$(CC) $(LIBS) -lsvm $(OBJ) -o main
%.o: %.c
$(CC) $(CFLAGS) $(HEADERS) -c -o $# $<
lib:
cd libsvm; make
It just works if link them directly, as in
ld main.o libsvm/libsvm.so.2 -o main
I wonder what's wrong in the Makefile. Error message is the following
g++ -g -L./libsvm -lsvm main.o -o main
ld: library not found for -lsvm
clang: error: linker command failed with exit code 1 (use -v to see invocation)
make: *** [all] Error 1
-lsvm means use the file svm.so
But your library file has name svm.so.2. (Version 2)
So either rename or make a symbolic link with
ln -s svm.so.2 svm.so
Now the makefile should work.
I have a makefile that contains this code
all: hello.exe
hello.exe: hello.o
gcc -o hello.exe hello.o
hello.o: hello.c
gcc -c hello.c
clean:
rm hello.o hello.exe
When i write this command
mingh32-make
I got this:
mingw32-make : *** No targets specified and no makefile found. Stop.
You can solve this in 2 ways.
As the commenters say, rename your file from makefile.txt to makefile.
Another way, use mingw32-make -f makefile.txt
Thanks!, I have updated my makefile now. And the .o are created in the src directory.
here is the makefile and output. The makefile throws the error because all the .o are created in the src folders. I don't know why? I am new to Makefile so kindly please bear with my silly questions.
# This is the Vpath; as my source directory is in the src folder - all the .c files
#folder structure
#Gif_Utility
#-->src/*.c
#-->include/*.h
VPATH = src:include:objects
CFLAGS = -I ./include -g -Wall -DDEBUG
OBJS =./objects
# Look at the CFLAGS here; it has -DDEBUG because in my code, I have #ifdef DEBUG
# Look at the CFLAGS here; -Wall : To generate all the compiler warnings.
# include is required as my compilation depends on the .h files.
# The LD flags to link the shared objects
#LDFLAGS=
#in my mini-project, I am using maths library, Thus, I have lm.
# lc to link my main function with crt1.o
#what is the compiler, am I using.
#This is a good practice since I can modify these flags when cross-compiling.
cc= gcc
#PATH for the LIBS
#This might be useful while cross-compiling.
LIBS= -lm -lc
target: $(patsubst %.c,%.o,$(wildcard ./src/*.c))
#echo "making target"
#mkdir -p ./objects
$(cc) $(patsubst ./src/%.c,./objects/%.o,$(wildcard ./src/*.c)) $(LIBS) -o gif
./objects/%.o: ./src/%.c
#echo "making objects now"
$(cc) $(CFLAGS) $(LDFLAGS) -c $< -o $#
#It is always better to write a PHONY rule for a rules like clean.
#It may happen that in source sandbox, you have a clean file. This may invoke the clean file.
#In order to prevent invoking a clean file during make clean; We give this general rule as PHONY
#PHONY tells the MAKEFILE that there is a rule clean, not a file called clean.
#Generally use PHONY for all, install, clean, distclean,
.PHONY: clean
clean:
#echo "cleaning everything"
#rm -f *.o
#rm -f gif
#echo "clearning .o from src"
#rm -f ./src/*.o
#rm -f ./objects/*.o
$make target
cc -I ./include -g -Wall -DDEBUG -c -o src/sysm.o src/sysm.c
cc -I ./include -g -Wall -DDEBUG -c -o src/x86_main.o src/x86_main.c
src/x86_main.c:11:9: warning: second argument of ‘main’ should be ‘char **’ [-Wmain]
src/x86_main.c: In function ‘main’:
src/x86_main.c:16:9: warning: implicit declaration of function ‘display_init’ [-Wimplicit-function-declaration]
src/x86_main.c:19:9: warning: implicit declaration of function ‘Gif_Read’ [-Wimplicit-function-declaration]
making target
gcc ./objects/gif_display.o ./objects/gif_lzw.o ./objects/gif_read.o ./objects/sysm.o ./objects/x86_main.o -lm -lc -o gif
gcc: error: ./objects/gif_display.o: No such file or directory
gcc: error: ./objects/gif_lzw.o: No such file or directory
gcc: error: ./objects/gif_read.o: No such file or directory
gcc: error: ./objects/sysm.o: No such file or directory
gcc: error: ./objects/x86_main.o: No such file or directory
make: *** [target] Error
You need to fix your patsubst to change the directory part of the filenames as well as the suffixes:
$(patsubst ./src/%.c,./objects/%.o,$(wildcard ./src/*.c))
You have other issues in your makefile too, e.g. this target has the wrong prerequisite:
./objects/%.o: %.c
The source file should be something like ./src/%.c
And the rule for that target is wrong, it outputs to ./objects/$# which would expand to something like ./objects/./objects/x86_main.o
I am having trouble compiling using make in windows 7 with gcc and the gsl library. It occurs only when using make (when I type the compilation commands manually into the cmd line, it compiles correctly). I found some posts where people had similar errors from gcc, but none where it worked when typing normally, but not when using make. The contents of my Makefile are shown below:
#Compiler
COMP=gcc
# Compiler Flags. -Wall turns on all warnings
FLAGS=-Wall
# GSL include file dir
INCLUDES=GnuWin32/include
# GSL Libraries directory
LIB=GnuWin32/lib
# Library Flags
LFLAGS=-lgsl -lgslcblas -lm
# Target Program
EXE=ex2.1.exe
# Dependencies needed for $(PROGRAM)
OBJ=ex2.1.o
# List of source files for objects
SRC=ex2.1.c
# List with types of files to be cleared by clean:
TRASH=*.exe *.o
# I/O files to be cleaned with 'very clean' target
#IOFILES= *.dat *.out *.csv *.mod
all: $(SRC) $(EXE)
$(EXE): $(OBJ)
$(COMP) -L/$(LIB) $(OBJ) $(LFLAGS) -o $(EXE)
$(OBJ): $(SRC)
$(COMP) -I/GnuWin32/include -c ex2.1.c
#$(COMP) -I/$(INCLUDES) -c $(SRC)
clean:
del $(TRASH)
If I type make with only the ex2.1.c present in the directory, I get the following output and error:
gcc -I/GnuWin32/include -c ex2.1.c
gcc: error: CreateProcess : No such file or directory
make: *** [ex2.1.o] Error 1
However, if I first type "gcc -I/GnuWiun32/include -c ex2.1.c", ex2.1.o is created successfully with no error. If then type 'make' I get the following output/error:
gcc -L/GnuWin32/lib ex2.1.o -lgsl -lgslcblas -lm -o ex2.1.exe
gcc: fatal error: -fuse-linker-plugin, but liblto_plugin-0.dll not found
compilation terminated
make: *** [ex2.1.exe] Error 1
But if I manually enter "gcc -L/GnuWin32/lib ex2.1.o -lgsl -lgslcblas -lm -o ex2.1.exe" then the executable compiles and runs like it should, so the problem seems to be with how make is calling gcc? My PATH variable contains the paths to both make.exe as well as gcc.exe, so I am not sure what I do not set up correctly. Does anyone have an idea of what may be wrong? Thanks.