Blinking LED on MPLAB not Working ? - pic

am using MPLAB to program my new microchip board and programming it programming it using pickit3
code:
// Include the necessary device header file
#include <p18f8722.h>
#pragma config OSC = HSPLL, //OSCS = OFF // HS-PLL Enabled, Internal External Osc. Switch Over OFF Disabled
#pragma config PWRT = OFF // Power Up Timer: OFF Disabled
//#pragma config BOR = OFF, BORV = 25 // Brown Out Reset: OFF, Brown Out Voltage: OFF Disabled
#pragma config WDT = OFF, WDTPS = 128 // Watchdog Timer: OFF Disabled, Watchdog Postscaler: 1:128
//#pragma config CCP2MUX = OFF // CCP2 Mux: OFF Disabled (RB3)
//#pragma config STVR = OFF // Stack Overflow Reset: OFF Disabled
#pragma config LVP = OFF // Low Voltage ICSP:OFF Disabled
#pragma config DEBUG = ON // Background Debugger Enable: OFF Disabled
#pragma config CP0 = OFF, CP1 = OFF, CP2 = OFF, CP3 = OFF // Code Protection Block 0-3: OFF Disabled
#pragma config CPB = OFF // Boot Block Code Protection: OFF Disabled
#pragma config CPD = OFF // Data EEPROM Code Protection: OFF Disabled
#pragma config WRT0 = OFF, WRT1 = OFF, WRT2 = OFF, WRT3 = OFF // Write Protection Block 0-3: OFF Disabled
#pragma config WRTB = OFF // Boot Block Write Protection: OFF Disabled
#pragma config WRTC = ON // Configuration Register Write Protection: OFF Disabled
#pragma config WRTD = OFF // Data EEPROM Write Protection: OFF Disabled
#pragma config EBTR0 = OFF, EBTR1 = OFF, EBTR2 = OFF, EBTR3 = OFF // Table Read Protection Block 0-3: OFF Disabled
#pragma config EBTRB = OFF // Boot Block Table Read Protection: OFF Disabled
// Function prototypes
void delay1(void);
// Main code section. Execution starts here.
void main(void){
// First some setup code for the LED
// The LED will be driven by port D, bit 0, driving the anode, cathode to ground
// First we should clear the port D, bit 0 data latch
LATDbits.LATD0=0;
// We need to set port D, bit 0 as an output
// Using TRISDbits instead of TRISD allows isolating a single bit leaving the other bits unchanged
TRISDbits.TRISD1=0; // 0 = output, 1 = input
// Set port D, bit 0 to off (driving the LED anode, cathode to ground)
PORTDbits.RD1=0;
// LED blinking loop that never ends since '1' never changes
while(1){
PORTDbits.RD1=1; // turn the LED on
delay1(); // call the delay function
PORTDbits.RD1=0; // turn the LED off
delay1(); // call the delay function
}
// end of main, but we will never get this far (endless loop)
}
// Start of our functions
void delay1(void){
/*
It is important to note that all variable declarations need to be placed before any code in
a function or the build will fail.
*/
// declare a long integer and set it to zero
long int loop1=0;
// count from zero to 30,000 then continue on
// Lower than 30000 for a faster blink, higher for a slower blink.
for(loop1=0;loop1<=30000;loop1++){
}
// The loop is done and execution has moved past the loop
}
this code didn't do anything , it compiled perfectly on high tech C compiler but it didn't workout as it was expected ,
maybe the problem is in the configuration bit ? any idea how to solve this ?

Judging by the controller and port, I am guessing that you are using the PIC18 Explorer board. If so, please verify that jumper JP1 is in place. This must be in place when using the onboard LED's.
If it is not this board, then could you be using the wrong port? For instance, the "low pin count" demo board I received with my pickit has the LED's on port C, not D.

Check if that pin also has an analog capability (ANx).
If it's the case, analog is the default setting and you cannot drive the pin. You should set it in digital mode first.

Related

dsPIC33 Flash Erase broken

I am having a lot of trouble when it comes to flash erasing on the dsPIC33EP64GP503 and I am hoping someone on here will be able help.
I am wanting to store a data struct in the flash program memory of the device. I am having trouble when it comes to erasing the flash though. I need to erase it and re-write it when the data changes.
I am padding the rest of the page with 0s so it can be safely erased.
I can write to the same memory location of the struct. When doing a flash write onto the start of the struct, the byStructValid turns into 0x11 (I know this is all very bad, because it is writing double word. But I am just trying to get the flash operations working first), however when I do an erase nothing happens. Is someone able to figure out what I am doing wrong?
I initialised the struct with 0xFF's and tried to perform a flash write. This was successful as the CAN message I received showed the data changed from 0xFF to 0x11.
I then tried to do a flash erase, but nothing happened. The device just carried on as normal. I don't have access to debug so it is hard to fully understand what is going on during this time.
I have tried moving the struct location around, so that it is on an 'even' page boundary (as specified in the datasheet) but this hasn't worked either.
I have also tried using an assembly version of the erase function, provided by the datasheet, this also doesn't work. The device just carries on as though there was no command for flash erase.
Below are some snippets of code that I have been using.
Any help would be greatly appreciated, thank you.
Note: I am unable to use the debugger. I use CAN messages to periodically send ‘debug’ messages, which contain data that is read from the flash location. This is so I can see if the write/erases are working.
#define MEMORY_USER_CALIBRATION_LOC 0x006000
typedef struct
{
byte byStructValid;
byte abyStructData[3];
}stFlashStruct_t;
volatile const __prog__ stFlashStruct_t stFlashStruct __attribute__((space(prog), address(MEMORY_USER_CALIBRATION_LOC))) =
{
.byStructValid = 0xFF,
.abyStructData = {50, 10, 20},
};
const byte padding[_FLASH_PAGE*2 - sizeof(stFlashStruct_t)] __attribute__((space(prog), address(MEMORY_USER_CALIBRATION_LOC + sizeof(stFlashStruct_t)))) = {0};
//FLASH Write
void FLASH_WriteDoubleWord(dword address, dword data[2])
{
word INTCON2Save;
word i;
//set WREN and ERASE settings for operation
NVMCON = 0x4001;
TBLPAG = 0xFA;
//set address to erase
NVMADR = address & 0xFFFF;
NVMADRU = (address >> 16) & 0x3F;
for (i = 0; i < 2; i++)
{
__builtin_tblwtl(i*2, data[i] & 0xFFFF);
__builtin_tblwth(i*2, (data[i] >> 16) & 0xFF);
}
//save the interrupt register
INTCON2Save = INTCON2;
// Disable interrupts for NVM unlock
__builtin_disable_interrupts();
__builtin_write_NVM();
// Start write cycle
while(NVMCONbits.WR == 1);
//restore interrupts
INTCON2 = INTCON2Save;
}
//FLASH Erase
void FLASH_ErasePageC(dword dwAddress)
{
word INTCON2Save;
//set WREN and ERASE settings for operation
NVMCON = 0x4003;
//set address to erase
NVMADRU = (dwAddress >> 16) & 0x3F;
NVMADR = dwAddress & 0xFFFF;
//save the interrupt register
INTCON2Save = INTCON2;
__builtin_disable_interrupts();
// Disable interrupts for NVM unlock
__builtin_write_NVM();
// Start write cycle
while(NVMCONbits.WR == 1);
//restore interrupts
INTCON2 = INTCON2Save;
}
byte temp_flash_write(void)
{
dword new_data[2] = {0x1111, 0x1111};
FLASH_WriteDoubleWord(&stCustomerCalibration, new_data);
return 0;
}
Your "dsPIC33 Flash Erase broken" issue is one of not understanding just how badly the Run Time Flash Programming (RTFP) method is described in the Microchip dsPIC33EP64GP503 data sheet and family reference manuals.
This post will not explain how any of this works. It does work but is really hard to comprehend.
What will be hard for you is that a program flash word can only be written one time after an erase. Writing to the same program flash word a second time will corrupt it and the next time it is read an ECC trap error will assert.
Attached is example code that allocates a 1024 instruction word page at address 0x6000. Declares a structure at the start of that page that is 2 instruction words in size. The code then erases that page then writes different data to the first 2 instruction words in that page.
/*
* File: main.c
* Author: Dan1138
*
* Description:
* Example for Run Time Self Programming (RTSP).
* This is very limited, useful as a test bench but not much more.
*
* Created on December 10, 2022, 2:05 PM
*/
/* Define the system oscillator frequency this code must configure */
#define FSYS (7372800ul)
#define FCY (FSYS/2ul)
// DSPIC33EP64GP503 Configuration Bit Settings
// 'C' source line config statements
// FICD
#pragma config ICS = PGD1 // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
#pragma config JTAGEN = OFF // JTAG Enable bit (JTAG is disabled)
// FPOR
#pragma config ALTI2C1 = OFF // Alternate I2C1 pins (I2C1 mapped to SDA1/SCL1 pins)
#pragma config ALTI2C2 = OFF // Alternate I2C2 pins (I2C2 mapped to SDA2/SCL2 pins)
#pragma config WDTWIN = WIN25 // Watchdog Window Select bits (WDT Window is 25% of WDT period)
// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128 // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON // PLL Lock Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)
// FOSC
#pragma config POSCMD = NONE // Primary Oscillator Mode Select bits (Primary Oscillator disabled)
#pragma config OSCIOFNC = ON // OSC2 Pin Function bit (OSC2 is general purpose digital I/O pin)
#pragma config IOL1WAY = OFF // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECMD // Clock Switching Mode bits (Clock switching is enabled,Fail-safe Clock Monitor is disabled)
// FOSCSEL
#pragma config FNOSC = FRC // Oscillator Source Selection (Internal Fast RC (FRC))
#pragma config IESO = ON // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)
// FGS
#pragma config GWRP = OFF // General Segment Write-Protect bit (General Segment may be written)
#pragma config GCP = OFF // General Segment Code-Protect bit (General Segment Code protect is Disabled)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
#include <xc.h>
#include <libpic30.h>
#define MEMORY_USER_CALIBRATION_LOC (_FLASH_PAGE * 24)
typedef struct
{
uint8_t byStructValid;
uint8_t abyStructData[3];
} stFlashStruct_t;
volatile const __prog__ __attribute__((space(prog), address(MEMORY_USER_CALIBRATION_LOC))) union
{
uint16_t words[_FLASH_PAGE]; /* reserve the entire erase page. Note only the low 16-bits of the instruction word can be accessed with this method. */
struct {
stFlashStruct_t stFlashStruct; /* calibration structure */
};
} CalSpace =
{
.stFlashStruct.byStructValid = 0xFF,
.stFlashStruct.abyStructData = {50, 10, 20},
};
int main(void)
{
volatile stFlashStruct_t ReadBack;
/*
* application initialization
*/
ReadBack.byStructValid = CalSpace.stFlashStruct.byStructValid;
ReadBack.abyStructData[0] = CalSpace.stFlashStruct.abyStructData[0];
ReadBack.abyStructData[1] = CalSpace.stFlashStruct.abyStructData[1];
ReadBack.abyStructData[2] = CalSpace.stFlashStruct.abyStructData[2];
__builtin_software_breakpoint(); /* breakpoint here to inspect the ReadBack structure with the debugger */
Nop();
Nop();
/* Erase 1024 instruction words starting at address MEMORY_USER_CALIBRATION_LOC */
NVMCON = 0x4003;
NVMADR = __builtin_tbloffset(&CalSpace);
NVMADRU = __builtin_tblpage(&CalSpace);
__builtin_disi(5); // Disable interrupts for NVM unlock
__builtin_write_NVM(); // Start write cycle
while(NVMCONbits.WR == 1);
ReadBack.byStructValid = CalSpace.stFlashStruct.byStructValid;
ReadBack.abyStructData[0] = CalSpace.stFlashStruct.abyStructData[0];
ReadBack.abyStructData[1] = CalSpace.stFlashStruct.abyStructData[1];
ReadBack.abyStructData[2] = CalSpace.stFlashStruct.abyStructData[2];
__builtin_software_breakpoint(); /* breakpoint here to inspect the ReadBack structure with the debugger */
Nop();
Nop();
/* Update data in structure to be written */
ReadBack.byStructValid = 1;
ReadBack.abyStructData[0] = 2;
ReadBack.abyStructData[1] = 3;
ReadBack.abyStructData[2] = 4;
/* Write 2 instruction words starting at address MEMORY_USER_CALIBRATION_LOC */
NVMCON = 0x4001; // Set WREN and word program mode
TBLPAG = 0xFA; // write latch upper address
NVMADR = __builtin_tbloffset(&CalSpace.stFlashStruct);
NVMADRU = __builtin_tblpage(&CalSpace);
__builtin_tblwtl(0,*((uint16_t *)(&ReadBack)+0)); // load low 16-bits of first instruction word
__builtin_tblwth(0,0x00); // make high 8-bits of first instruction word zero
__builtin_tblwtl(2,*((uint16_t *)(&ReadBack)+1)); // load low 16-bits of second instruction word
__builtin_tblwth(2,0x00); // make high 8-bits of second instruction word zero
__builtin_disi(5); // Disable interrupts for NVM unlock sequence
__builtin_write_NVM(); // initiate write
while(NVMCONbits.WR == 1);
ReadBack.byStructValid = CalSpace.stFlashStruct.byStructValid;
ReadBack.abyStructData[0] = CalSpace.stFlashStruct.abyStructData[0];
ReadBack.abyStructData[1] = CalSpace.stFlashStruct.abyStructData[1];
ReadBack.abyStructData[2] = CalSpace.stFlashStruct.abyStructData[2];
__builtin_software_breakpoint(); /* breakpoint here to inspect the ReadBack structure with the debugger */
Nop();
Nop();
/*
* Application process loop
*/
for(;;)
{
Nop();
Nop();
Nop();
__delay_ms(100);
}
}

PIC24FJ128GB204 - DeepSleep problems: Can't resume code after DeepSleep + Can't go in DeepSleep more then 1 time

Actually I'm using a PIC24FJ128GB204 and I've have problems with DeepSleep.
My device is composed by 4 buttons and several LED (a colored torch). Have a button that make device Sleep until I want to use it, same button wakes up my device.
Consumption will all LED are off is 10mA.
I've tried Sleep mode, simply function that goes in basic sleep and than wakeup after selected pin is asserted. Measuring consumption in Sleep mode I've 2.50mA. Working very well.
I've started to work with DeepSleep, since I don't need any code retention and just need to keep my device in lowest possible consumption state (but avoiding to use a slide power switch). I've used Datasheet example codes to implement my function. As result I can enter in this state and than I've 0.45mA as consumption.
I've set an INT0 (as datasheet suggested) to wake up my device and associated it to correct wakeup PIN.
Problems starts now:
When I press wakeup button, my consumption goes to 10mA as normal, but I can't light ON any led. Seems that my device is not responsive.
If I press again Sleep button, my device goes in Sleep mode and not DeepSleep since my consumption back to 2.50mA. Again, if I wake up my device, it wakes up but are not responsive. Doesn't metter how much time I try again, but my device never go again to DeepSleep untill I power off and on again my device.
I've performed some test but can't understand what happen. Maybe after DeepSleep device should be manually reset (tried without success) or maybe some configuration bit need to be set again. Or maybe configuration bits are uncorrect?
Here's interested parts of code:
CONFIGURATION
// CONFIG4
#pragma config DSWDTPS = DSWDTPS3 // Deep Sleep Watchdog Timer Postscale Select bits (1: 256 (8.3 mS))
#pragma config DSWDTOSC = LPRC // DSWDT Reference Clock Select (DSWDT uses LPRC as reference clock)
#pragma config DSBOREN = ON // Deep Sleep BOR Enable bit (DSBOR Enabled)
#pragma config DSWDTEN = OFF // Deep Sleep Watchdog Timer Enable (DSWDT Disabled)
//#pragma config DSSWEN = OFF // DSEN Bit Enable (Deep Sleep operation is always disabled)
#pragma config DSSWEN = ON // DSEN Bit Enable (Deep Sleep is controlled by the register bit DSEN)
#pragma config PLLDIV = DIVIDE2 // USB 96 MHz PLL Prescaler Select bits (Oscillator input divided by 2 (8 MHz input))
#pragma config I2C1SEL = DISABLE // Alternate I2C1 enable bit (I2C1 uses SCL1 and SDA1 pins)
#pragma config IOL1WAY = ON // PPS IOLOCK Set Only Once Enable bit (Once set, the IOLOCK bit cannot be cleared)
// CONFIG3
#pragma config WPFP = WPFP0 // Write Protection Flash Page Segment Boundary (Page 0 (0x00))
#pragma config SOSCSEL = ON // SOSC Selection bits (SOSC circuit selected)
#pragma config WDTWIN = PS25_0 // Window Mode Watchdog Timer Window Width Select (Watch Dog Timer Window Width is 25 percent)
#pragma config PLLSS = PLL_PRI // PLL Secondary Selection Configuration bit (PLL is fed by the Primary oscillator)
#pragma config BOREN = ON // Brown-out Reset Enable (Brown-out Reset Enable)
#pragma config WPDIS = WPDIS // Segment Write Protection Disable (Disabled)
#pragma config WPCFG = WPCFGDIS // Write Protect Configuration Page Select (Disabled)
#pragma config WPEND = WPENDMEM // Segment Write Protection End Page Select (Write Protect from WPFP to the last page of memory)
// CONFIG2
#pragma config POSCMD = HS // Primary Oscillator Select (HS Oscillator Enabled)
#pragma config WDTCLK = LPRC // WDT Clock Source Select bits (WDT uses LPRC)
#pragma config OSCIOFCN = ON // OSCO Pin Configuration (OSCO/CLKO/RA3 functions as port I/O (RA3))
#pragma config FCKSM = CSECME // Clock Switching and Fail-Safe Clock Monitor Configuration bits (Clock switching is enabled, Fail-Safe Clock Monitor is enabled)
//#pragma config FCKSM = CSDCMD // Clock Switching and Fail-Safe Clock Monitor Configuration bits (Clock switching and Fail-Safe Clock Monitor are disabled)
#pragma config FNOSC = PRIPLL // Initial Oscillator Select (Primary Oscillator with PLL module (XTPLL,HSPLL, ECPLL))
#pragma config ALTRB6 = APPEND // Alternate RB6 pin function enable bit (Append the RP6/ASCL1/PMPD6 functions of RB6 to RA1 pin functions)
#pragma config ALTCMPI = CxINC_RX // Alternate Comparator Input bit (C1INC, C2INC and C3INC are on RB9 )
#pragma config WDTCMX = WDTCLK // WDT Clock Source Select bits (WDT clock source is determined by the WDTCLK Configuration bits)
#pragma config IESO = OFF // Internal External Switchover (Disabled)
// CONFIG1
#pragma config WDTPS = PS1024 // Watchdog Timer Postscaler Select (1:1,024)
#pragma config FWPSA = PR128 // WDT Prescaler Ratio Select (1:128)
#pragma config WINDIS = OFF // Windowed WDT Disable (Standard Watchdog Timer)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT disabled in hardware; SWDTEN bit disabled)
#pragma config ICS = PGx3 // Emulator Pin Placement Select bits (Emulator functions are shared with PGEC3/PGED3)
#pragma config LPCFG = OFF // Low power regulator control (Disabled - regardless of RETEN)
//#pragma config LPCFG = ON // Low power regulator control (Low voltage regulator controlled by RETEN bit)
#pragma config GWRP = OFF // General Segment Write Protect (Write to program memory allowed)
#pragma config GCP = OFF // General Segment Code Protect (Code protection is disabled)
#pragma config JTAGEN = OFF // JTAG Port Enable (Disabled)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
#include <xc.h>
TURNOFF FUNCTION
void TurnOff(void)
{
T1CONbits.TON = 0;
IEC0bits.T1IE = 0;
/* turn off */
OC1CON1bits.OCM = 0;
OC2CON1bits.OCM = 0;
OC3CON1bits.OCM = 0;
OC4CON1bits.OCM = 0;
OC5CON1bits.OCM = 0;
// OC6CON1bits.OCM = 0;
if (!USB_BUS_SENSE)
{
USBMaskInterrupts();
USBModuleDisable();
OS_ENTER_CRITICAL();
T2CONbits.TON = 0;
IEC0bits.T2IE = 0;
TRISA = 0xffff;
TRISB = 0xffff;
TRISC = 0xffff;
// I2C1CONLbits.I2CEN = 0;
//
// SPI1CON1Lbits.SPIEN = 0;
// SPI2CON1Lbits.SPIEN = 0;
// SPI3CON1Lbits.SPIEN = 0;
//
// U1MODEbits.UARTEN = 0;
// U2MODEbits.UARTEN = 0;
// U3MODEbits.UARTEN = 0;
// U4MODEbits.UARTEN = 0;
//
// DMACONbits.DMAEN = 0;
//
// U1CONbits.USBEN = 0;
// PMD1 = 0xffff;
// PMD2 = 0xffff;
// PMD3 = 0xffff;
// PMD4 = 0xffff;
// PMD5 = 0xffff;
// PMD6 = 0xffff;
// PMD7 = 0xffff;
// PMD8 = 0xffff;
WDTDisable();
LPAppState = OFF_ST;
CNInit();
Nop();
Nop();
OS_EXIT_CRITICAL();
//#ifndef DEBUG_PENNA
{
// ENTRATA IN SLEEP MODE(pag 164)
// TEST 1
// DSCONbits.DSEN = 1;
// DSCONbits.DSEN = 1;
// __asm__ volatile("pwrsav #0");
// TEST 2 non funziona anche se c'è scritto così sul manuale (pag 164)
// __asm__ volatile("disi #7");
// __asm__ volatile("mov #8000, w2");
// __asm__ volatile("mov w2, DSCON");
// __asm__ volatile("mov w2, DSCON");
// __asm__ volatile("nop");
// __asm__ volatile("nop");
// __asm__ volatile("nop");
// __asm__ volatile("PWRSAV #0");
// TEST 3
DSCONbits.DSEN = 1;
DSCONbits.DSEN = 1;
__asm__ volatile("nop");
__asm__ volatile("nop");
__asm__ volatile("nop");
__asm__ volatile("PWRSAV #0");
// TEST 4 - LOW VOLTAGE (pag. 420) [provato sia con CONFIG LPCFG=1 e 0, l'effetto si ha con 1 anche se da manuale c'è scritto il contrario]
// RCONbits.RETEN = 1;
// __asm__ volatile("PWRSAV #0");
}
//#endif
USBDeviceInit();
}
WDTEnable();
T2CONbits.TON = 1;
IEC0bits.T2IE = 1;
}
INTERRUPT DECLARATION
//------------------------------------------------
/**
void INTERRUPT_Initialize (void)
*/
void INTERRUPT_Initialize(void)
{
// INT0I: INT0 - External Interrupt 0
// Priority: 1
IPC0bits.INT0IP = 1;
}
/**
Section: External Interrupt Handlers
*/
void __attribute__((weak)) EX_INT0_CallBack(void)
{
// Add your custom callback code here
// Verifico se il dispositivo è uscito dal Deep Sleep (pag.165 datasheet)
if (RCONbits.DPSLP == 1)
{
// Risveglio da deep sleep
RCONbits.DPSLP = 0;
DSCONbits.RELEASE = 0;
}
}
/**
Interrupt Handler for EX_INT0 - INT0
*/
void __attribute__((interrupt, no_auto_psv)) _INT0Interrupt(void)
{
//***User Area Begin->code: INT0 - External Interrupt 0***
EX_INT0_CallBack();
//***User Area End->code: INT0 - External Interrupt 0***
EX_INT0_InterruptFlagClear();
}
/**
Section: External Interrupt Initializers
*/
/**
void EXT_INT_Initialize(void)
Initializer for the following external interrupts
INT0
*/
void EXT_INT_Initialize(void)
{
/*******
* INT0
* Clear the interrupt flag
* Set the external interrupt edge detect
* Enable the interrupt, if enabled in the UI.
********/
EX_INT0_InterruptFlagClear();
EX_INT0_PositiveEdgeSet();
EX_INT0_InterruptEnable();
}
When I press wakeup button, my consumption goes to 10mA as normal, but
I can't light ON any led. Seems that my device is not responsive
Your problem is here:
TRISA = 0xffff;
TRISB = 0xffff;
TRISC = 0xffff;
You set the pins to input before entering deep sleep, but I don't see anywhere in your code where you set the pins up after you exit sleep so they are still acting as inputs and thus you won't be able to light an LED.

what does the PIC18 compile error 195 mean?

I'm relatively new to programming PIC18 micro-controllers and I keep getting a compile error 195 when I try to get my code to compile. The PIC I'm using is a PIC18F46k80, and the application I'm trying to program it for is for a piece of hardware with the PIC already embedded, so I can't change the Pin configuration (I didn't design the hardware). I'm trying to get my PIC to perform a slightly modified SPI protocol via bit-banging as the correct pins for the internal peripheral haven't been connect. I keep running into this compile error whenever I try to set RA6 or RA5, even though (I think) I've configured the pins to make them writable (not providing the internal clock). Specifically I get the error when trying to set LATA6 = x or LATA5 = x. In MPLAB X every issue of me writing LATA6 or LATA5 is highlighted. Can someone help me with writing/setting these pins?
Any instance of the follow code will cause an issue:
LATA5 = 0;
//or
LAT6 = 0;
//or
LAT6 = 1;
I can send through the entire file including headers and config files if needed :) Cheers for any help.
Here is the entire code:
#include "mcc_generated_files/mcc.h"
#include <stdio.h>
#include<stdlib.h>
#include<xc.h>
//Define words for transfer//
uint8_t FR1IByte = 0x01;
int FR1DBytes = 0x900000;
uint8_t CSRIByte = 0x00;
uint8_t CSRCH0 = 0x10;
uint8_t CSRCH1 = 0x20;
uint8_t CSRCH2 = 0x40;
uint8_t CFTWIByte = 0x04;
uint32_t CFTWCH0 = 0x42680000;
uint32_t CFTWCH1 = 0x1F400000;
uint32_t CFTWCH2 = 0x3E800000;
//Functions to perform SPI//
void SPItransfer8( uint8_t byte)
{
// local variable declaration
int i;
for (i = 0; i <8; i++){ //compares MSB with mask. If it matches, it will transfer a 1//
if(byte & 0x80)
{
LATC5 = 1;
}
else
{
LATC5 = 0;
}
// Pulses clock for transfer of data//
LATA6 = 1;
LATA6 = 0;
// Logical shift left so that next byte can be read//
byte <<= 1;
}
}
void SPItransfer24( int bytes)
{
// local variable declaration
int i;
for (i = 0; i <24; i++);
{ //compares MSB with mask. If it matches, it will transfer a 1//
if(bytes & 0x800000)
{
LATC5 = 1;
}
else
{
LATC5 = 0;
}
// Pulses clock for transfer of data//
LATA6 = 1;
LATA6 = 0;
// Logical shift left so that next byte can be read//
bytes <<= 1;
}
}
void SPItransfer32( uint32_t bytes)
{
// local variable declaration
int i;
for (i = 0; i <32; i++);
{ //compares MSB with mask. If it matches, it will transfer a 1//
if(bytes & 0x80000000)
{
LATC5 = 1;
}
else
{
LATC5 = 0;
}
// Pulses clock for transfer of data//
LATA6 = 1;
LATA6 = 0;
// Logical shift left so that next byte can be read//
bytes <<= 1;
}
}
void main(void)
{
TRISE = 0x03;
TRISA = 0b1001111;
// Initialize the device//
SYSTEM_Initialize();
// Perform master reset on DDS to set the device to its default state (Active high on E2)//
LATE1 = 1;
LATE1 = 0;
// Delay to allow the system to load (PLL takes time to lock) //
__delay_ms(10)
//Set RA5 to low to prevent power down//
LATA5 = 0;
//Set RA6 to low for SPI clock//
LATA6 = 0;
//Transfers the Function Register 1 Information Byte//
SPItransfer8(FR1IByte);
//Transfers the Function Register 1 Data Bytes//
SPItransfer24(FR1DBytes);
//Transfers the Channel Select Register Information Byte//
SPItransfer8(CSRIByte);
//Transfers the Channel Select Register Data Byte for CH0
SPItransfer8(CSRCH0);
//Transfers the Channel Frequency Tuning Word Information Byte//
SPItransfer8(CFTWIByte);
//Transfers the Channel 0 Frequency Tuning Word//
SPItransfer32(CFTWCH0);
//Transfers the Channel Select Register Information Byte//
SPItransfer8(CSRIByte);
//Transfers the Channel Select Register Data Byte for CH1
SPItransfer8(CSRCH1);
//Transfers the Channel Frequency Tuning Word Information Byte//
SPItransfer8(CFTWIByte);
//Transfers the Channel 1 Frequency Tuning Word//
SPItransfer32(CFTWCH1);
//Transfers the Channel Select Register Information Byte//
SPItransfer8(CSRIByte);
//Transfers the Channel Select Register Data Byte for CH2
SPItransfer8(CSRCH2);
//Transfers the Channel Frequency Tuning Word Information Byte//
SPItransfer8(CFTWIByte);
//Transfers the Channel 2 Frequency Tuning Word//
SPItransfer32(CFTWCH2);
//Toggle I/O_Update to load data into DDS//
PORTEbits.RE2 = 1;
PORTEbits.RE2 = 0;
//Loop holding RA6 low to prevent further data transmission//
while (1)
{
PORTAbits.RA6 = 0;
}
}
Here are the MCC generated config files:
// CONFIG1L
#pragma config RETEN = OFF // VREG Sleep Enable bit->Ultra low-power regulator is Disabled (Controlled by REGSLP bit)
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit->LF-INTOSC in High-power mode during Sleep
#pragma config SOSCSEL = DIG // SOSC Power Selection and mode Configuration bits->Digital (SCLKI) mode
#pragma config XINST = OFF // Extended Instruction Set->Disabled
// CONFIG1H
#pragma config FOSC = INTIO2 // Oscillator->Internal RC oscillator
#pragma config PLLCFG = OFF // PLL x4 Enable bit->Disabled
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor->Disabled
#pragma config IESO = OFF // Internal External Oscillator Switch Over Mode->Disabled
// CONFIG2L
#pragma config PWRTEN = OFF // Power Up Timer->Disabled
#pragma config BOREN = SBORDIS // Brown Out Detect->Enabled in hardware, SBOREN disabled
#pragma config BORV = 3 // Brown-out Reset Voltage bits->1.8V
#pragma config BORPWR = ZPBORMV // BORMV Power level->ZPBORMV instead of BORMV is selected
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer->WDT disabled in hardware; SWDTEN bit disabled
#pragma config WDTPS = 1048576 // Watchdog Postscaler->1:1048576
// CONFIG3H
#pragma config CANMX = PORTB // ECAN Mux bit->ECAN TX and RX pins are located on RB2 and RB3, respectively
#pragma config MSSPMSK = MSK7 // MSSP address masking->7 Bit address masking mode
#pragma config MCLRE = OFF // Master Clear Enable->MCLR Disabled, RE3 Enabled
// CONFIG4L
#pragma config STVREN = ON // Stack Overflow Reset->Enabled
#pragma config BBSIZ = BB2K // Boot Block Size->2K word Boot Block size
// CONFIG5L
#pragma config CP0 = OFF // Code Protect 00800-03FFF->Disabled
#pragma config CP1 = OFF // Code Protect 04000-07FFF->Disabled
#pragma config CP2 = OFF // Code Protect 08000-0BFFF->Disabled
#pragma config CP3 = OFF // Code Protect 0C000-0FFFF->Disabled
// CONFIG5H
#pragma config CPB = OFF // Code Protect Boot->Disabled
#pragma config CPD = OFF // Data EE Read Protect->Disabled
// CONFIG6L
#pragma config WRT0 = OFF // Table Write Protect 00800-03FFF->Disabled
#pragma config WRT1 = OFF // Table Write Protect 04000-07FFF->Disabled
#pragma config WRT2 = OFF // Table Write Protect 08000-0BFFF->Disabled
#pragma config WRT3 = OFF // Table Write Protect 0C000-0FFFF->Disabled
// CONFIG6H
#pragma config WRTC = OFF // Config. Write Protect->Disabled
#pragma config WRTB = OFF // Table Write Protect Boot->Disabled
#pragma config WRTD = OFF // Data EE Write Protect->Disabled
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protect 00800-03FFF->Disabled
#pragma config EBTR1 = OFF // Table Read Protect 04000-07FFF->Disabled
#pragma config EBTR2 = OFF // Table Read Protect 08000-0BFFF->Disabled
#pragma config EBTR3 = OFF // Table Read Protect 0C000-0FFFF->Disabled
// CONFIG7H
#pragma config EBTRB = OFF // Table Read Protect Boot->Disabled
The error is actually in the line just above LATA5 = 0;. The macro __delay_ms is defined in pic18.h as:
_delay((unsigned long)((x)*(_XTAL_FREQ/4000000.0)))
and requires a statement terminator. You are missing a semicolon. Change the line to:
__delay_ms(10);

I²C Master Write with PIC18F45K50 : keeps SCL low

I'm writing my own I²C Master Write function according to Microchip's datasheet. I'm using MPLAB X. I generated the configuration with the Code Configurator, but here are the interesting bits :
// R_nW write_noTX; P stopbit_notdetected; S startbit_notdetected; BF RCinprocess_TXcomplete; SMP Standard Speed; UA dontupdate; CKE disabled; D_nA lastbyte_address;
SSP1STAT = 0x80;
// SSPEN enabled; WCOL no_collision; CKP Idle:Low, Active:High; SSPM FOSC/4_SSPxADD_I2C; SSPOV no_overflow;
SSP1CON1 = 0x28;
// SBCDE disabled; BOEN disabled; SCIE disabled; PCIE disabled; DHEN disabled; SDAHT 100ns; AHEN disabled;
SSP1CON3 = 0x00;
// Baud Rate Generator Value: SSP1ADD 80;
SSP1ADD = 0x50;
// clear the master interrupt flag
PIR1bits.SSP1IF = 0;
// enable the master interrupt
PIE1bits.SSP1IE = 1;
So : Standard Speed, 100ns hold time, Master Mode, clokck frequency about 50kHz.
I tried to follow the procedure described p238 of the datasheet :
http://ww1.microchip.com/downloads/en/DeviceDoc/30000684B.pdf
Here's my code :
#include "mcc_generated_files/mcc.h"
#include <stdio.h>
#define _XTAL_FREQ 16000000
#define RTS_PIN PORTDbits.RD3
#define CTS_PIN PORTDbits.RD2
#define LED_PIN PORTAbits.RA1
#define RX_FLAG PORTAbits.RA2
uint8_t c;
// Define putch() for printf())
void putch(char c)
{
EUSART1_Write(c);
}
void main(void)
{
// Initialize the device
SYSTEM_Initialize();
while (1)
{
// Generate a START condition by setting Start Enable bit
SSP1CON2bits.SEN = 1;
// Wait for START to be completed
while(!PIR1bits.SSPIF);
// Clear flag
PIR1bits.SSPIF = 0;
// Load the address + RW byte in SSP1BUF
// Address = 85 ; request type = WRITE (0)
SSP1BUF = 0b10101010;
// Wait for ack
while (SSP1CON2bits.ACKSTAT);
// Wait for MSSP interrupt
while (!PIR1bits.SSPIF);
// Load data (0x11) in SSP1BUF
SSP1BUF = 0x11;
// Wait for ack
while (SSP1CON2bits.ACKSTAT);
// Generate a STOP condition
SSP1CON2bits.PEN = 1;
// Wait for STOP to be completed
while(!PIR1bits.SSPIF);
// Clear flag
PIR1bits.SSPIF = 0;
// Wait for 1s before sending the next byte
__delay_ms(1000);
}
}
The slave device is an Arduino which I have tested with another Arduino (Master) to make sure it's working correctly.
My problem is : analysing the SDA/SCL signals with a logic analyser, when I start the PIC I get 2 correct messages, that's with correct address send and byte transmission, but at the end of the second SCL is held LOW, which makes all other writings bad (can't have a proper START condition if SCL is held LOW). BTW, at the end of the first transmission, SCL is held LOW for like 3ms, but then comes HIGH again without any reason.
Can anyone here point what I'm doing wrong ? Did I forget something ?
Thanx in advance.
Best regards.
Eric
PS : when testing the slave with another Arduino as the Master, SCL is set HIGH as soon as the transmission is over.
One thing I'm noticing is that after sending the slave address you are waiting for the ACK (ACKSTAT) then waiting for the SSPIF Interrupt Flag, but you are not checking for SSPIF after the data byte. You are only checking ACKSTAT. Maybe try waiting for and clearing the SSPIF before setting PEN to assert the stop conditon?
Have you checked the state of the SSPCON and SSPSTAT registers when this behavior occurs, that might help narrow down where the problem lies.
Thanx a lot for your answer !
I cleared SSP1IF after loading the data byte, and now it's working fine !
I think I understand now what was happening : the datasheet indicates that ACKSTAT is the only register bit that reacts on the rising edge of SCL, instead of the falling edge for the other bits. So in my code, I generate the STOP condition too early, and that might make it inoperative. Thus no STOP condition is generated, SCL is stuck LOW, and the next transmission cannot be started.
Furthermore, when I wait for the STOP condition to be completed, the SSP1IF flag is still set, so he doesn't actually wait and jumps directly to the delay() function. I don't know if that matters as he waits anyway, but it could matter if ever I tried to send packets one after the other.
So I here's the function I wrote, and which is working :
(BTW it can take up to 255 data bytes)
void MasterWrite(char _size, char* _data)
{
// Generate a START condition by setting Start Enable bit
SSP1CON2bits.SEN = 1;
// Wait for START to be completed
while(!PIR1bits.SSPIF);
// Clear flag
PIR1bits.SSPIF = 0;
// Load the address + RW byte in SSP1BUF
// Address = 85 ; request type = WRITE (0)
SSP1BUF = 0b10101010;
// Wait for ack
while (SSP1CON2bits.ACKSTAT);
// Wait for MSSP interrupt
while (!PIR1bits.SSPIF);
// Clear flag
PIR1bits.SSPIF = 0;
for (int i=0; i<_size; i++)
{
// Load data in SSP1BUF
SSP1BUF = *(_data+i);
// Wait for ack
while (SSP1CON2bits.ACKSTAT);
// Wait for MSSP interrupt
while (!PIR1bits.SSPIF);
// Clear flag
PIR1bits.SSPIF = 0;
}
// Generate a STOP condition
SSP1CON2bits.PEN = 1;
// Wait for STOP to be completed
while(!PIR1bits.SSPIF);
// Clear flag
PIR1bits.SSPIF = 0;
}
Thanx a lot again for your help !
Best regards.
Eric

Why is this DMA I2C transfer locking up execution?

I'm trying to change a library for STM32F407 to include DMA transfers when using I2C. I'm using it do drive an OLED screen. In its original form it is working w/o problems. In the comments, somebody added DMA, but also ported it to STM32F10 and I'm trying to port it back to F407.
My problem is, after enabling DMA transfer, debugger stops working (at exactly that line) - debugger activity LED stops / turns off and debugger stays at next statement.
After some more testing (blinking a led at certain events to see if they happen) I found out that code actually continues to a certain point (specifically, next time when DMA transfer is needed - in second call to update screen). After that, program doesn't continue (LED doesn't turn ON if set ON after that statement).
The weird thing is, I know the transfer is working because the screen gets a few characters written on it. That only happens if I don't debug step by step because CPU writes new data to screen buffer in the mean time and changes content of it before it is entirely sent to the screen by DMA (I will figure out how to fix that later - probably dual buffer, but it shouldn't interfere with DMA transfer anyway). However if I debug step by step, DMA finishes before CPU writes new content to screen buffer and screen is black (as it should be as buffer is first cleared). For testing, I removed the first call to DMA (after the clearing of buffer) and let the program write the text intended into buffer. It displays without any anomalies, so that means DMA must have finished, but something happened after. I simply can't explain why debugger stops working if DMA finishes the transfer.
I tried blinking a led in transfer finished interrupt handler of DMA but it never blinks, that means it is never fired. I would appreciate any help as I'm at a loss (been debugging for a few days now).
Thank you!
Here is relevant part of code (I have omitted rest of the code because there is a lot of it, but if required I can post). The code works without DMA (with ordinary I2C transfers), it only breaks with DMA.
// TM_STM32F4_I2C.h
typedef struct DMA_Data
{
DMA_Stream_TypeDef* DMAy_Streamx;
uint32_t feif;
uint32_t dmeif;
uint32_t teif;
uint32_t htif;
uint32_t tcif;
} DMA_Data;
//...
// TM_STM32F4_I2C.c
void TM_I2C_Init(I2C_TypeDef* I2Cx, uint32_t clockSpeed) {
I2C_InitTypeDef I2C_InitStruct;
/* Enable clock */
RCC->APB1ENR |= RCC_APB1ENR_I2C3EN;
/* Enable pins */
TM_GPIO_InitAlternate(GPIOA, GPIO_PIN_8, TM_GPIO_OType_OD, TM_GPIO_PuPd_UP, TM_GPIO_Speed_Medium, GPIO_AF_I2C3);
TM_GPIO_InitAlternate(GPIOC, GPIO_PIN_9, TM_GPIO_OType_OD, TM_GPIO_PuPd_UP, TM_GPIO_Speed_Medium, GPIO_AF_I2C3);
/* Check clock, set the lowest clock your devices support on the same I2C bus */
if (clockSpeed < TM_I2C_INT_Clocks[2]) {
TM_I2C_INT_Clocks[2] = clockSpeed;
}
/* Set values */
I2C_InitStruct.I2C_ClockSpeed = TM_I2C_INT_Clocks[2];
I2C_InitStruct.I2C_AcknowledgedAddress = TM_I2C3_ACKNOWLEDGED_ADDRESS;
I2C_InitStruct.I2C_Mode = TM_I2C3_MODE;
I2C_InitStruct.I2C_OwnAddress1 = TM_I2C3_OWN_ADDRESS;
I2C_InitStruct.I2C_Ack = TM_I2C3_ACK;
I2C_InitStruct.I2C_DutyCycle = TM_I2C3_DUTY_CYCLE;
/* Disable I2C first */
I2Cx->CR1 &= ~I2C_CR1_PE;
/* Initialize I2C */
I2C_Init(I2Cx, &I2C_InitStruct);
/* Enable I2C */
I2Cx->CR1 |= I2C_CR1_PE;
}
int16_t TM_I2C_WriteMultiDMA(DMA_Data* dmaData, I2C_TypeDef* I2Cx, uint8_t address, uint8_t reg, uint16_t len)
{
int16_t ok = 0;
// If DMA is already enabled, wait for it to complete first.
// Interrupt will disable this after transmission is complete.
TM_I2C_Timeout = 10000000;
// TODO: Is this I2C check ok?
while (I2C_GetFlagStatus(I2Cx, I2C_FLAG_BUSY) && !I2C_GetFlagStatus(I2Cx, I2C_FLAG_TXE) && DMA_GetCmdStatus(dmaData->DMAy_Streamx) && TM_I2C_Timeout)
{
if (--TM_I2C_Timeout == 0)
{
return -1;
}
}
//Set amount of bytes to transfer
DMA_Cmd(dmaData->DMAy_Streamx, DISABLE); //should already be disabled at this point
DMA_SetCurrDataCounter(dmaData->DMAy_Streamx, len);
DMA_ClearFlag(dmaData->DMAy_Streamx, dmaData->feif | dmaData->dmeif | dmaData->teif | dmaData->htif | dmaData->tcif); // Clear dma flags
DMA_Cmd(dmaData->DMAy_Streamx, ENABLE); // enable DMA
//Send I2C start
ok = TM_I2C_Start(I2Cx, address, I2C_TRANSMITTER_MODE, I2C_ACK_DISABLE);
//Send register to write to
TM_I2C_WriteData(I2Cx, reg);
//Start DMA transmission, interrupt will handle transmit complete.
I2C_DMACmd(I2Cx, ENABLE);
return ok;
}
//...
// TM_STM32F4_SSD1306.h
#define SSD1306_I2C I2C3
#define SSD1306_I2Cx 3
#define SSD1306_DMA_STREAM DMA1_Stream4
#define SSD1306_DMA_FEIF DMA_FLAG_FEIF4
#define SSD1306_DMA_DMEIF DMA_FLAG_DMEIF4
#define SSD1306_DMA_TEIF DMA_FLAG_TEIF4
#define SSD1306_DMA_HTIF DMA_FLAG_HTIF4
#define SSD1306_DMA_TCIF DMA_FLAG_TCIF4
static DMA_Data ssd1306_dma_data = { SSD1306_DMA_STREAM, SSD1306_DMA_FEIF, SSD1306_DMA_DMEIF, SSD1306_DMA_TEIF, SSD1306_DMA_HTIF, SSD1306_DMA_TCIF };
#define SSD1306_I2C_ADDR 0x78
//...
// TM_STM32F4_SSD1306.c
void TM_SSD1306_initDMA(void)
{
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
DMA_DeInit(DMA1_Stream4);
DMA_Cmd(DMA1_Stream4, DISABLE);
//Configure DMA controller channel 3, I2C TX channel.
DMA_StructInit(&DMA_InitStructure); // Load defaults
DMA_InitStructure.DMA_Channel = DMA_Channel_3;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(I2C3->DR)); // I2C3 data register address
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)SSD1306_Buffer; // Display buffer address
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; // DMA from mem to periph
DMA_InitStructure.DMA_BufferSize = 1024; // Is set later in transmit function
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; // Do not increment peripheral address
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; // Do increment memory address
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; // DMA one shot, no circular.
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; // Tweak if interfering with other dma actions
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream4, &DMA_InitStructure);
DMA_ITConfig(DMA1_Stream4, DMA_IT_TC, ENABLE); // Enable transmit complete interrupt
DMA_ClearITPendingBit(DMA1_Stream4, DMA_IT_TC);
// Set interrupt controller for DMA
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream4_IRQn; // I2C3 TX connect to stream 4 of DMA1
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x05;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x05;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
// Set interrupt controller for I2C
NVIC_InitStructure.NVIC_IRQChannel = I2C3_EV_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
I2C_ITConfig(I2C3, I2C_IT_BTF, ENABLE);
}
extern void DMA1_Channel3_IRQHandler(void)
{
//I2C3 DMA transmit completed
if (DMA_GetITStatus(DMA1_Stream4, DMA_IT_TC) != RESET)
{
// Stop DMA, clear interrupt
DMA_Cmd(DMA1_Stream4, DISABLE);
DMA_ClearITPendingBit(DMA1_Stream4, DMA_IT_TC);
I2C_DMACmd(SSD1306_I2C, DISABLE);
}
}
// Sending stop condition to I2C in separate handler necessary
// because DMA can finish before I2C finishes
// transmitting and last byte is not sent
extern void I2C3_EV_IRQHandler(void)
{
if (I2C_GetITStatus(I2C3, I2C_IT_BTF) != RESET)
{
TM_I2C_Stop(SSD1306_I2C); // send i2c stop
I2C_ClearITPendingBit(I2C3, I2C_IT_BTF);
}
}
// ...
void TM_SSD1306_UpdateScreen(void) {
TM_I2C_WriteMultiDMA(&ssd1306_dma_data, SSD1306_I2C, SSD1306_I2C_ADDR, 0x40, 1024); // Use DMA
}
edit: i noticed the wrong condition checking at initializing a new transfer, but fixing it doesn't fix the main problem
while ((I2C_GetFlagStatus(I2Cx, I2C_FLAG_BUSY) || !I2C_GetFlagStatus(I2Cx, I2C_FLAG_TXE) || DMA_GetCmdStatus(dmaData->DMAy_Streamx)) && TM_I2C_Timeout)

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