what does the PIC18 compile error 195 mean? - syntax

Question

I'm relatively new to programming PIC18 micro-controllers and I keep getting a compile error 195 when I try to get my code to compile. The PIC I'm using is a PIC18F46k80, and the application I'm trying to program it for is for a piece of hardware with the PIC already embedded, so I can't change the Pin configuration (I didn't design the hardware). I'm trying to get my PIC to perform a slightly modified SPI protocol via bit-banging as the correct pins for the internal peripheral haven't been connect. I keep running into this compile error whenever I try to set RA6 or RA5, even though (I think) I've configured the pins to make them writable (not providing the internal clock). Specifically I get the error when trying to set LATA6 = x or LATA5 = x. In MPLAB X every issue of me writing LATA6 or LATA5 is highlighted. Can someone help me with writing/setting these pins?
Any instance of the follow code will cause an issue:
LATA5 = 0;
//or
LAT6 = 0;
//or
LAT6 = 1;
I can send through the entire file including headers and config files if needed :) Cheers for any help.
Here is the entire code:
#include "mcc_generated_files/mcc.h"
#include <stdio.h>
#include<stdlib.h>
#include<xc.h>
//Define words for transfer//
uint8_t FR1IByte = 0x01;
int FR1DBytes = 0x900000;
uint8_t CSRIByte = 0x00;
uint8_t CSRCH0 = 0x10;
uint8_t CSRCH1 = 0x20;
uint8_t CSRCH2 = 0x40;
uint8_t CFTWIByte = 0x04;
uint32_t CFTWCH0 = 0x42680000;
uint32_t CFTWCH1 = 0x1F400000;
uint32_t CFTWCH2 = 0x3E800000;
//Functions to perform SPI//
void SPItransfer8( uint8_t byte)
{
// local variable declaration
int i;
for (i = 0; i <8; i++){ //compares MSB with mask. If it matches, it will transfer a 1//
if(byte & 0x80)
{
LATC5 = 1;
}
else
{
LATC5 = 0;
}
// Pulses clock for transfer of data//
LATA6 = 1;
LATA6 = 0;
// Logical shift left so that next byte can be read//
byte <<= 1;
}
}
void SPItransfer24( int bytes)
{
// local variable declaration
int i;
for (i = 0; i <24; i++);
{ //compares MSB with mask. If it matches, it will transfer a 1//
if(bytes & 0x800000)
{
LATC5 = 1;
}
else
{
LATC5 = 0;
}
// Pulses clock for transfer of data//
LATA6 = 1;
LATA6 = 0;
// Logical shift left so that next byte can be read//
bytes <<= 1;
}
}
void SPItransfer32( uint32_t bytes)
{
// local variable declaration
int i;
for (i = 0; i <32; i++);
{ //compares MSB with mask. If it matches, it will transfer a 1//
if(bytes & 0x80000000)
{
LATC5 = 1;
}
else
{
LATC5 = 0;
}
// Pulses clock for transfer of data//
LATA6 = 1;
LATA6 = 0;
// Logical shift left so that next byte can be read//
bytes <<= 1;
}
}
void main(void)
{
TRISE = 0x03;
TRISA = 0b1001111;
// Initialize the device//
SYSTEM_Initialize();
// Perform master reset on DDS to set the device to its default state (Active high on E2)//
LATE1 = 1;
LATE1 = 0;
// Delay to allow the system to load (PLL takes time to lock) //
__delay_ms(10)
//Set RA5 to low to prevent power down//
LATA5 = 0;
//Set RA6 to low for SPI clock//
LATA6 = 0;
//Transfers the Function Register 1 Information Byte//
SPItransfer8(FR1IByte);
//Transfers the Function Register 1 Data Bytes//
SPItransfer24(FR1DBytes);
//Transfers the Channel Select Register Information Byte//
SPItransfer8(CSRIByte);
//Transfers the Channel Select Register Data Byte for CH0
SPItransfer8(CSRCH0);
//Transfers the Channel Frequency Tuning Word Information Byte//
SPItransfer8(CFTWIByte);
//Transfers the Channel 0 Frequency Tuning Word//
SPItransfer32(CFTWCH0);
//Transfers the Channel Select Register Information Byte//
SPItransfer8(CSRIByte);
//Transfers the Channel Select Register Data Byte for CH1
SPItransfer8(CSRCH1);
//Transfers the Channel Frequency Tuning Word Information Byte//
SPItransfer8(CFTWIByte);
//Transfers the Channel 1 Frequency Tuning Word//
SPItransfer32(CFTWCH1);
//Transfers the Channel Select Register Information Byte//
SPItransfer8(CSRIByte);
//Transfers the Channel Select Register Data Byte for CH2
SPItransfer8(CSRCH2);
//Transfers the Channel Frequency Tuning Word Information Byte//
SPItransfer8(CFTWIByte);
//Transfers the Channel 2 Frequency Tuning Word//
SPItransfer32(CFTWCH2);
//Toggle I/O_Update to load data into DDS//
PORTEbits.RE2 = 1;
PORTEbits.RE2 = 0;
//Loop holding RA6 low to prevent further data transmission//
while (1)
{
PORTAbits.RA6 = 0;
}
}
Here are the MCC generated config files:
// CONFIG1L
#pragma config RETEN = OFF // VREG Sleep Enable bit->Ultra low-power regulator is Disabled (Controlled by REGSLP bit)
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit->LF-INTOSC in High-power mode during Sleep
#pragma config SOSCSEL = DIG // SOSC Power Selection and mode Configuration bits->Digital (SCLKI) mode
#pragma config XINST = OFF // Extended Instruction Set->Disabled
// CONFIG1H
#pragma config FOSC = INTIO2 // Oscillator->Internal RC oscillator
#pragma config PLLCFG = OFF // PLL x4 Enable bit->Disabled
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor->Disabled
#pragma config IESO = OFF // Internal External Oscillator Switch Over Mode->Disabled
// CONFIG2L
#pragma config PWRTEN = OFF // Power Up Timer->Disabled
#pragma config BOREN = SBORDIS // Brown Out Detect->Enabled in hardware, SBOREN disabled
#pragma config BORV = 3 // Brown-out Reset Voltage bits->1.8V
#pragma config BORPWR = ZPBORMV // BORMV Power level->ZPBORMV instead of BORMV is selected
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer->WDT disabled in hardware; SWDTEN bit disabled
#pragma config WDTPS = 1048576 // Watchdog Postscaler->1:1048576
// CONFIG3H
#pragma config CANMX = PORTB // ECAN Mux bit->ECAN TX and RX pins are located on RB2 and RB3, respectively
#pragma config MSSPMSK = MSK7 // MSSP address masking->7 Bit address masking mode
#pragma config MCLRE = OFF // Master Clear Enable->MCLR Disabled, RE3 Enabled
// CONFIG4L
#pragma config STVREN = ON // Stack Overflow Reset->Enabled
#pragma config BBSIZ = BB2K // Boot Block Size->2K word Boot Block size
// CONFIG5L
#pragma config CP0 = OFF // Code Protect 00800-03FFF->Disabled
#pragma config CP1 = OFF // Code Protect 04000-07FFF->Disabled
#pragma config CP2 = OFF // Code Protect 08000-0BFFF->Disabled
#pragma config CP3 = OFF // Code Protect 0C000-0FFFF->Disabled
// CONFIG5H
#pragma config CPB = OFF // Code Protect Boot->Disabled
#pragma config CPD = OFF // Data EE Read Protect->Disabled
// CONFIG6L
#pragma config WRT0 = OFF // Table Write Protect 00800-03FFF->Disabled
#pragma config WRT1 = OFF // Table Write Protect 04000-07FFF->Disabled
#pragma config WRT2 = OFF // Table Write Protect 08000-0BFFF->Disabled
#pragma config WRT3 = OFF // Table Write Protect 0C000-0FFFF->Disabled
// CONFIG6H
#pragma config WRTC = OFF // Config. Write Protect->Disabled
#pragma config WRTB = OFF // Table Write Protect Boot->Disabled
#pragma config WRTD = OFF // Data EE Write Protect->Disabled
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protect 00800-03FFF->Disabled
#pragma config EBTR1 = OFF // Table Read Protect 04000-07FFF->Disabled
#pragma config EBTR2 = OFF // Table Read Protect 08000-0BFFF->Disabled
#pragma config EBTR3 = OFF // Table Read Protect 0C000-0FFFF->Disabled
// CONFIG7H
#pragma config EBTRB = OFF // Table Read Protect Boot->Disabled

Answer 1

The error is actually in the line just above LATA5 = 0;. The macro __delay_ms is defined in pic18.h as:
_delay((unsigned long)((x)*(_XTAL_FREQ/4000000.0)))
and requires a statement terminator. You are missing a semicolon. Change the line to:
__delay_ms(10);