In a makefile I work on, gcc is used with the -D XOPEN_SOURCE=500 and -D_BSD_SOURCE options. gcc --help does not tell me what these are; a quick google search didn't help either. I'm quite a newbie with gcc, could someone give me a hint?
According to the GCC documentation ("3.11 Options Controlling the Preprocessor"), the -D switch defines the macros XOPEN_SOURCE and _BSD_SOURCE with the values 500 and 1 respectively. It's as though you have this code at the beginning of all the source files you pass to GCC:
#define XOPEN_SOURCE 500
#define _BSD_SOURCE 1
Build scripts usually take advantage of the compiler's ability to "insert" macros like these to "communicate" to the source code details about the platform being targeted (e.g. operating system version).
The "opposite" command-line switch for -D is -U, which #undefs a macro.
Most (if not all) modern C/C++ compilers include similar switches. For example, Visual C++ compilers accept the /D compiler switch, which essentially serves the same purpose as GCC's -D switch.
For future reference, the GCC option index is great if you need to look up compiler switches for the GCC compiler.
-D is used to set defines. The source code you are compiling most likely is using those defines to include specific header files.
Think of -D as doing the same thing as:
#define XOPEN_SOURCE 500
#define _BSD_SOURCE 1
at the top of the file it is currently compiling.
These do not nothing for gcc. These are definitions like similar you have in your .c, .cpp or .h files:
#define XOPEN_SOURCE 500
#define _BSD_SOURCE
-D is equlivant of a #define
i.e.
#define XOPEN_SOURCE 500
-D sets a define. It's like adding a header file that contains:
#define XOPEN_SOURCE 500
#define _BSD_SOURCE 1
You can then use #ifdef _BSD_SOURCE to enable conditional compilation of certain part of the code.
Related
I think everybody knows this excellent CMake command:
configure_file(
${CMAKE_CURRENT_SOURCE_DIR}/version.h.cmake
${CMAKE_CURRENT_BINARY_DIR}/version.h
)
But I have to implement that in Makefile. Could you please help me? How to do it?
Configuration file (version.h) is very simple:
#ifndef _VERSION_H_
#define _VERSION_H_
#define VERSION_MAJOR #VERSION_MAJOR#
#define VERSION_MINOR #VERSION_MINOR#
#define VERSION_BUILD #VERSION_BUILD#
#define VERSION_REVISION #VERSION_REVISION#
#endif // _VERSION_H_
This won't work. Well it might be, but it will be a hassle. These config.h files are made to communicate the result from a configure tool (configure from Autotools, CMake etc.) to the compiler.
When you use Makefiles, you can simply attach necessary flags or variables to the C(++) compiler call (with -D). There is no need to add the complexity of a config.h.
Is there a way I can run gcc -E to run the preprocessor but also to keep the #define, #include, other directives in the output (possibly as comments)? I thought I remembered seeing an option for this but I can't find it in the GCC Preprocessor Options page. I need this to track down where things are going wrong in a complex case involving lots of include files and macros.
The relevant options are listed under -dCHARS. -dD outputs macro definitions (both #define and #undef directives), -dI outputs #include directives, and they can be combined to -dDI.
I've been attempting to make a folder for each architecture my code can support. In this folder are platform specific files to include. I include them as follows:
#define STR(x) #x
#define ASSTR(x) STR(x)
#include ASSTR(ARCHITECTURE/sizes.h)
My compilation line in make looks like this:
gcc -o $# -c $< -DARCHITECTURE=i386
Which works, until I define ARCHITECTURE to be i386. When this happens, it looks for 1/sizes.h, so I assume it's already defined somewhere.
I believe the C preprocessor (cpp), which is called by gcc, defines i386 (for i386 systems). You can find out what it defines like so:
touch foo.h; cpp -dM foo.h; rm foo.h
This method is described by the cpp man page, under -d, with the character M (so, -dM):
Instead of the normal output, generate a list of #define directives for all the macros defined during the execution of the preprocessor, including predefined macros. This gives you a way of finding out what is predefined in your version of the preprocessor. Assuming you have no file foo.h, the command
touch foo.h; cpp -dM foo.h
will show all the predefined macros.
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Closed 12 years ago.
Possible Duplicate:
Running the GCC preprocessor
Is there a GCC option to make the GCC preprocessor generate C source code but filter out irrelevant source code?
For example, a C file has #define switch to define for many different platforms. I'm only intersted in one platform, so I want the C preprocessor to filter out unrelated code. Does GCC support this?
Use gcc -E to only run the preprocessor part, e.g. give a file in.c
#if 0
0;
#endif
#if 1
1;
#endif
running
$ gcc -E in.c -o in.i
yields a file in.i
# 1 "in.cpp"
# 1 "<built-in>"
# 1 "<command-line>"
# 1 "in.cpp"
1;
i.e. the parts behind the #if 0 got removed. If you would have #include'd files they would have been pasted too though, so I am not sure how much help this is.
It sounds like you actually want unifdef, not the GCC preprocessor.
Yes - almost certainly your compiler provides certain default definitions in the environment that you can use to turn code on and off for different systems. __GNUC__ is a good one for GCC. For example:
#ifdef __GNUC__
#define SOME_VALUE 12
#else
#define SOME_VALUE 14
#endif
If you compile that block with GCC, SOME_VALUE will be 12, and if you compile with MSVC, for example, SOME_VALUE will be 14. A list of platform specific definitions is available at this question.
You probably can use:
gcc -CC -P -Uswitch -undef -nostdinc -fdirectives-only -dDI -E
With switch the #define you know will be undefined.
How do I at compile time undefine a compiler macro using gcc. I tried some compile args to gcc like -D but I can't get to see the "not defined" message.
Thanks
#include <iostream>
#define MYDEF
int main(){
#ifdef MYDEF
std::cout<<"defined\n";
#else
std::cout<<"not defined\n";
#endif
}
You can use the -U option with gcc, but it won't undefine a macro defined in your source code. As far as I know, there's no way to do that.
You should wrap the MYDEF definition in a preprocessor macro, the presence of which (defined on the command line) would then prevent MYDEF from being defined. A bit convoluted to be sure but you can then control the build in the way you want from the command line (or Makefile). Example:
#ifndef DONT_DEFINE_MYDEF
#define MYDEF
#endif
Then from the command line when you don't want MYDEF:
gcc -DDONT_DEFINE_MYDEF ...
http://gcc.gnu.org/onlinedocs/gcc-4.4.2/gcc/Preprocessor-Options.html#Preprocessor-Options
The -U options seemed like what you could have needed... but then again you can't override a definition contained in your source code without resorting to more preprocessor directives.
You can resort to filtering source code and give this back to gcc for compilation, like this pseudo code:
grep -v "define MYDEF" yourFile.c | gcc -o yourFile.o -xc -
Hope it helps.
The code use case is not right. As I see, you have hard coded #define in the file. If compiler initially assumes MYDEF undefined, it will define it once it start processing the file.
You should remove the line #define MYDEF. And I hope your test case will work, if you pass MYDEF to -D and -U.
Here is one possibility that doesn't completely cover your use case but which I found to be helpful in my case.
If your MYDEF were #defined in a separate header file #included from the .c file you could force the definition of the #include guard macro with the -D option (thus preventing the MYDEF #definition) then either actively #define (still with the -D option) MYDEF to something else or just leave it undefined.
It is clear that anything else defined in the header file would also be missing but this was for me a solution to forcedly undefine a macro without changing the third-party code.