Compilation errors with Make File creation - gcc

While running my make file which is as follows,
../bin/output : ../lib/libfun.a ../obj/main.o
gcc ../main.o -L ../lib/ -lfun -o $#
../lib/libfun.a : ../obj/file_write.o ../obj/error.o
ar -rc $# $^
../obj/main.o : ../src/main.c
gcc -c $^ -o $# -I ../include
../obj/file_write.o : ../src/file_write.c
gcc -c $^ -o $# -I ../include
../obj/error.o : ../src/error.c
gcc -c $^ -o $# -I ../include
I am getting error like
make: Warning: File `makefile' has modification time 2.2e+03 s in the future
ar -rc ../lib/libfun.a ../obj/file_write.o ../obj/error.o
ar: ../lib/libfun.a: No such file or directory
make: *** [../lib/libfun.a] Error 1
and sometimes
"* missing separator (did you mean TAB instead of 8 spaces?). Stop"
Why is this happening? I gave correct Target,Pre-Requests and Command values whichever needed. Whats wrong in this?

For the first error, make sure the ../lib directory exists before trying to create a library in it. ar will return that error if the path doesn't exist.
For the second make syntax is strict: the commands after a target must be indented with a tab, not spaces.
target: deps
command
# ^ this here needs to be a tab character, not spaces

Related

Compile error - Make error: *** multiple target patterns. Stop

I have a problem with a makefile that's part of a repository. I already posted this question but don't know how to add some code lines after, so I'm trying it here.There is a problem with the makefile that has the common make rules. When I run make, I get the following error: C:\Mios32/include/makefile/common.mk:143: *** multiple target patterns. Stop.
Here's the code from common.mk file from line 142 to 144:
# rule to create .elf file
$(PROJECT_OUT)/$(PROJECT).elf: $(ALL_OBJS)
#$(CC) $(CFLAGS) $(ALL_OBJS) $(LIBS) $(LDFLAGS) -o$#
I'm guessing it's a problem with all_objs, cause these lines right before seem to work:
# rule to create a .hex and .bin file
%.bin : $(PROJECT_OUT)/$(PROJECT).elf
#$(OBJCOPY) $< -O binary $#
%.hex : $(PROJECT_OUT)/$(PROJECT).elf
#$(OBJCOPY) $< -O ihex $#
# rule to create a listing file from .elf
%.lss: $(PROJECT_OUT)/$(PROJECT).elf
#$(OBJDUMP) -w -h -S -C $< > $#
# rule to create a symbol table from .elf
%.sym: $(PROJECT_OUT)/$(PROJECT).elf
#$(NM) -n $< > $#
Here's some additional lines with all_objs:
# list of all objects
ALL_OBJS = $(addprefix $(PROJECT_OUT)/, $(THUMB_OBJS) $(THUMB_CPP_OBJS) $(THUMB_AS_OBJS)
$(ARM_OBJS) $(ARM_CPP_OBJS) $(ARM_AS_OBJS))
# list of all dependency files
ALL_DFILES = $(ALL_OBJS:.o=.d)
And here's some additional lines with Project_out and project:
# where should the output files be located
PROJECT_OUT ?= $(PROJECT)_build
# default linker flags
LDFLAGS += -T $(LD_FILE) -mthumb -u _start -Wl,--gc-section -Xlinker -M -Xlinker -
Map=$(PROJECT_OUT)/$(PROJECT).map -nostartfiles -lstdc++
# default rule
all: dirs cleanhex $(PROJECT).hex $(PROJECT_OUT)/$(PROJECT).bin
$(PROJECT_OUT)/$(PROJECT).lss $(PROJECT_OUT)/$(PROJECT).sym projectinfo
# create the output directories
dirs:
#-if [ ! -e $(PROJECT_OUT) ]; then mkdir $(PROJECT_OUT); fi;
#-$(foreach DIR,$(DIRS), if [ ! -e $(PROJECT_OUT)/$(DIR) ]; \
then mkdir -p $(PROJECT_OUT)/$(DIR); fi; )
I'm pretty new to the whole Make and Makefile topic, so I'm having a hard time figuring out the problem. I appreciate every help.
You should be clear in your question what OS you're working on. It seems from the error message above you're working on Windows. The makefile you're trying to use is very clearly targeted at a UNIX system like GNU/Linux or possibly MacOS.
If you are not familiar with the differences between Windows and UNIX (which are vast and deep) you will definitely have a lot of learning to do before you can even start to get this working.
To use UNIX environments on Windows you need to use something like WSL, or Cygwin, or at least install a MinGW shell environment. When you do that you need to be using UNIX paths, not Windows paths. Windows paths use backslashes (which are escape sequences in UNIX) and drive letters (which have no equivalent in UNIX) and in makefiles in particular the : character is special to make so using paths with drive letters is a problem.
You can debug your makefile by adding $(info ...) functions to show you the value of variables:
# rule to create .elf file
$(info PROJECT_OUT = $(PROJECT_OUT))
$(info PROJECT = $(PROJECT))
$(info ALL_OBJS = $(ALL_OBJS))
$(PROJECT_OUT)/$(PROJECT).elf: $(ALL_OBJS)
#$(CC) $(CFLAGS) $(ALL_OBJS) $(LIBS) $(LDFLAGS) -o$#

Why does f77 -f fail and what should it do?

I am trying to run some old Fortran code of my project team in ubuntu 16.04. I have not done any modifications to the existing code.
All I have done is installed gfortran, opened a terminal, and went to the file location using "cd" command. Here I have many files, but just consider this three, a script file compile.sh, and two makefiles counter.make and remail.make.
In compile.sh
make -f counter.make
make -f remail.make
In counter.make
SOURCE_APPLI=../SOURCES_COUNTERFLOW/
SOURCES_f77 = $(SOURCE_APPLI)table.f
TARGET = unst.e
OBJECTS = $(SOURCES_f77:.f=.o)
COMPILE = f77 -f
.f90.o :
$(COMPILE1) -o $*.o -c $*.f90
.f.o :
$(COMPILE) -o $*.o -c $*.f
$(TARGET) : $(OBJECTS)
$(COMPILE) $(OBJECTS) -o $#
del :
$(DELETE) $(OBJECTS)
In remail.make
SOURCE_APPLI= ../SOURCES_COUNTERFLOW/
$(SOURCE_APPLI)grcom.f
TARGET = remail.e
OBJECTS = $(SOURCES_f77:.f=.o)
COMPILE = f90
.f90.o :
$(COMPILE) -o $*.o -c $*.f90
.f.o :
$(COMPILE) -o $*.o -c $*.f
$(TARGET) : $(OBJECTS)
$(COMPILE) $(OBJECTS) -o $#
del :
$(DELETE) $(OBJECTS)
When I run compile.sh, I got an error as shown below
f77: error: unrecognized command line option ‘-f’
counter.make:29: recipe for target 'unst.e' failed
make: *** [unst.e] Error 1
make: 'remail.e' is up to date.
So my question is what is the difference with and without using -f option in the f77 command line?
The f77 manual page at https://www.unix.com/man-page/v7/1/f77/ says
-f Use a floating point interpreter
(for PDP11's that lack 11/70-style floating point).
If you are not on a PDP-11, it appears that this option would perhaps not be useful at all in the first place.
Probably still review the local documentation, ideally for the system where this set of Makefiles was once created.
GNU Fortran 77 appears to use this option to specify various language options, but then it would not be useful on its own (it takes arguments like -fdollar-ok to enable something called "dollar ok", for example. See the linked manual for an extensive list of these options and their meaning).

Unterminated quoted string : bin/sh

I have the following makefile:-
all:
find | grep -E "\.c\$" | xargs gcc -c -I src -I include -w
gcc -o main *.o -lm -pthread
On running make I get the following error:-
find | grep -E "\.c\ | xargs gcc -c -I src -I include -w
/bin/sh: 1: Syntax error: Unterminated quoted string
Makefile:2: recipe for target 'all' failed
make: *** [all] Error 2
I tried answers to similar questions, but adding a SHEBANG line did not help. Also, I have already escaped the $ character. What am I doing wrong here?
make already does most of what you are trying to do. Assuming you aren't expecting find to look recursively in subdirectories, all you really need is
# Rule for building a c file
.c:
gcc -c -I src -I include -w -o $# $<
# Make sure all C files are compiled, then link the resulting object files
all: *.c
gcc -o main *.o -lm -pthread
If you were expecting to find C source files in subdirectories, you might want to restructure your project slightly, by adding Makefiles to each subdirectory and calling make recursively in those directories.

Error while executing makefile in c

I'm trying to create one makefile using c. For that I have main.c,add.c,minus.c,print.c and Functions.h header file.In this list other than main.c add files have simple add function, subtract function and print function. That Functions.h file have declarations for all functions.
my problem is I have written one makefile. In that I'm trying to redirect the object files into one directory. When I execute the makefile. It throws an error like
make: *** No rule to make target /%.c', needed byobj'. Stop
.
Make file has the lines
CFLAG :=-Wall -g
CC := gcc
INCLUDE:=-I include
OBJDIR:=obj
SRCDIR:=src
TARGET:=bin/Math
CFILES:=$(wildcard src/*.c)
OBJECTS:=$(patsubst src/%.c,obj/%.o,$(CFILES))
$(OBJDIR)/%.o:$(SRCDIR)/%.c
#$(CC) -c $(INCLUDE) -o $# $< $(CFLAG)
(TARGET):$(OBJECTS)
#$(CC) $(CFLAG) -o $# $(OBJECTS)
.PHONY : clean
clean :
-rm -f $(OBJDIR)/*.o
Please help me guys....

makefile pathing issues on OSX

OK, I thought I would try one last update and see if it gets me anywhere. I've created a very small test case. This should not build anything, it just tests the path settings. Also I've setup the path so there are no spaces. The is the smallest, simplest test case I could come up with.
This makefile will set the path, echo the path, run avr-gcc -v with the full path specified and then try to run it without the full path specified. It should find avr-gcc in the path on the second try, but does not.
makefile
TOOLCHAIN := /Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain
PATH := ${TOOLCHAIN}/bin:${PATH}
export PATH
all:
#echo ${PATH}
#echo --------
"${TOOLCHAIN}/bin/avr-gcc" -v
#echo --------
avr-gcc -v
output
JUSTINs-MacBook-Air:Untitled justinzaun$ make
/Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:/usr/sbin:/sbin:/usr/local/bin:/usr/X11/bin
--------
"/Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain/bin/avr-gcc" -v
Using built-in specs.
COLLECT_GCC=/Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain/bin/avr-gcc
COLLECT_LTO_WRAPPER=/Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain/bin/../libexec/gcc/avr/4.6.3/lto-wrapper
Target: avr
Configured with: /Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../gcc/configure --prefix=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --exec-prefix=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --datadir=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --target=avr --enable-languages=c,objc,c++ --disable-libssp --disable-lto --disable-nls --disable-libgomp --disable-gdbtk --disable-threads --enable-poison-system-directories
Thread model: single
gcc version 4.6.3 (GCC)
--------
avr-gcc -v
make: avr-gcc: No such file or directory
make: *** [all] Error 1
JUSTINs-MacBook-Air:Untitled justinzaun$
Original Question
I'm trying to set the path from within the makefile. I can't seem to do this on OSX. Setting the path with PATH := /new/bin/:$(PATH) does not work. See my makefile below.
makefile
PROJECTNAME = Untitled
# Name of target controller
# (e.g. 'at90s8515', see the available avr-gcc mmcu
# options for possible values)
MCU = atmega640
# id to use with programmer
# default: PROGRAMMER_MCU=$(MCU)
# In case the programer used, e.g avrdude, doesn't
# accept the same MCU name as avr-gcc (for example
# for ATmega8s, avr-gcc expects 'atmega8' and
# avrdude requires 'm8')
PROGRAMMER_MCU = $(MCU)
# Source files
# List C/C++/Assembly source files:
# (list all files to compile, e.g. 'a.c b.cpp as.S'):
# Use .cc, .cpp or .C suffix for C++ files, use .S
# (NOT .s !!!) for assembly source code files.
PRJSRC = main.c \
utils.c
# additional includes (e.g. -I/path/to/mydir)
INC =
# libraries to link in (e.g. -lmylib)
LIBS =
# Optimization level,
# use s (size opt), 1, 2, 3 or 0 (off)
OPTLEVEL = s
### You should not have to touch anything below this line ###
PATH := /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:$(PATH)
CPATH := /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/include
# HEXFORMAT -- format for .hex file output
HEXFORMAT = ihex
# compiler
CFLAGS = -I. $(INC) -g -mmcu=$(MCU) -O$(OPTLEVEL) \
-fpack-struct -fshort-enums \
-funsigned-bitfields -funsigned-char \
-Wall -Wstrict-prototypes \
-Wa,-ahlms=$(firstword \
$(filter %.lst, $(<:.c=.lst)))
# c++ specific flags
CPPFLAGS = -fno-exceptions \
-Wa,-ahlms=$(firstword \
$(filter %.lst, $(<:.cpp=.lst)) \
$(filter %.lst, $(<:.cc=.lst)) \
$(filter %.lst, $(<:.C=.lst)))
# assembler
ASMFLAGS = -I. $(INC) -mmcu=$(MCU) \
-x assembler-with-cpp \
-Wa,-gstabs,-ahlms=$(firstword \
$(<:.S=.lst) $(<.s=.lst))
# linker
LDFLAGS = -Wl,-Map,$(TRG).map -mmcu=$(MCU) \
-lm $(LIBS)
##### executables ####
CC=avr-gcc
OBJCOPY=avr-objcopy
OBJDUMP=avr-objdump
SIZE=avr-size
AVRDUDE=avrdude
REMOVE=rm -f
##### automatic target names ####
TRG=$(PROJECTNAME).out
DUMPTRG=$(PROJECTNAME).s
HEXROMTRG=$(PROJECTNAME).hex
HEXTRG=$(HEXROMTRG) $(PROJECTNAME).ee.hex
# Start by splitting source files by type
# C++
CPPFILES=$(filter %.cpp, $(PRJSRC))
CCFILES=$(filter %.cc, $(PRJSRC))
BIGCFILES=$(filter %.C, $(PRJSRC))
# C
CFILES=$(filter %.c, $(PRJSRC))
# Assembly
ASMFILES=$(filter %.S, $(PRJSRC))
# List all object files we need to create
OBJDEPS=$(CFILES:.c=.o) \
$(CPPFILES:.cpp=.o) \
$(BIGCFILES:.C=.o) \
$(CCFILES:.cc=.o) \
$(ASMFILES:.S=.o)
# Define all lst files.
LST=$(filter %.lst, $(OBJDEPS:.o=.lst))
# All the possible generated assembly
# files (.s files)
GENASMFILES=$(filter %.s, $(OBJDEPS:.o=.s))
.SUFFIXES : .c .cc .cpp .C .o .out .s .S \
.hex .ee.hex .h .hh .hpp
# Make targets:
# all, disasm, stats, hex, writeflash/install, clean
all: $(TRG)
$(TRG): $(OBJDEPS)
$(CC) $(LDFLAGS) -o $(TRG) $(OBJDEPS)
#### Generating assembly ####
# asm from C
%.s: %.c
$(CC) -S $(CFLAGS) $< -o $#
# asm from (hand coded) asm
%.s: %.S
$(CC) -S $(ASMFLAGS) $< > $#
# asm from C++
.cpp.s .cc.s .C.s :
$(CC) -S $(CFLAGS) $(CPPFLAGS) $< -o $#
#### Generating object files ####
# object from C
.c.o:
$(CC) $(CFLAGS) -c $< -o $#
# object from C++ (.cc, .cpp, .C files)
.cc.o .cpp.o .C.o :
$(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $#
# object from asm
.S.o :
$(CC) $(ASMFLAGS) -c $< -o $#
#### Generating hex files ####
# hex files from elf
.out.hex:
$(OBJCOPY) -j .text \
-j .data \
-O $(HEXFORMAT) $< $#
.out.ee.hex:
$(OBJCOPY) -j .eeprom \
--change-section-lma .eeprom=0 \
-O $(HEXFORMAT) $< $#
#### Information ####
info:
#echo PATH:
#echo "$(PATH)"
$(CC) -v
which $(CC)
#### Cleanup ####
clean:
$(REMOVE) $(TRG) $(TRG).map $(DUMPTRG)
$(REMOVE) $(OBJDEPS)
$(REMOVE) $(LST)
$(REMOVE) $(GENASMFILES)
$(REMOVE) $(HEXTRG)
error
JUSTINs-MacBook-Air:Untitled justinzaun$ make
avr-gcc -I. -g -mmcu=atmega640 -Os -fpack-struct -fshort-enums -funsigned-bitfields -funsigned-char -Wall -Wstrict-prototypes -Wa,-ahlms=main.lst -c main.c -o main.o
make: avr-gcc: No such file or directory
make: *** [main.o] Error 1
JUSTINs-MacBook-Air:Untitled justinzaun$
If I change my CC= to include the full path:
CC=/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin/avr-gcc
then it finds it, but this doesn't seem the correct way to do things. For instance its trying to use the system as not the one in the correct path.
update - Just to be sure, I'm adding the output of my ls command too so everyone knows the file exist. Also I've added a make info target to the makefile and showing that output as well.
JUSTINs-MacBook-Air:Untitled justinzaun$ ls /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin
ar avr-elfedit avr-man avr-strip objcopy
as avr-g++ avr-nm avrdude objdump
avr-addr2line avr-gcc avr-objcopy c++ ranlib
avr-ar avr-gcc-4.6.3 avr-objdump g++ strip
avr-as avr-gcov avr-ranlib gcc
avr-c++ avr-gprof avr-readelf ld
avr-c++filt avr-ld avr-size ld.bfd
avr-cpp avr-ld.bfd avr-strings nm
JUSTINs-MacBook-Air:Untitled justinzaun$
Output of make info with the \ in my path
JUSTINs-MacBook-Air:Untitled justinzaun$ make info
PATH:
/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:/usr/sbin:/sbin:/usr/local/bin:/usr/X11/bin
avr-gcc -v
make: avr-gcc: No such file or directory
make: *** [info] Error 1
JUSTINs-MacBook-Air:Untitled justinzaun$
Output of make info with the \ not in my path
JUSTINs-MacBook-Air:Untitled justinzaun$ make info
PATH:
/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:/usr/sbin:/sbin:/usr/local/bin:/usr/X11/bin
avr-gcc -v
make: avr-gcc: No such file or directory
make: *** [info] Error 1
JUSTINs-MacBook-Air:Untitled justinzaun$
update - When I have my CC set to include the full path as described above, this is the result of make info.
JUSTINs-MacBook-Air:Untitled justinzaun$ make info
PATH:
/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:/usr/sbin:/sbin:/usr/local/bin:/usr/X11/bin
/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin/avr-gcc -v
Using built-in specs.
COLLECT_GCC=/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin/avr-gcc
COLLECT_LTO_WRAPPER=/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin/../libexec/gcc/avr/4.6.3/lto-wrapper
Target: avr
Configured with: /Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../gcc/configure --prefix=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --exec-prefix=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --datadir=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --target=avr --enable-languages=c,objc,c++ --disable-libssp --disable-lto --disable-nls --disable-libgomp --disable-gdbtk --disable-threads --enable-poison-system-directories
Thread model: single
gcc version 4.6.3 (GCC)
which /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin/avr-gcc
/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin/avr-gcc
JUSTINs-MacBook-Air:Untitled justinzaun$
I tried your example on OSX and Linux, and got the same results that you did. I don't quite understand why that isn't working (and would love to know), but I do have two workarounds that might help.
export SHELL
Instead of setting the PATH in your Makefile, override the SHELL like this:
export SHELL=/Users/whatever/avr-dir/wrapper
Here's a possible version of that wrapper:
#!/bin/bash
PATH="/Users/whatever/avr-dir:${PATH}"
/bin/bash "$#"
Make will invoke this wrapper to run each line of yoru recipes. This is a little ugly, but it did work for me on OSX.
Outside
Fix the PATH outside of make. Perhaps create a script that you run once per login that fixes the PATH in your shell, or create a small script (I usually call it mk) that fixes the PATH and then invokes make passing along any parameters. Here's an exmaple:
#!/bin/bash
PATH="/Users/whatever/avr-dir:${PATH}" exec make "$#"
I know you asked for a Makefile solution, but I thought I would mention this option anyway. It is just my opinion, but things like PATHs tend to be machine specific (and not project specific), and I prefer to keep them separate from source code.
Your problem is not that make failed to find avr-gcc. Your problem is in this line:
$(CC) $(CFLAGS) -mmcu=$(MCU) -c $(input) -o $(output)
Since $(input) and $(output) have not been defined your avr-gcc command-line is incomplete. Try changing that line to this instead:
$(CC) $(CFLAGS) -mmcu=$(MCU) -c $< -o $#
$< and $# are automatic variables defined to mean "the first prerequisite" and "the output target", respectively.
The problem is that make is failing to find avr-gcc, and it's due to the \ in your PATH= line.
$ mkdir /tmp/foo\ bar
$ cd /tmp/foo\ bar
$ (echo "#! /bin/sh"; echo "echo this got run") > execable
$ chmod +x execable
$ mkdir /tmp/tstmake; cd /tmp/tstmake
(now make a Makefile with contents as shown)
$ cat Makefile
PATH := /tmp/foo\ bar:$(PATH)
all:
#echo path is "$(PATH)"
execable
$ make
path is /tmp/foo\ bar:/Users/torek/bin.i386:/Users/torek/scripts:[snipped lots]
execable
make: execable: Command not found
make: *** [all] Error 127
$ ed Makefile
71
1s/\\//p
PATH := /tmp/foo bar:$(PATH)
w
70
q
$ make
path is /tmp/foo bar:/Users/torek/bin.i386:/Users/torek/scripts:[snipped lots]
execable
this got run
Update: this is not the only problem, at least when I use my MBP to simulate the issue. The remaining two are:
CPATH also needs the backslash removed (this is a general rule about these := settings)
CPATH needs to be explicitly exported, by adding the line
export CPATH
to the Makefile.
(The reason you need the backslash sometimes, but not other times, has to do with how many times the string gets passed expliclty to the shell: once when it's in $(CC) but zero times when it is an environment variable or part of $(PATH).)
Seeing as this page didn't have a proper answer, I'll link to this page that does:
How I could add dir to $PATH in Makefile?
For whatever reason OS X does not export PATH unless you set the SHELL variable too.
So:
SHELL=/bin/bash
export PATH:=/foo/bar:$(PATH)
..would work.
I just recently ran into this issue. As other comments suggest, the version of make shipped with MacOS has some issues. Build (as #MadScientist suggests above) or install GNU make from Homebrew. The installed version of make on my system is 3.81 and exhibits the same problem. The version provided from Homebrew (version 4.3) works as expected.
I presume you're using OSX. Figuring out an elegant solution may take a few iterations.
In the meantime try this kludge, and tell us the result:
CC=`avr-gcc`
If what you want is to update your PATH variable, then do:
export PATH=$(shell echo $${PATH}):<paths to add>
Example I did:
File : ./c/luckme.sh
echo "Hello Lucky Me ! "
Makefile :
export PATH=$(shell echo $${PATH}):c:.
all:
#luckyme.sh
output of make:
~$ make
Hello Lucky Me !

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