Makefile with multiple directories - gcc

Question

I wanted to write a makefile for a program that has source files located in different directories, the structure is:
--root(here will be makefile)
--src:
--main.c
--include:
--here are 6 .h files, that are used by other .c files, main.c includes on all of them
--operacje
--suma.c
--iloczyn.c
--roznica.c
--reszta:
macierz.c
--we_wy:
--rest of the .c files
most of .c files include at least one .h file. This is what I wrote so far:
VPATH=./src:./src/include:./src/operacje:./src/reszta:./src/we_wy
CLFAGS = -Wall
CC = gcc
INCLUDE = -I src/include
NAME = macierze
FILE_SOURCE := pliki.c wczytaj_plik.c wypisz_plik.c
CONSOLE_SOURCE := wczytaj_konsola.c wypisz_konsola.c
OTHER_SOURCE := suma.c roznica.c iloczyn.c macierz.c
HEADERS := suma.h roznica.h iloczyn.h wypisz.h wczytaj.h macierz.h
FILE_OBJECTS := $(FILE_SOURCE:.c=.o)
CONSOLE_OBJECTS := $(CONSOLE_SOURCE:.c=.o)
OTHER_OBJECTS := $(OTHER_SOURCE:.c=.h)
%.o: %.c %.h
gcc $(CFLAGS) $(INCLUDE) -c $?
%.o: %.c
gcc $(CFLAGS) $(INCLUDE) -c $? -o $#
finput: HEADERS+=pliki.h
finput: $(FILE_OBJECTS) $(OTHER_OBJECTS) main.o
gcc $(CFLAGS) -o $(NAME) $^ -D WEWY_PLIKI
main.o: main.c $(HEADERS)
gcc $(CFLAGS) $(INCLUDE) -c src/main.c
clean:
rm -rf *.o
The goal is, to make compiled program run a bit differently based on make , hence the -D option and adding
finput: HEADERS+=pliki.h
this finput is the first of the 4 possible options. Each option will be using slightly different set of .c and .h files
Now, when I do
make finput
i get the listing:
gcc -I src/include -c ./src/we_wy/pliki.c ./src/include/pliki.h
gcc -I src/include -c ./src/we_wy/wczytaj_plik.c -o wczytaj_plik.o
gcc -I src/include -c ./src/we_wy/wypisz_plik.c -o wypisz_plik.o
gcc -I src/include -c src/main.c
gcc -o macierze pliki.o wczytaj_plik.o wypisz_plik.o ./src/include/suma.h ./src/include/roznica.h ./src/include/iloczyn.h ./src/include/macierz.h main.o -D WEWY_PLIKI
wczytaj_plik.o: In function `wczytaj':
wczytaj_plik.c:(.text+0x5f): undefined reference to `macierz_alokuj'
main.o: In function `main':
main.c:(.text+0x7e): undefined reference to `suma'
<and other undefined references in main>
I noticed few errors:
1. it doesen't produce .o files from $(OTHER_OBJECTS)
2. there is no -Wall option from $(CFLAGS)
3. and of course it doesen't complete.
I would be grateful for some info, what am I doing wrong.

Answer 1

OTHER_OBJECTS := $(OTHER_SOURCE:.c=.h)
If this is not a typo, it is the explanation for (1.). You rename the files to header files, and the header files are found in VPATH and have no remake rules, so they are included verbatim in $^. Try $(OTHER_SOURCE:.c=.o).
CLFAGS = -Wall
Try CFLAGS instead.

Answer 2

Just to point out that this:
finput: HEADERS+=pliki.h
...
main.o: main.c $(HEADERS)
will not do what you want it to do. Target-specific variables only are in effect inside the recipes of child targets. They do not have any impact on the prerequisite lists (for example).
I urge you to look into methods of automatically generating make dependencies: this is far more efficient (and accurate) than trying to maintain them by hand within the makefile.