Create array from range 11AA to 99ZZ - ruby

I don't know how to make array from range 11AA to 99ZZ. Is it possible to do it in Ruby?
I want this array:
['11AA', '11AB', '11AC',..., '99ZX', '99ZY', '99ZZ']

Try the following:
('11AA'..'99ZZ').to_a

The pseudo code would be:
for i '1' to '9'
for j '1' to '9'
for k 'A' to 'Z'
for l 'A' to 'Z'
insert_in_array(i+j+k+l);
of course the values are stored as strings, with double "" not''.This is a pseudo code, it can be applied in any programming language.

Related

vhdl: Why is aggregate assignment not allowed in this context?

I am trying to use aggregate assignments within a conditional assignment statement in the lines labelled "PROBLEMATIC LINE" in the following code implementation for a priority encoder module.
library ieee;
use ieee.std_logic_1164.all;
entity SN74LS148 is -- 8 to 3 line priority encoder module
port(EI : in std_logic; -- input enable
input : in std_logic_vector(0 to 7); -- 8 bit input bus
A : out std_logic_vector(2 downto 0); -- 3 output bits
GS, EO : out std_logic -- valid bit, enable output
);
end SN74LS148;
architecture behavioral of SN74LS148 is
signal truth_table : std_logic_vector(2 downto 0);
begin
truth_table <= "HHH" when input = (others => 'H') else -- PROBLEMATIC LINE
"LLL" when input(7) = 'L' else
"LLH" when input(6) = 'L' else
"LHL" when input(5) = 'L' else
"LHH" when input(4) = 'L' else
"HLL" when input(3) = 'L' else
"HLH" when input(2) = 'L' else
"HHL" when input(1) = 'L' else
"HHH" when input(0) = 'L' else
"XXX";
A <= truth_table when EI = 'L' else -- device enabled (active low)
"HHH" when EI = 'H' else -- device disabled (all outputs inactive)
"XXX";
GS <= 'H' when EI = 'H' -- invalid when device disabled
or input = (others => 'H') else -- or none of the lines asserted (PROBLEMATIC LINE)
'L';
EO <= 'L' when EI = 'L' and input = (others => 'H') else -- PROBLEMATIC LINE
'H';
end behavioral;
I am using the GHDL compiler. The error that I am getting is
encoder8x3.vhd:28:43: 'others' choice not allowed for an aggregate in this context
truth_table <= "HHH" when input = (others => 'H') else
^
encoder8x3.vhd:46:47: 'others' choice not allowed for an aggregate in this context
or input = (others => 'H') else -- or none of the lines asserted
^
encoder8x3.vhd:50:45: 'others' choice not allowed for an aggregate in this context
EO <= 'L' when EI = 'L' and input = (others => 'H') else
^
I guess I can fix this easily by hardcoding the inputs but what I want to know is why I am getting this error when the size of input has been specified in the port. This is not an ambiguity issue right ?
No, it is an ambiguity issue.
See IEEE Std 1076-1993 7.3.2.2 Array aggregates
The subtype of an array aggregate that has an others choice must be determinable from the context. That is, an array aggregate with an others choice may only appear
a. As an actual associated with a formal parameter or formal generic declared to be of a constrained array subtype (or subelement thereof)
...
Here the actual is your array aggregate associated with a parameter of the subprogram parameter for the overloaded equality operator, which is unconstrained. The type mark of that parameter would be the type std_logic_vector, while this would become a subtype in -2008 to allow subtype resolution specification it'd be unconstrained and the language of -2008 9.3.3.3 Array aggregates has been changed:
The index range of an array aggregate that has an others choice shall be determinable from the context.
That actually implies what's important here, the length of the aggregate array value. See 7.2.2 Relational operators:
Two scalar values of the same type are equal if and only if the values are the same. Two composite values of the same type are equal if and only if for each element of the left operand there is a matching element of the right operand and vice versa, and the values of matching elements are equal, as given by the predefined equality operator for the element type.
These rules also tell us the std_logic weak driving 'H' or 'L' enumeration values either as a scalar or an element of a composite value are not equal to the strong driving '1' and '0' values respectively.
As equality operator is defined by VHDL (7.2.2 of IEEE-1076-1993), there is no direct constraint between operands. For instance, if both operands are of the same array type, they may be not the same length (and equality will be always false), if they are of same length, elements are matched in order (whatever the range of array). This gives no strong constraint between operands.
In some contexts, literal array aggregates with others can be determined from context (initializations, assignments, etc.). Valid cases are listed in 7.3.2.2. Equality operator operands is not one of them.
You may still write an aggregate with an explicit range, for instance input = (input'range => 'H').

Octave: matrix multiplication over a group

I'd like to simply compute multiplication of two matrices.
But instead of real numbers I'd like to use elements of a finite group in the matrix.
Namely I want to use elements of F4={0,1,x,1+x} (so i only have 4 possible elements). In this group, addition and multiplication are well-defined, and the relations x^2=1+x, 1+1=0 and x+x=0 hold.
Since I'm a beginner at programming in Octave, I have no idea how to compute operations with something different than real numbers.
My idea was, that if it's possible to define some operations on a certain set of elements (here F4), then it's maybe possible to use these operations when multiplicating matrices.
I think the most efficient way to do arithmetic with a finite group of possible values and non-standard addition and multiplication is by table lookup.
Table lookup requires matrices to be encoded such that the elements are indices into the list of group elements. And since indexing starts at 1, you'll need to represent {0,1,x,x+1} as {1,2,3,4}.
But aside the awkward mapping of 1=0, 2=1, things are quite straightforward with table lookup. This is some example code I cooked up, it seems to work but I might have made some mistake (and I might have misunderstood the exact arithmetic rules):
function out = group_mtimes(lhs,rhs)
[I,K] = size(lhs);
[K2,J] = size(rhs);
if K~=K2, error('Inner dimensions must agree'), end
out = zeros(I,J);
for j=1:J
for i=1:I
v = 1;
for k=1:K
v = group_scalar_add(v, group_scalar_times(lhs(i,k),rhs(k,j)));
end
out(i,j) = v;
end
end
disp('lhs = ')
group_print(lhs)
disp('rhs = ')
group_print(rhs)
disp('lhs * rhs = ')
group_print(out)
end
function group_print(in)
names = {'0','1','x','1+x'};
disp(names(in)) % Quick-and-dirty, can be done much better!
end
function out = group_scalar_add(lhs,rhs)
table = [
1,2,3,4
2,1,4,3
3,4,1,2
4,3,2,1
];
out = table(lhs,rhs);
end
function out = group_scalar_times(lhs,rhs)
table = [
1,1,1,1
1,2,3,4
1,3,4,2
1,4,2,3
];
out = table(lhs,rhs);
end
For example:
>> lhs=[1,2,3,4;2,3,1,4]';
>> rhs=[2,3;4,1];
>> group_mtimes(lhs,rhs);
lhs =
'0' '1'
'1' 'x'
'x' '0'
'1+x' '1+x'
rhs =
'1' 'x'
'1+x' '0'
lhs * rhs =
'1+x' '0'
'0' 'x'
'x' '0'
'x' '1'
There is no input checking in this code, if the input contains a 5, you'll get and index out of range error.
As I mentioned in a comment, you could make a class that encapsulates arrays of this type. You could then overload plus, times and mtimes (for operators +, .* and *, respectively), as well as disp to write out the values properly. You would define the constructor so that objects of this class always have valid values, this would prevent lookup table indexing errors. Such a class would make working with these functions a lot simpler.
For the special case of Galois fields of even characteristic, such as F4, you can use the functions provided by the communications package from Octave Forge:
Functions reference: Galois Fields of Even Characteristic
Galois fields of odd charactristic are not implemented yet:
Functions reference: Galois Fields of Odd Characteristic

Others => '1' statement in Verilog

I have used VHDL all my life and only been using Verilog for a short time, I have to create a logic in Verilog for a very large array and assign it to 1 or 0 depending on the condition of an input.
Here is my VHDL code
if (data_track == '1' ) then
my_array(MAX-1:MIN) <= (others=> '1');
else
my_array(MAX-1:MIN) <= (others=> '0');
end if;
MAX and MIN are parameters for the block, set during the synthesis depending on the type of system we are accessing.
Is there a way to do this in Verilog easily?
A mix of parameter with curly braces will help in resolving (the inner curly brace will act as replication operator)
Code eg:
parameter MAX = 16;
assign high_val = 1'b1;
assign low_val = 1'b0;
if ( data_track ==1'b1)
my_array[MAX-1:MIN] <= {MAX{high_val}};
else
my_array[MAX-1:MIN] <= {MAX{low_val}};
Here in the above code the if statement with curly brace will propogate MSB to LSB with 1 values resulting in all 1's in our case 16 then result will be a 16'b1111111111111111 and it is the vice versa for else condition
Assuming that data_track is one bit wide, then this can be collapsed into one line by replicating the data_track input and assigning it to my_array:
assign my_array[MAX-1:MIN] = {(MAX-MIN){data_track}};

Apply function to each element in array and store result in an array

I have a function toWords which converts a integer into a word
e.g. toWords(500, tableWords) gives fivehundred
I have an array of numbers h = (1..999).to_a, and I want to go through this array and convert each number into a word and store it in a new array. My current attempt to do this is:
h = (1..999).to_a
Lh = h.each do |i| toWords(i, tableWords) end
However, the contents of Lh is simply the integers from 1 to 999 and not the output of my toWords function. How do I do this? I'm thinking of something along the lines of sapply in R.
Even better is if my new array Lh can have two columns, the first column containing the integers in number format, and the second column would be the corresponding number in words.
Thank you!
To get your two columns, you can do the following
(1..999).map {|x| [x, toWords(x, tableWords)]}
As per Cicada's comment, the answer is:
Lh = h.map{|x| toWords(x, tableWords)}

XQUERY: Finding number of occurences from one query in another

I know there should be a simple solution to this but I can't seem to figure it out. Suppose I have a query which returns something like:
xs:untypedAtomic("A"),
xs:untypedAtomic("B"),
xs:untypedAtomic("C")
and I have another one which returns something like:
xs:untypedAtomic("B"),
xs:untypedAtomic("B"),
xs:untypedAtomic("B"),
xs:untypedAtomic("A"),
xs:untypedAtomic("C"),
xs:untypedAtomic("A")
How do I get the number of occurences for each letter in the second table?
Use:
for $s in $vMySeq
return
($s, count(index-of($vSeq, $s)))
where $vMySeq is the result of the first query and $vSeq is the result of the second query.
A complete example:
let $vMySeq := ('A', 'B', 'C'),
$vSeq := ('B', 'B', 'B', 'A', 'C', 'A')
return
for $s in $vMySeq
return
($s, count(index-of($vSeq, $s)))
The result is:
A 2 B 3 C 1
I propose two variants, one containing a group by clause, that happens to show the wanted characteristics for the non-grouping variable $cntr (see http://www.w3.org/TR/xquery-30/#id-group-by for details on how grouping is performed):
let $seq := ("B", "B","B","A","C","A")
let $cntr := 1
for $it in $seq
group by $it
return <el>{
attribute num {count($cntr)},
$it
}</el>
My second, maybe more obvious, variant would be:
let $seq := ("B", "B","B","A","C","A")
for $v in distinct-values($seq)
return <el>{
attribute num {count($seq[. = $v])},
$v
}</el>
As my answer has been a little imprecise, here comes a minor correction inspired by Dimitre Novatchev answer.
Instead of using:
for $v in distinct-values($seq)
you may as well use
for $v in ("A", "B", "C") (: this is sequence 1 as stated in the question:)
which more closely resembles the questions two sequences, given that this very sequence contains distinct values only.

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