i'm getting this error:
make:24: *** missing separator. Stop.
Although i changed all space character with tab in line 24.
Line24:arm_v5t_le-gcc $FILES $INCLUDES $LIBS -o $TARGET
Here is the code:
#DM_serial2_make
export PATH="$PATH:/opt/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin:/opt/mv_pro_5.0/montavista/pro/bin:/opt/mv_pro_5.0/montavista/common/bin"
TARGET="/home/cilem/Desktop/06.05.2012/DM_serial2"
INCLUDES=" -I /home/cilem/Desktop/06.05.2012/libxml2 \
-I /home/cilem/Desktop/06.05.2012/gstreamer-0.10 \
-I /home/cilem/Desktop/06.05.2012/gstreamer-0.10/gst/interfaces \
-I /home/cilem/Desktop/06.05.2012/glib-2.0 \
-I /home/cilem/Desktop/06.05.2012/glib-2.0/include"
LIBS=" -L /home/cilem/Desktop/06.05.2012/lib/ -l:libgstreamer-0.10.so.0 \
-L /home/cilem/Desktop/06.05.2012/lib/ -l:libgstinterfaces-0.10.so.0 \
-L /home/cilem/Desktop/06.05.2012/lib/ -l:libgobject-2.0.so.0 \
-L /home/cilem/Desktop/06.05.2012/lib/ -l:libgmodule-2.0.so.0 \
-L /home/cilem/Desktop/06.05.2012/lib/ -l:libxml2.so.2 \
-L /home/cilem/Desktop/06.05.2012/lib/ -l:libgthread-2.0.so.0 \
-L /home/cilem/Desktop/06.05.2012/lib/ -l:libglib-2.0.so.0"
FILES="DM_serial2.c"
arm_v5t_le-gcc $FILES $INCLUDES $LIBS -o $TARGET
That looks like a shell script. Shell scripts are not makefiles, and vice versa. You need to find a good tutorial on make, or read the GNU make manual.
For example, you should not have any quoting in your variable values.
Second, variable expansions in make require the variables to be surrounded by parens or curly braces: $(FILES) or ${FILES}.
Third, as piokuc says, that line is not a valid make rule. A make rule has the form:
<target> : <dependencies...>
<commands...>
where the indentation of the commands... must be TAB characters. This rule says "you can build target whenever it's older than any of dependencies... by running commands...". The target and dependencies must (usually) be files, so you definitely don't want to use $(INCLUDES) or $(LIBS) in that list as those are compiler flags.
You probably want something like this, although it could be improved:
$(TARGET): $(FILES)
arm_v5t_le-gcc $(FILES) $(INCLUDES) $(LIBS) -o $(TARGET)
You've got other weird things here. You don't need to provide the same directory over and over with the -L flag. Once is enough. Also I'm not familiar with the -l:libfoo.a construct; usually it's just -lfoo.
I think the last line should be replaced with something like:
$TARGET: $FILES $INCLUDES $LIBS
arm_v5t_le-gcc $FILES $INCLUDES $LIBS -o $TARGET
The above line (the one starting with arm_v5t_le-gcc) should start with a tab, not spaces.
Related
Trying to build FFMPeG from source with this configure command
./configure --x86asmexe=/home/mahmood/yasm-1.3.0/bin/yasm --enable-cuda --enable-cuvid --enable-nvenc --enable-nonfree --enable-libnpp \
--extra-cflags=-I"~/cuda-10.1.168/include,~/nv_codec_headers/include/ffnvcodec/" \
--extra-ldflags=-L"~/cuda-10.1.168/lib64/,~/nv_codec_headers/lib/pkgconfig/"
I get this error in config.log which it can not find npp.h. Please note that additional include folders are given to the gcc command and npp.h actually exists in the path I gave.
gcc -D_ISOC99_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE \
-D_POSIX_C_SOURCE=200112 -D_XOPEN_SOURCE=600 -DPIC -I~/cuda-10.1.168/include,~/nv_codec_headers/include/ffnvcodec/ \
-std=c11 -fomit-frame-pointer -fPIC -pthread -c \
-o /tmp/ffconf.dk4hdPMF/test.o /tmp/ffconf.dk4hdPMF/test.c
/tmp/ffconf.dk4hdPMF/test.c:1:10: fatal error: npp.h: No such file or directory
#include <npp.h>
^~~~~~~
And npp.h is here
$ ls -l ~/cuda-10.1.168/include/npp.h
-rw-r--r-- 1 mahmood mahmood 2864 Dec 16 18:24 /home/mahmood/cuda-10.1.168/include/npp.h
How can I fix that?
This is not really a makefile question.
You have two problems. First, you cannot pass multiple paths to the -I option by separating them with commas, like -I<dir1>,<dir2>. You have to use multiple -I options, like -I<dir1> -I<dir2>.
Second, the ~ is a special character expanded by the shell before it invokes the compiler, and the shell will not expand the ~ everywhere in the command line. For example if you run echo foo~bar or even echo foo~/bar the shell will not treat ~ as a reference to your home directory and will not expand it. It's only treated specially if it's the first character in a word. You need to either use the $HOME environment variable or else you need to add a space between the -I and the directory so that the ~ is the first character in the word: -I$HOME/<dir1> -I$HOME/<dir2> or -I ~/<dir1> -I ~/<dir2>.
If you use $HOME remember you need to escape the $ in your make recipe.
I am working on GNUmake to create symlink to specific file by parsing whole directory which has a folder which needs to be linked.
Here is my makefile snippet.
TGT_LINK = /lan/test/workspace/build/tools
all_target: release_buid complete_test $(TGT_LINK)
$(TGT_LINK):
if [ ! -d $# ]; then mkdir -p $#; fi
cd $#; \
tar_ln=`\ls -d synopsystcl* | sed 's/synopsys//'`; \
sour_dir=`\ls -d synopsystcl*`; \
if ! [ -e $tar_ln ]; then \
ln -s $sour_dir $tar_ln; \
fi
Directory : /lan/test/workspace/build/tools Contains following content in it
polaris.so link.a dynamic.so kbuild.so README.txt license.txt synopsystcl5.5 build.json
Here i am trying to create symlink with name tcl5.5 pointing to synopsystcl5.5 with my above target $(TGT_LINK) code.
tcl5.5 -> synopsystcl5.5
After successful completion of two targets : release_buid complete_test , build is not proceeding to go for next target $(TGT_LINK) to create symlink. Could you please help whats wrong in code?
I would let make itself to check and recreate symlink as needed, i.e.:
TGT_LINK = /lan/test/workspace/build/tools
all_target: release_buid complete_test symlink
.PHONY: symlink
symlink: $(patsubst $(TGT_LINK)/tcl%, $(TGT_LINK)/synopsystcl%, $(wildcard $(TGT_LINK)/tcl*))
$(TGT_LINK)/synopsystcl%: $(TGT_LINK)/tcl%
set -e; \
cd $(#D); \
rm -f $(#F); \
ln -s $(<F) $(#F)
I would also consider reordering targets if there are dependencies indeed. One should never assume that dependency list is processed left to right; it will also lead to errors when parallel build (-j) is involved. If you have dependencies that something should happen before something else, it should be explicitly stated, e.g.:
all_target: symlink
symlink: complete_test
complete_test: release_buid
I'm trying to make a Makefile that exports a markdown file to a pdf file that uses the same filename as the original markdown file. I used "basename" command but it produces "inputfile.md.pdf" instead of "inputfile.pdf".
Please see my code below (I adapted a code I found on the Internet. Thank you!):
.PHONY: pdf docx apa format
FILES := $(wildcard ./*.md)
pdf:
for file in $(FILES); do \
pandoc $$file \
--bibliography mypath \
--csl mypath \
--filter pandoc-citeproc \
--template eisvogel \
-o $(basename $$file).pdf; \
open $(basename $$file).pdf; \
done
Anyone who can help me? I'm a novice in Makefile (and programming in general) so any detailed help would be very much appreciated.
I also tried these codes below, but they generated an error message:
-o $(basename -s ".md" $$file).pdf; \
-o $(basename -s .md $$file).pdf; \
The way you write $(basename …) you get the basename make function. This would normally the right thing, but you try to reference a shell variable file in its argument, which is unavailable at the make layer.
In this case, it is probably easiest to call the basename shell utility, at the shell level. Therefore, you need to escape the $ to get shell substitution, like this:
-o "$$(basename -s .md $$file)".pdf; \
open "$$(basename -s .md $$file)".pdf; \
Alternatively, you could try to move the loop to the make layer, perhaps using foreach.
So I have a file example.cpp which I have to compile with g++.
$ g++ nginx.cpp libuaparser_cpp.a -I ~/Desktop/boost_1_68_0/ -I /usr/local/mysql-connector-c++-8.0.12/include/jdbc/ -L /usr/local/mysql-connector-c++-8.0.12/lib64/ -L ~/Desktop/boost_1_68_0/stage/lib -L /usr/local/lib/ -L /Users/Shray/Desktop/boost_1_68_0/stage/lib/ ~/Desktop/boost_1_68_0/stage/lib/libboost_regex.a -lyaml-cpp -lboost_regex -std=c++11 -lmysqlcppconn
So instead of writing so much, I put the rest of the parameters in a variable in my terminal.
$ myvar="libuaparser_cpp.a -I ~/Desktop/boost_1_68_0/ -I /usr/local/mysql-connector-c++-8.0.12/include/jdbc/ -L /usr/local/mysql-connector-c++-8.0.12/lib64/ -L ~/Desktop/boost_1_68_0/stage/lib -L /usr/local/lib/ -L /Users/Shray/Desktop/boost_1_68_0/stage/lib/ ~/Desktop/boost_1_68_0/stage/lib/libboost_regex.a -lyaml-cpp -lboost_regex -std=c++11 -lmysqlcppconn"
$ g++ nginx.cpp $myvar
But this gives me an error.
clang: error: no such file or directory: '~/Desktop/boost_1_68_0/stage/lib/libboost_regex.a'
Why is this error coming? Since I am just adding the variables value. Any help would be much appreciated.
Don't use variables to store a content that is a list, use arrays! Also ~ doesn't expand under quotes (single or double)
myVarArgs=()
myVarArgs=( libuaparser_cpp.a
-I ~/Desktop/boost_1_68_0/
-I /usr/local/mysql-connector-c++-8.0.12/include/jdbc/
-L /usr/local/mysql-connector-c++-8.0.12/lib64/
-L ~/Desktop/boost_1_68_0/stage/lib
-L /usr/local/lib/
-L /Users/Shray/Desktop/boost_1_68_0/stage/lib/
~/Desktop/boost_1_68_0/stage/lib/libboost_regex.a
-lyaml-cpp
-lboost_regex
-std=c++11
-lmysqlcppconn
)
and run a full-quoted expansion to preserve the args from breaking up on presence of special characters.
g++ nginx.cpp "${myVarArgs[#]}"
Tilde expansion happens before variable expansion, so ~ in a variable isn't expanded to your home directory by the shell. Use the full path.
This question already has answers here:
Write Dollar sign in sed command pattern inside makefile
(2 answers)
Closed last month.
So I am attempting to run a sed command from a Makefile on RaspberryPi running Raspbian. The commands I am using works perfectly when I type them directly into the terminal, but when I attempt to execute them from a Makefile I get the following feedback:
sed: -e expression #1, char 14: extra characters after command
#
# Quick and dirty Makefile for logsnag
#
CC = gcc
INCLUDE = -I.
CFILES = myThing.c
OBJS = myThing.o
CFLAGS = ${INCLUDE}
all: myThing
myThing: ${OBJS}
${CC} ${CFLAGS} ${OBJS} -o myThing
myThing.o: ${CFILES}
${CC} ${CFLAGS} myThing.c -c
install: myThing
sudo cp -f myThing/usr/local/bin
sudo cp -f ../bin/startlogging.sh /usr/local/bin
sudo cp -f ../cfg/rotateThing.cfg /etc
if [ ! -d /var/log/thingLog ]; then\
sudo mkdir /var/log/thingLog;\
fi;
sudo sed -i -e '$i touch /var/log/thingLog/thing.log /var/log/thingLog/myThing \n' /etc/rc.local;
sudo sed -i -e '$i logrotate -f /etc/rotateThing.cfg \n' /etc/rc.local;
sudo sed -i -e '$i touch /var/log/thingLog/thing.log /var/log/thingLog/myThing \n' /etc/rc.local;
sudo sed -i -e '$i /usr/local/bin/startlogging.sh > /var/log/thingLog/myThing 2>&1 & \n' /etc/rc.local;
clean:
rm -f myThing *.o
Your problem is that Makefile variable expansion looks a lot like shell variable expansion. That is, if you have a single-letter variable in a Makefile:
X=Some string
Then you refer to this variable like:
$X
So when you have a command like this in one of your build stanzas:
sed -i -e '$i /usr/local/bin/startlogging.sh > /var/log/thingLog/myThing 2>&1 & \n'
The $i gets replaced by make (with an empty string), resulting in
an invalid sed command. You can fix this by escaping the $ by
doubling it:
sed -i -e '$$i /usr/local/bin/startlogging.sh > /var/log/thingLog/myThing 2>&1 & \n'
This is discussed in the Make
documentation.