How to execute SED command from Makefile [duplicate] - bash

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Write Dollar sign in sed command pattern inside makefile
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So I am attempting to run a sed command from a Makefile on RaspberryPi running Raspbian. The commands I am using works perfectly when I type them directly into the terminal, but when I attempt to execute them from a Makefile I get the following feedback:
sed: -e expression #1, char 14: extra characters after command
#
# Quick and dirty Makefile for logsnag
#
CC = gcc
INCLUDE = -I.
CFILES = myThing.c
OBJS = myThing.o
CFLAGS = ${INCLUDE}
all: myThing
myThing: ${OBJS}
${CC} ${CFLAGS} ${OBJS} -o myThing
myThing.o: ${CFILES}
${CC} ${CFLAGS} myThing.c -c
install: myThing
sudo cp -f myThing/usr/local/bin
sudo cp -f ../bin/startlogging.sh /usr/local/bin
sudo cp -f ../cfg/rotateThing.cfg /etc
if [ ! -d /var/log/thingLog ]; then\
sudo mkdir /var/log/thingLog;\
fi;
sudo sed -i -e '$i touch /var/log/thingLog/thing.log /var/log/thingLog/myThing \n' /etc/rc.local;
sudo sed -i -e '$i logrotate -f /etc/rotateThing.cfg \n' /etc/rc.local;
sudo sed -i -e '$i touch /var/log/thingLog/thing.log /var/log/thingLog/myThing \n' /etc/rc.local;
sudo sed -i -e '$i /usr/local/bin/startlogging.sh > /var/log/thingLog/myThing 2>&1 & \n' /etc/rc.local;
clean:
rm -f myThing *.o

Answer 1

Your problem is that Makefile variable expansion looks a lot like shell variable expansion. That is, if you have a single-letter variable in a Makefile:
X=Some string
Then you refer to this variable like:
$X
So when you have a command like this in one of your build stanzas:
sed -i -e '$i /usr/local/bin/startlogging.sh > /var/log/thingLog/myThing 2>&1 & \n'
The $i gets replaced by make (with an empty string), resulting in
an invalid sed command. You can fix this by escaping the $ by
doubling it:
sed -i -e '$$i /usr/local/bin/startlogging.sh > /var/log/thingLog/myThing 2>&1 & \n'
This is discussed in the Make
documentation.