I'm trying to do this from the command prompt:
C:/>nmake makefile
But I keep getting this error
Makefile(90) : fatal error U1000: syntax error : ')' missing in macro invocation
What does the number 90 refer to?
Any one can help?
If any one would like to see the Makefile it's here Makefile
p.s: I use windows 7
Line 90 of the Makefile is:
LDSHARED = $(CC) -shared $(if $(filter-out -g -g0,$(debugflags)),,-s)
90 is the line-number of the error. I suspect this makefile isn't meant to be used in nmake, since the syntax resembles gnu-make more than nmake.
You will probably have more luck if you run gnumake (gmake or possibly simply make).
Or, you could try to rewrite the makefile using the preprocessor macros, but it will require understanding what they are supposed to do.
http://msdn.microsoft.com/en-US/library/7y32zxwh%28v=vs.80%29.aspx
Related
I am a student, and for my homework i was asked to create a few simple programs, a makefile, and a run script. No matter what I try, I keep receiving the same error message when typing "make" as a command in the server where I am to work on and submit this homework. I have spent many hours trying to resolve this on my own, and I believe that this error is outside the scope of my education thus far.
I have attached the makefile.
all: define calcdrawing encrypt
define: define.cpp
g++ define.cpp -o define
calcdrawing: calcdrawing.cpp
g++ calcdrawing.cpp -o calcdrawing
encrypt: encrypt.cpp
g++ encrypt.cpp -o encrypt
I receive the following error message:
Makefile:1: *** Malformed target-specific variable definition. Stop.
Any help is appreciated.
you cannot use the keyword define as you intended
replace your code make file with
all: mydefine calcdrawing encrypt
mydefine: define.cpp
g++ define.cpp -o define
calcdrawing: calcdrawing.cpp
g++ calcdrawing.cpp -o calcdrawing
encrypt: encrypt.cpp
g++ encrypt.cpp -o encrypt
change my define to any name
I'm facing an issue with a simple makefile and gcc (MinGW with Windows 10).
This is my simple makefile
IJNI=-I"C:\Program Files (x86)\Java\jdk1.7.0_79\include"
IJNIWIN32=-I"C:\Program Files (x86)\Java\jdk1.7.0_79\include/win32"
CC=gcc
default: main
main: lowlevelAccess.o
$(CC) $(IJNI) $(IJNIWIN32) -c lowlevelAccess -o lowlevelAccess.o
When from a command promp I launch make, I obtain:
gcc -c -o lowlevelAccess.o lowlevelAccess.c
lowlevelAccess.c:7:17: fatal error: jni.h: No such file or directory
#include <jni.h>
^
compilation terminated.
make: *** [lowlevelAccess.o] Error 1
What is wrong?
Thank you!
You aren't adding your -I flags on the lowlevelAccess.o compilation but that's the rule that needs it (not the linking rule where you have it now).
Try adding CFLAGS += $(IJNI) $(IJNIWIN32) to your makefile (possibly use CPPFLAGS instead I'm not sure offhand which is technically more correct here).
See Variables Used by Implicit Rules for what those variables are and Catalogue of Built-In Rules (or the output from make -qp) to see what the default rules that use those variables look like.
I am trying to download the Shakespeare to C compiler, and I have gotten to the point where I am trying to run the Makefile. I have tried nmake -f Makefile, but that returns fatal error U1000 on line 41:
I can't find anything wrong with the Makefile. There is the same number of "(" and ")".Line 41 says MAKESCANNERINCLUDE = $(wildcard $(INCLUDEPATH)/*.{wordlist,metaflex}).
$(wildcard …) is a function call. Function calls are a GNU make extension to the standard make syntax. Nmake expects a variable reference which would be just $(something), so when it sees a space instead of a closing parenthesis, it reports a syntax error.
Use GNU make instead of Nmake.
I have the following makefile when type make i got the following output. why is gcc gets called in this case?
nasm -felf ./source/multiboot.s
gcc multiboot.o -o multiboot
gcc: error: multiboot.o: No such file or directory
gcc: fatal error: no input files
compilation terminated.
make: *** [multiboot] Error 4
makefile:
CC=gcc
ASM=nasm
ASMFLAG=-felf
SOURCE=./source/
all: multiboot
multiboot.o: $(SOURCE)multiboot.s
$(ASM) $(ASMFLAG) $(SOURCE)multiboot.s
The "all" command depends on "multiboot", but there is no explicit rule defining how to produce "multiboot". In this case, Make uses a predefined rule that understands that, if the "$target.o" target exists, then "$target" can be constructed from "$target.o" by running the linker (in this case, GCC).
It seems like the problem in this case is that your instructions for the "multiboot.o" command does not actually produce the file "multiboot.o" as output. Try simply doing:
multiboot.o: multiboot.s
(That is, without specifying the command to run). Simply declaring this dependency should, by a similar mechanism, result in an implicit rule/command to create the "multiboot.o" output from "multiboot.s".
I'd like to make below nmake code to produce check.mak file with the following contents:
$(A)
instead I get the following error:
"NMAKE : fatal error U1040: internal error : macro expansion"
Any suggestions?
My nmake version is 9.00.30729.01 (VC 2008).
OPTION = A
FILE = check.mak
all :
#echo "$$($(OPTION))" > $(FILE)
This looks like a bug in NMAKE. After some experimentation I found that the following work-around gives you the output you want, although it's a little ugly:
OPTION=A
FILE=check.mak
LPAREN=(
RPAREN=)
all:
echo $$$(LPAREN)$(OPTION)$(RPAREN) > $(FILE)
For what it's worth, I also tried your original with the NMAKE emulator that my company sells, and found that it was able to process the makefile with no errors, which is why I feel confident in saying that the observed behavior is a bug in the NMAKE implementation rather than a limitation of the NMAKE syntax.
Hope that helps,
Eric Melski