I am new to VHDL and FPGA. I have a Cyclone 2, DE 1 board. I am trying to program in VHDL such that it produces an animation of something (Say an algorithm). I have worked on the board and played with switches. Now, the biggest challenge for me is to get the display. For simple programs, I load the .sof file and directly manipulate the switches. Now, I downloaded a VHDL code that draws a rectangle to understand VGA and compiled it. When I load the .sof files, it loads but I do not see anything on the screen. My question is, Should VGA involved files be loaded/run in any different manner? I see that lots of material is available for xilinx but not for cyclone 2. Can anyone help me as to how the VGA works with respect to coding, compiling and running? I know the theory, need some basic practical knowledge.
All you need is to write a VGA driver. I learned it on this site. The example is pretty suitable for one who isn't familiar with VGA. You can download example code as well. Pay attention to the timing specifications for various VGA modes at the bottom of that page.
Also this teaches how to write a Pong game. Have fun with it:).
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I’m pretty new to coding with vhdl and i just finished making a simple game using a pretty rough vga driver that i made. The last thing now that i need to do is hook up a joystick to be able to control the object in the game( this game is a mini project so i have to present it and using the onboard switches wouldn’t cut it). The problem is that the joystick gives an analog input and i don’t know how to include that in my vhdl program or if its even possible. I’m using a de-10 lite board. I’m sorry if my question is messy and i hope I made it clear for you. Thx in advance.
DE10-Lite is built with MAX 10 fpga which has two on-chip ADCs, and the board has analog buffers to scale 5v analog inputs down to acceptable voltage of 2.5v.
You'll need to instantiate "Modular ADC core" and PLL to clock it.
Depending on your project needs you can instantiate just the ADC control core (it has simple streaming interface), or "standard sequencer with avalon-mm sample storage".
Check with the board's manuals to find which pins are connected to banks with ADC.
Apparently, there's an example project for ADC included with "CD-ROM" that you can download from Terasic site.
I am new to fpga and i need to understand one thing.
In mcu, the code must be specific to hardware i cannot use raspberry pi code on arduino. However since the fpga chip looks at the verilog or vhdl code and creates the circuit we have designed, Can the same vhdl or verilog code be used on different fpga boards(by only editing the clockspeed or pin names accordingly) if there is enough gate source?
I have basys2 board and there are more tutorials on different boards if same code and logic would work then i will not buy another board and learn on basys2 by using different board sources.
Yes both of them will work well. If it is plain code(without any library as in VHDL) it will work.
Right now, I am trying on place-routing on encounter, but when I search on web, I always see the tuition about quartus routing. For curious, I try to find out the difference between two of them. However, there is not any exact answer right now. But when I moving the layout of these two tools made, I feel like quartus' layout is look like making on a settle down chip. But encounter would give me more customly feeling. Thus, I suppose quartus for FPGA encounter for ASIC. Am I right? If not, plz tell me the exact story.
Encounter is a place and route tool for custom silicon, so it can pick any cell from a library, put it anywhere within a placement block, and route metal to it on any available layer as needed. The output of Encounter is a GDSII file showing what polygons need to be created on each layer as part of the silicon manufacturing process.
An FPGA has already placed all of the available transistors and wires within the device. Quartus (or ISE, for Xilinx) maps logic into LUTs (the logic unit within an FPGA) and figures out how to connect the LUTs using available tracks between the logic blocks. The output of Quartus is a bit stream which tells what values to put in to each LUT on the device and which routing tracks to select/connect between the LUTs.
I am working on a PXI system from National Instruments. It has an FPGA card that I have connected externally to a sensor.
I would like to know how to perform a "cycle accurate" simulation that includes a custom external stimulus that emulates the sensor.
There is a lot of example for simulating the labView -> FPGA -> labView interfaces, but nothing for LabView -> FPGA -> external hardware.
If it hasn't been a NI FPGA system, I would have written an HDL test bench for that, but within the NI FPGA framework, I can't figure out where to put my test bench.
In fact there is a place to put an HDL test bench, but as I said, the only available interface to test is the one between the labView code and the FPGA, and not between the FPGA and the external FPGA pins.
Thanks
This is a right pain (IMHO).
Last time I used Labview FPGA (admittedly a couple of years ago) it had no clue about cycle accurate simulation.
I had to build ordinary labview "testbenches" around each Sub VI - the Sub VI goes in a loop within the testbench VI.
Then link all the subvis together within single-cycle-timed-loops at the top-level. That top level is then not simulate-able, you just have to build it and see :( As you probably agree - this is very alien to the usual FPGA flow.
Simulating right up to the pins (and then the hardware outside also) is just not possible (as far as I know, yet) - it is promised at some point...
I'm interested in starting a hobbyist project, where I do some image processing by interfacing HW and SW. I am quite a newbie to this. I know how to do some basic image processing in Matlab using the existing image processing commands.
I personally enjoy working with HW and wanted to a combination of HW/SW to be able to do this. I've read articles on people using FPGAs and just basic FPGAs/micro-controllers to go about doing this.
Here is my question: can someone recommend languages I should consider that will help me with interfacing on a PC? I image, the SW part would essentially be a GUI and is place-holder for all the processing that is done on the HW. Also in-terms of selecting the HW and realistically considering what I could do on the HW, could I get a few recommendations on that too?
Any recommendations will be appreciated!
EDIT: I read a few of the other posts saying requirements are directly related to knowing what kind of image processing one is doing. Well initially, I want to do finger print recognition. So filtering and locating unique markers in the image etc.
It all depends on what you are familiar with, how you plan on doing the interface between FPGA and PC, and generally the scale of what you want to do. Examples could be:
A fast system could for instance consist of a Xilinx SP605
board, using the PCI Express interface to quickly transfer image
data between PC and FPGA. For this, you'd need to write a device
driver (in C), and a user-space application (I've done this in
C++/Qt).
A more realistic hobbyist system could be a Xilinx SP601
board, using Ethernet to transfer data - you'd then just have to
write a simple protocol (possibly using raw sockets (no TCP/UDP) to
make the FPGA side Ethernet simpler), which can be done in basically
any language offering network access (there's a Xilinx reference
design for the SP605 demonstrating this).
The simplest and cheapest solution would be an FPGA board with a
serial connection - you probably wouldn't be able to do any
"serious" image processing with this, but it should be enough for
very simple proof-of-concept stuff, although the smaller FPGA devices used o these boards typically do not have much on-board memory available.
But again, it all depends on what you actually want to do.