I’m pretty new to coding with vhdl and i just finished making a simple game using a pretty rough vga driver that i made. The last thing now that i need to do is hook up a joystick to be able to control the object in the game( this game is a mini project so i have to present it and using the onboard switches wouldn’t cut it). The problem is that the joystick gives an analog input and i don’t know how to include that in my vhdl program or if its even possible. I’m using a de-10 lite board. I’m sorry if my question is messy and i hope I made it clear for you. Thx in advance.
DE10-Lite is built with MAX 10 fpga which has two on-chip ADCs, and the board has analog buffers to scale 5v analog inputs down to acceptable voltage of 2.5v.
You'll need to instantiate "Modular ADC core" and PLL to clock it.
Depending on your project needs you can instantiate just the ADC control core (it has simple streaming interface), or "standard sequencer with avalon-mm sample storage".
Check with the board's manuals to find which pins are connected to banks with ADC.
Apparently, there's an example project for ADC included with "CD-ROM" that you can download from Terasic site.
Related
I'm a beginner in STM32 MCU's and I need to record an ECG signal with 1000 Hz sampling rate.
As an autonomous student, I have been reading a lot of online tutorials, but I can't understand what are the best practices to do this...I mean, should I continue learning the basics of STM32 with HALs library? And how people change the sampling rate of a signal? What are the right steps (the best practices)?
I'm a little confused about all the information that I have been learning on the internet.
Should I continue learning the basics of STM32 with HALs library?
Yes, otherwise you would get into details of the ADC registers that are not that relevant to you.
What are the right steps (the best practices)?
No sure about right steps but here some useful ones:
Use STM32CubeMX
Get a basic program working , blink led or reading a button...etc
Implement a simple ADC program by Enabling your ADC module trough STM32CUbeMX , read a constant voltage and store it in a variable that you can read using debug mode.
Implement a simple Timer program
Combine them both timer providing your sample rate and ADC sampling your EKG channels
Once you start doing progress more specific questions would pop up, then you can continue asking on this site :)
Recommend readings Mastering STM32 by Carmine Noviello and STM32 user manual
Use timer event to trigger the ADC conversion. It is 100% precise.
I am new to fpga and i need to understand one thing.
In mcu, the code must be specific to hardware i cannot use raspberry pi code on arduino. However since the fpga chip looks at the verilog or vhdl code and creates the circuit we have designed, Can the same vhdl or verilog code be used on different fpga boards(by only editing the clockspeed or pin names accordingly) if there is enough gate source?
I have basys2 board and there are more tutorials on different boards if same code and logic would work then i will not buy another board and learn on basys2 by using different board sources.
Yes both of them will work well. If it is plain code(without any library as in VHDL) it will work.
I am trying to run different open source projects/games on my DE2-115 Altera board, however, these projects are usually developed on different boards like: Xilinx Spartan 3, DE0, DE1, ...etc.
My question is, what are generally the things I need to change in such projects in order to make them successfully run on my board?
The first thing I usually do is to change board type and import my board's pin assignment file. But still the projects compile successfully but don't give the expected functionality. I'm using Quartus II design software.
Many thanks!
While this is a very broad question, in general, to port a project from one FPGA to another, it will likely take more than changing the board type and simply importing a pin assignments file. Here are a few things to consider:
You do need to take the code, typically in a project, and either change the project to use the target FPGA or create a new project to use the target FPGA.
You must make sure the target board has all the needed hardware components as the board the project was originally designed for. This includes buttons, switches, LEDs, seven segments, VGA/Video ports, Audio ports, etc. All that hardware must be at least available on the target board.
If you are lucky and the same or comparable hardware is existent on the target port, you need to be sure the IO of the top level module of the code properly maps to the hardware on the target board. The original pin assignments for the original board are probably included, but you need to be sure you do these assignments for the target board so all IO goes where its supposed to. This can easily be more involved than simply importing a pin assignments file as you need to be sure the top level IO and the pin assignments file use the same net names, ie, Altera uses things like HEX0 for a seven segment, but if the top level IO calls this sseg0, the import will not properly assign the pins.
In most cases (at least for things like video, audio and anything more complicated than an led or push button), the interfaced for the various components on the board will NOT be the same. Now you will have to modify the original code to use the target board's hardware instead of the original board's hardware.
Not only the boards hardware, but some stuff inside the FPGA might not be compatible. If the project uses special IP cores, these will have to be replaced or modified to the target FPGA. This will take some effort for chips of different families (like a port from a Altera Cyclone III to an Altera Cyclone IV or Cyclone IV SE to Cyclone IV E) and even worse between manufacturers. So things might not even port, and if the target FPGA is much smaller than the original FPGA, the design might not even fit at all.
The short answer is that porting an FPGA project designed for one board to another can be alot more involved than simply opening the project and changing a setting or two; it really depends on the project, its original target and the new target you want to synthesize to.
I am new to VHDL and FPGA. I have a Cyclone 2, DE 1 board. I am trying to program in VHDL such that it produces an animation of something (Say an algorithm). I have worked on the board and played with switches. Now, the biggest challenge for me is to get the display. For simple programs, I load the .sof file and directly manipulate the switches. Now, I downloaded a VHDL code that draws a rectangle to understand VGA and compiled it. When I load the .sof files, it loads but I do not see anything on the screen. My question is, Should VGA involved files be loaded/run in any different manner? I see that lots of material is available for xilinx but not for cyclone 2. Can anyone help me as to how the VGA works with respect to coding, compiling and running? I know the theory, need some basic practical knowledge.
All you need is to write a VGA driver. I learned it on this site. The example is pretty suitable for one who isn't familiar with VGA. You can download example code as well. Pay attention to the timing specifications for various VGA modes at the bottom of that page.
Also this teaches how to write a Pong game. Have fun with it:).
I am working on a PXI system from National Instruments. It has an FPGA card that I have connected externally to a sensor.
I would like to know how to perform a "cycle accurate" simulation that includes a custom external stimulus that emulates the sensor.
There is a lot of example for simulating the labView -> FPGA -> labView interfaces, but nothing for LabView -> FPGA -> external hardware.
If it hasn't been a NI FPGA system, I would have written an HDL test bench for that, but within the NI FPGA framework, I can't figure out where to put my test bench.
In fact there is a place to put an HDL test bench, but as I said, the only available interface to test is the one between the labView code and the FPGA, and not between the FPGA and the external FPGA pins.
Thanks
This is a right pain (IMHO).
Last time I used Labview FPGA (admittedly a couple of years ago) it had no clue about cycle accurate simulation.
I had to build ordinary labview "testbenches" around each Sub VI - the Sub VI goes in a loop within the testbench VI.
Then link all the subvis together within single-cycle-timed-loops at the top-level. That top level is then not simulate-able, you just have to build it and see :( As you probably agree - this is very alien to the usual FPGA flow.
Simulating right up to the pins (and then the hardware outside also) is just not possible (as far as I know, yet) - it is promised at some point...