I am trying to include MPI compiler to my makefile. The makefile is already prepared such that I only need to include the address of the MPI compiler in a a separate env file. However doing so does not work. I can get the cpp file to run manually by typing:
mpicxx Demo_00.cpp -o aprogram
./aprogram
I test where the mpi compiler is located using:
which mpicxx
/usr/bin/mpicxx
In the env file the corresponding line is:
MPICXX=/usr/bin/mpicxx
However, when I try to 'make' he cpp file I get the following error:
make Demo_00
g++ Demo_00.cpp -o Demo_00
Demo_00.cpp:2:17: fatal error: mpi.h: No such file or directory
compilation terminated.
make: *** [Demo_00] Error 1
The cpp file is in the same folder as the env file and the makefile.
I am not quite sure how to identify the error.
Thank you for your help,
Tartaglia
If you want to change the name of the C++ compiler, you have to change the variable CXX. That's the default variable make uses when it wants to compile C++ code.
This line in your log file:
g++ Demo_00.cpp -o Demo_00
says that you are using g++ compiler instead of mpixx.
Usually in makefiles compiler definition is at the beginnig of the file and looks like this:
CC=g++
just change it to mpixx
CC=mpixx
Thank you all for your responses, I took a closer look into the makefile I thought I was using and it turns out, as you have already suggested, I was not using it at all. The makefile was only able to execute one specific cpp file with one specific name. So whenever I typed in make *.cpp I was using the standard make as you already pointed out.
Thanks again for your help.
Related
I am trying to compile c++ files using make. But, it is not using -std=c++11 flag by default. Whenever I need to compile a program which uses c++11 specific features, I have to explicitly compile it using g++.
So, I want to ask how can I have make automatically use the option -std=c++11 for all my c++ files on my system.
If I need to change some global makefile for g++ , what is the location of the makefile on Linux Mint 18 and what needs to be changed or added?
Or do I need to create a Makefile for myself?
EDIT 1: I am invoking make like make myfile
And there are only .cpp files and their binaries in the directory. I don't have any Makefile in the directory.
EDIT 2: Here, myfile is the name of the c++ file which I want to compile.
When I run make with the -d option, I get the following output (I can not paste all of the output as it is quite long and is exceeding the body size limit so, I am including the screenshots of the output).
Image 1
And this image(2) has some lines from the end.
Image 2
I intentionally made a change in the file "MagicalWord.cpp" so that make finds something to make!
There is no "global makefile" and there is no way to change the default flags for all invocations of make (unless you edit the source code to GNU make and compile it yourself, which is a bad idea in this situation).
In your makefile(s), add the line:
CXXFLAGS += -std=c++11
Assuming you're using the built-in rules for compiling things, or that you're using the standard variables with your own rules, that will do what you need.
If that doesn't work we'll need to see your makefile or at least the rules you use to build your C++ source files (things like the -d output aren't useful here--that would be interesting if files weren't being built, that you thought should be or similar).
Setting a system-wide language for all your C++ projects isn't necessarily a good idea. Instead, define a Makefile that specifies any compiler options you'd like:
CXXFLAGS := -std=c++11 $(CXXFLAGS)
The CXXFLAGS are then passed to your compiler when compiling a C++ program (assuming you're using the default GNU Make rules).
If the Makefile lives in your current working directory, you can now run make target in order to compile a target.cpp file into a target executable.
If the Makefile is in another directory, you must specify the path to it:
make -f path/to/your/Makefile target
If you want to add extra parameters just for one run, you can set an environment variable or a make variable on the command line:
# environment:
CXXFLAGS='-std=c++11' make target
# make variable:
make target CXXFLAGS='-std=c++11'
Any of these will cause the execution of g++ -std=c++11 target.cpp -o target or equivalent.
In theory you can edit your shell profile to export CXXFLAGS='-std=c++11' which will make that environment variable available to all programs you run. In practice, setting compiler options through environment variables tends to cause more problems than it solves.
Of all these solutions, just writing a normal Makefile is by far the easiest approach. That way, all of the build configuration is in one place and completely automated.
I'm a first year computer science student following a course on (amongst others) Makefiles. For our first assignment, we had to create a shared library and link against it.
I have the following setup:
A folder hw1 containing the folders app and lib.
Inside lib is a file called libmine.so, the library I want to link against.
Inside app, there are two files: test.cpp and a Makefile. The former uses the libmine library.
The Makefile is as follows (in the file itself, indentation etc. is correct):
all: test
test: test.cpp
g++ -Wall -o test -L../lib -I../lib/include test.cpp -lmine
However, when running test, I get the infamous `libmine.so: cannot open shared object file' error.
I believe this has something to do with exporting LD_LIBRARY_PATH. I have tried doing so (export LD_LIBRARY_PATH=$[very long relative path to the lib folder]), but I want to do this in my Makefile. Additionally, I don't want the path to be relative, as my teachter should be able to open the file when I send it to him (so I think it should be something like ../lib/libmine.so).
I looked at various StackOverflow posts, such as this one, but none seemed to answer this specific question (either it was a different setup or the solution simply didn't work). By the way: putting the line export LD_LIBRARY_PATH=../lib right under test: test.cpp and before the g++ command did not do anything.
Any help is much appreciated :)
when running test, I get the infamous `libmine.so: cannot open shared object file' error.
This is happening because the -L../lib argument tells the static linker where to find the library, but it doesn't tell anything to the dynamic linker (aka loader), and the problem is that the latter can't find this library.
To solve this, you can use LD_LIBRARY_PATH, but this is usually ill-advised.
What you want is something called RPATH or RUNPATH (assuming you are on a Linux or similar system):
g++ -Wall -o test -L../lib -I../lib/include test.cpp -Wl,-rpath=../lib -lmine
Additionally, I don't want the path to be relative, as my teachter should be able to open the file when I send it to him
Is your teacher going to run your binary on the same system, or on a different one? If the former, you could do this:
g++ -Wall -o test -L../lib -I../lib/include test.cpp -Wl,-rpath=/full/path/to/hw1/lib -lmine
If the latter, /full/path/to/hw1/lib may or may not be available on your teacher's machine, and you need to think about what exactly you are going to send to him.
The usual way to solve this is to package both the application and the library into a tar file:
tar cvf to-send.tar app/test lib/libmine.so
The teacher can then extract the parts of your tar file into arbitrary directory, and try to run it. To make this work, you need RPATH that is relative to the application, regardless of where the application ends up. To achieve that, you want:
g++ -Wall -o test -L../lib -I../lib/include test.cpp -Wl,-rpath='$ORIGIN/../lib' -lmine
I am somewhat of a beginner in C and have a project due where I need to include a makefile to compile my single file program that uses pthreads and semaphores. My makefile looks like:
# Makefile for pizza program
pizza: pizza.o
gcc -lrt -lpthread -g -o pizza pizza.o
pizza.o: pizza.c
gcc -lrt -lpthread -g -c pizza.o pizza.c
and I keep getting:
make: Nothing to be done for 'Makefile'.
I have done several makefiles before and have never gotten this message. I've tried different semantics in the makefile and have only gotten this same message. And yes, the command is tabbed after the target and dependency line.
Using gcc on tcsh. I have read other makefile posts on SO but I wasn't able to use any of the answers to figure it out for my case.
Any help would be greatly appreciated!
The arguments to make are the targets to be built.
You are running make Makefile which is telling make to try to build the Makefile target.
There is no such target in your makefile, make has no built-in rule that applies to that target and the file exists (and is assumed to be up-to-date) which is what that message is telling you.
To run the default target (by default the first target listed) you can just run make (assuming you are using a default name like Makefile for your makefile).
You can also use the -f argument to make to select an alternate makefile name.
So make -f Makefile will in this case (since Makefile is a default searched name) do the same thing as make.
I have the following makefile when type make i got the following output. why is gcc gets called in this case?
nasm -felf ./source/multiboot.s
gcc multiboot.o -o multiboot
gcc: error: multiboot.o: No such file or directory
gcc: fatal error: no input files
compilation terminated.
make: *** [multiboot] Error 4
makefile:
CC=gcc
ASM=nasm
ASMFLAG=-felf
SOURCE=./source/
all: multiboot
multiboot.o: $(SOURCE)multiboot.s
$(ASM) $(ASMFLAG) $(SOURCE)multiboot.s
The "all" command depends on "multiboot", but there is no explicit rule defining how to produce "multiboot". In this case, Make uses a predefined rule that understands that, if the "$target.o" target exists, then "$target" can be constructed from "$target.o" by running the linker (in this case, GCC).
It seems like the problem in this case is that your instructions for the "multiboot.o" command does not actually produce the file "multiboot.o" as output. Try simply doing:
multiboot.o: multiboot.s
(That is, without specifying the command to run). Simply declaring this dependency should, by a similar mechanism, result in an implicit rule/command to create the "multiboot.o" output from "multiboot.s".
I created a Makefile.in where I read the content out of a file and pass it to CFLAGS. Calling ./configure ... the Makefile will be generated an all works well.
Makefile.in:
...
MY_REVISION_FILE=my-revision.txt
MY_REVISION=$(shell cat $(top_srcdir)/$(MY_REVISION_FILE))
AM_CFLAGS = -I$(EXTRAS_INCLUDE_DIR) -I$(top_srcdir) -DMY_REVISION=$(MY_REVISION)
...
The problem arises once I moved the Makefile.in code into Makefile.am to allow the auto generation of Makefile.in. There calling autoreconf -i --force stops with the following error:
server/Makefile.am:9: cat $(top_srcdir: non-POSIX variable name
server/Makefile.am:9: (probably a GNU make extension)
autoreconf: automake failed with exit status: 1
This problem hunts me now since quite some time. I searched everywhere but did not find anything that could help me finding a solution for that. In short, the only thing I need is a way to get an uninterpreted text such as "$(shell cat $(top_srcdir)/$(MY_REVISION_FILE))" copied from Makefile.am to Makefile.in
Any idea?
Thanks,
Oliver
As it says, the problem is you're using a GNUism in your Makefile.am, when it's only meant to contain portable Makefile code.
Either rewrite your code so it's portable (you should use AM_CPPFLAGS because you're passing flags to the preprocessor, not the compiler):
AM_CPPFLAGS = -I$(EXTRAS_INCLUDE_DIR) -I$(top_srcdir) -DMY_REVISION=`cat $(top_srcdir)/$(MY_REVISION_FILE)`
If you don't want to invoke cat on every compile, you could find the value in configure.ac and either AC_SUBST it into Makefile or AC_DEFINE it so it goes into config.h.
Or if you want to be non-portable (ಠ_ಠ), you can take -Werror out of your AM_INIT_AUTOMAKE or AUTOMAKE_OPTIONS, or add -Wno-portability.
After long testing back and forth I decided to use AC_SUBST.
My solution might not be the cleanest but it works for me.
In configure.ac I added the following line
AC_SUBST([DOLLAR_SIGN],[$])
In the Makefile.am I changed my previous line into
MY_REVISION=#DOLLAR_SIGN#(shell cat $(SRC_DIR)/$(MY_REVISION_FILE))
And it works.
Again, thanks for your help.