in bash or zsh I can write
clang++ main.cpp -g -o bin/main `pkg-config --cflags --libs opencv`
how can I translate this to fish shell?
fish uses parenthesis for command substitutions.
clang++ main.cpp -g -o bin/main (pkg-config --cflags --libs opencv)
note that parenthesis nest nicely, unlike backticks!
Related
My Makefile:
helloworldlib.obj: helloworldlib.cpp
g++ -Wall -o helloworldlib.obj -c helloworldlib.cpp
helloworld.obj: source.cpp
g++ -Wall -o helloworld.obj -c source.cpp
helloworld.exe: source.cpp helloworld.obj
g++ -Wall -o helloworld.exe helloworld.obj helloworldlib.obj
I'm not sure what's wrong with this, when I run mingw32-make it only executes the first g++ -Wall -o helloworldlib.obj -c helloworldlib.cpp.
As far as I know this makefile is syntactically correct, mingw just doesn't seem to be able to find the other lines.
This is how make works. If no target is provided on the command line (e.g. mingw32-make helloworld.exe), by default it builds the first target defined in the file. See for instance: https://stackoverflow.com/a/2057716/2249356.
As a quick fix, you can just move the rule for helloworld.exe to the top of the file and then make will build all.
And, I think that the last rule is supposed to read
helloworld.exe: helloworld.obj helloworldlib.obj
g++ -Wall -o helloworld.exe helloworld.obj helloworldlib.obj
rather then with the source.cpp and its object code helloworld.obj as dependencies.
i'm newbie use MinGW64 and msys2.
i have write simple program, just output "hello,world", but it links a dll for test.
#include <stdio.h>
int main() {
printf("hello, world\n");
return 0;
}
i run command in terminal like this:
$ gcc -g -Wall -I/usr/local/include -L/usr/local/bin -llua53 --shared -o test.dll main.c
it's works well.
but i write a Makefile use same command like this:
all: main.c
gcc -g -Wall -I/usr/local/include -L/usr/local/bin -llua53 --shared -o test.dll main.c
the error was output:
$ mingw32-make.exe
gcc -g -Wall -I/usr/local/include -L/usr/local/bin -llua53 --shared -o test.dll main.c
E:/mingw/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/5.3.0/../../../../x86_64-w64-mingw32/bin/ld.exe: cannot find -llua53
this problem confused me, what the difference of command process from terminal input and from Makefile?
mingw32-make.exe is for use with the windows command shell and doesn't understand POSIX paths, you need to use make.exe.
I am trying to make a web server in C. I am using the glib library which I include in my .c file with the syntax:
#include <glib.h>
To be able to use the library I have added the following two lines in my Makefile:
CFLAGS = 'pkg-config --cflags glib-2.0'
LDLIBS = 'pkg-config --libs glib-2.0'
But when I compile from the Shell I get the following error messages
gcc 'pkg-config --cflags glib-2.0' httpd.c 'pkg-config --libs glib-2.0' -o httpd
gcc: error: pkg-config --cflags glib-2.0: No such file or directory
gcc: error: pkg-config --libs glib-2.0: No such file or directory
make: *** [httpd] Error 1
Is there anyone who knows a solution to this problem?
pkg-config is a tool meant to print needed CFLAGS and LIBS to standard out, so I see kind of a "double error" here:
What you probably read was giving a parameter like CFLAGS = `pkg-config --cflags glib-2.0` to make. Note the backticks here, they tell the shell to run a command and replace the whole construct with the output of that command (alternate syntax for shells is $()).
Even with backticks, this wouldn't work inside a Makefile which has different syntax from sh. The corresponding construct in GNU make is $(shell ), so just write CFLAGS = $(shell pkg-config --cflags glib-2.0).
Depending on which make you are using, you might just want:
CFLAGS = $(shell pkg-config --cflags glib-2.0)
LDLIBS = $(shell pkg-config --libs glib-2.0)
I have to compile some mysql c api code and tired of writing all this in command line:
gcc main.c -o main `mysql_config --cflags --libs`
I wrote a shell script in bash and pass positional parameter in bash:
gcc $1 -o ${"$1":0:2} 'mysql_config --cflags --libs' but this doesn't work. I get error message: ./compile: line 2: ${"$1":0:-2}: bad substitution. Can someone please tell me what I am doing wrong?
The only way I got this to work is by assigning a new variable:
filename=$1;
gcc $filename -o ${filename:0:-2} `mysql_config --cflags --libs`
Is this the only way to do it or is there a way to fix what I am doing wrong in the first case?
You almost had it:
${1:0:2}
You don't need another reference to $1 inside the brackets since everything in it will be interpreted as the name of the variable, as in the case of ${filename:0:-2}.
In response to the comments under the question, here's an example makefile for this situation:
MSQL_FLAGS := $(shell mysql_config --cflags)
MSQL_LIBS := $(shell mysql_config --libs)
main : main.c
gcc $(MSQL_FLAGS) -o $# $< $(MSQL_LIBS)
I'm using opencv on mac, every time I compile the program, I have to type:
g++ -I /usr/local/include -L /usr/local/lib main.cpp
What can I do to avoid typing -I and -L params?
Create a Makefile:
CXXFLAGS=-I /usr/local/include -O3 -DSOMETHING
LDFLAGS=-L /usr/local/lib
LIBS=-lwhatever
main: main.o
$(LD) -o $# $* $(LDFLAGS) $(LIBS)
main.o: main.cpp
And then just type make at the command prompt:
$ make
trojanfoe is almost right, but the makefile doesn't use the conventional names. If it did, it would be even simpler:
CXXFLAGS=-I /usr/local/include -O3 -DSOMETHING
LDFLAGS=-L /usr/local/lib
LDLIBS=-lwhatever
With that makefile you can just type make main and make will use its implicit rules for compiling a C++ file