I am trying to compile my project using makefile.
Command line that works perfectly for me is:
g++ -I stuff/ -L stuff2/ src/Core.cpp -o file_name -ljvm
If I miss -ljvm at the end I end up with an error while compiling, this flag must go after file_name. The problem is that I am unable to add -ljvm successfully using makefile.
My makefile looks like this:
NAME = 'AI'
SRC = src
TGT = obj
PRG = application
INCLUDES = -Iinclude -I /usr/lib/jvm/java-7-openjdk-amd64/include/
LIBRARIES = -L /usr/lib/jvm/java-7-openjdk-amd64/jre/lib/amd64/server/
CXXFLAGS = -Wall -O3 -std=c++0x $(INCLUDES) $(LIBRARIES)
SOURCES = $(wildcard $(SRC)/*.cpp)
OBJS = $(addprefix $(TGT)/, $(notdir $(SOURCES:.cpp=.o)))
$(TGT)/%.o: $(SRC)/%.cpp
$(CXX) $(CXXFLAGS) -c $< -o $#
$(PRG)/$(NAME): $(OBJS)
$(CXX) $(LDFLAGS) $(OBJS) -o $#
Which gives me an error since I have not added -ljvm.
If I add it to: $(CXX) $(CXXFLAGS) -c $< -o $# -ljvm, nothing changes and I still get same error.
If I add it to last line $(CXX) $(LDFLAGS) $(OBJS) -o $# -ljvm I get a different error:
g++ obj/Core.o -o application/'AI' -ljvm
/usr/bin/ld: cannot find -ljvm
collect2: error: ld returned 1 exit status
make: *** [application/'AI'] Error 1
I have a feeling that I am missing something simple here. Any suggestions are much appreciated.
Your last line uses $(LDFLAGS) that is actually never defined.
ld complains about the fact it cannot find -ljvm, that's because you have to pass
-L /usr/lib/jvm/java-7-openjdk-amd64/jre/lib/amd64/server/
to the linker (i.e. add it to your last command).
Try defining LDFLAGS with, at least, $(LIBRARIES) in it.
Related
I'm trying to write my own makefile for a paho.mqtt project on a Raspberry Pi 4.
I've downloaded & tested the paho.mqtt install and its all working as expected.
So I'm now testing some C code but I just cant figure out the makefile (I'm new to this), my file so far,
NAME = mqtt_test
OBJ = $(NAME).o
LIBS = -libpaho-mqtt3c -libpaho-mqtt3cs
CFLAGS = -Wall -I/usr/local/include -L/usr/local/lib
CC = gcc
EXTENSION = .c
all: $(NAME)
%.o: %$(EXTENSION) $(DEPS)
$(CC) -c -o $# $< $(CFLAGS)
$(NAME): $(OBJ)
$(CC) -o $# $^ $(CFLAGS) $(LIBS)
.PHONY: clean
clean:
#rm -f *.o *~ core $(NAME)
This returns,
gcc -o mqtt_test mqtt_test.o -Wall -I/usr/local/include -L/usr/local/lib -libpaho-mqtt3c -libpaho-mqtt3cs
/usr/bin/ld: cannot find -libpaho-mqtt3c
/usr/bin/ld: cannot find -libpaho-mqtt3cs
collect2: error: ld returned 1 exit status
make: *** [makefile:14: mqtt_test] Error 1
I've checked & the includes and libraries are in the directories I put after the-I and -L flags.
When I look in /usr/bin there is no ld but there are paho files prefixed with paho_ but no library files.
What am I missing?
You don't use -libpaho-mqtt3c (etc.)
The option is -l so when you write -libpaho-mqtt3c the linker is looking for libraries named ibpaho-mqtt3c which of course do not exist: that would be either libibpaho-mqtt3c.a or libibpaho-mqtt3c.so.
You want to use -lpaho-mqtt3c: remove the lib at the front and the extension .a or .so, and add in the option -l.
So I have been searching and looking for something that could help me with the Makefile, but I did not find anything, so thats why I am here.
My makefile right now is like this:
CC = gcc
CFLAGS = -Wall
LDFLAGS += -L$(LIBB)
LDFLAGS += -static lib1.h
LDLIBS = -lm -lpthread -lrt -l
SOURCES=lib1.c prac3.c prac3_reader.c
LIBRARIES=lib1.o
INCLUDES=lib1.h
PROGRAMS=prac3 prac3_reader
all: $(OBJS) $(PROGRAMS)
$(PROGRAMS): $(LIBRARIES) $(INCLUDES)
$(CC) $(LDFLAGS) $(LIBRARIES) $(LDLIBS) $#.o -o $#
%.o: %.c $(INCLUDES)
$(CC) $(CFLAGS) -o $# -c $<
clean:
rm -rf *.o *~ $(PROGRAMS)
I know there are probably a lot of things that can be removed, but I do not really know which ones are. I have two programs called
prac3.c
and
prac3_reader.c
Also, I have my own library called
lib1.c
and also compiled like
lib1.h
When I go to my directory with the terminal and use the command make I recive this error:
gcc -L -static lib1.h lib1.o -lm -lpthread -lrt -l prac3.o -o prac3
/usr/bin/ld: no se puede encontrar -lprac3.o
collect2: error: ld returned 1 exit status
Makefile:15: recipe for target 'prac3' failed
make: *** [prac3] Error 1
I am running on Ubuntu.
The -l flag expects an argument. When it is combined in the gcc statement it causes the prac3.o argument to be considered as the name of a library. There is no such library prac3.o, so you get the error.
In general .o files aren't "libraries". They are object files. Remove the -l flag and you will be fine.
"libraries" are generally .a or .so files from a library path - but even then, you wouldn't specify the suffix (.e.g "-lpthreads").
My makefile below works after I clean and remove all object files, however if I edit a source file and then run make again, it outputs the error below. I believe this is coming from the lines:
%.o: %.cpp
$(CXX) -c $(CFLAGS) $< -o $#
I thought I had a basic grasp of automatic variables, but something isn't right.
Makefile:
all: main
CFLAGS=-fPIC -g -Wall `pkg-config --cflags opencv` -I /usr/local/include/libusb-1.0/
LIBS = `pkg-config --libs opencv`
INCLUDE = -I /usr/local/include/libfreenect
FREE_LIBS = -L/usr/local/lib -lfreenect
main: device.cpp cups.cpp main.cpp
$(CXX) $(INCLUDE) $(CFLAGS) $? -o $# $(LIBS) $(FREE_LIBS)
%.o: %.cpp
$(CXX) -c $(CFLAGS) $< -o $#
clean:
rm -rf *.o main
Output from make:
Undefined symbols for architecture x86_64:
"_main", referenced from:
implicit entry/start for main executable
ld: symbol(s) not found for architecture x86_64
clang: error: linker command failed with exit code 1 (use -v to see invocation)
make: *** [main] Error 1
In the line
$(CXX) $(INCLUDE) $(CFLAGS) $? -o $# $(LIBS) $(FREE_LIBS)
you use $?, which means only the updated dependencies will be used in the command. (You should be seeing this in the command.)
Use $+ instead. (See the manual.)
(PS: This is one half of the answer; the other half is Sagar Sakre's advice.)
main taget should depend on .o files instead of .cpp
change
main: device.cpp cups.cpp main.cpp
to
main: device.o cups.o main.o
everything should work fine
I'm working with a project using flex/bison and trying to compile it using make. The lex.yy.c, tab.c, tab.h from flex/bison are generated correctly and placed in the obj directory. However, there is an error when trying to compile the obj/lex.yy.c file and it cannot resolve an include to a file in the src/frontend directory. Any ideas where I am going wrong? Makefile and output included below.
Makefile:
VPATH = src obj src/frontend src/interpreter
SRCS = lex.yy.c C.tab.c symbol_table.c nodes.c print_ast.c interpreter.c main.c
OBJS := $(SRCS:%.c=obj/%.o)
INCLUDES = -Isrc -Iobj -Isrc/frontend -Isrc/interpreter
CPPFLAGS = -Wall
LDFLAGS = -Wall
CC = gcc
LEX = flex
YACC = bison -d -t -v
all: bin/mycc
bin/mycc: $(OBJS)
$(CC) -g $(LDFLAGS) $(INCLUDES) -o $# $^
obj/lex.yy.c: C.flex obj/C.tab.h
$(LEX) -o $# $<
obj/C.tab.c: C.y
$(YACC) -o $# $<
obj/C.tab.h: obj/C.tab.c
#touch $#
obj/%.o: src/%.c
$(CC) -g $(CPPFLAGS) $(INCLUDES) -c $^
clean:
rm $(OBJS) obj/lex.yy.c obj/C.tab.c obj/C.tab.h
depend:
$(CC) -M $(SRCS) > .deps
cat Makefile .deps > makefile
Output:
bison -d -t -v -o obj/C.tab.c src/frontend/C.y
src/frontend/C.y: conflicts: 4 shift/reduce, 14 reduce/reduce
src/frontend/C.y:248.11-53: warning: rule useless in parser due to conflicts: external_declaration: function_definition
flex -o obj/lex.yy.c src/frontend/C.flex
gcc -Wall -c -o obj/lex.yy.o obj/lex.yy.c
src/frontend/C.flex:13:19: fatal error: token.h: No such file or directory
#include "token.h"
^
compilation terminated.
make: *** [obj/lex.yy.o] Error 1
The problem is that you define your -I flags for compiling in the variable $(INCLUDES) instead of in the normal $(CPPFLAGS). As a result, when the default rule for compiling C files runs, it does not use any of those -I flags and so the compiler can't find the include files. You can see the command line for the compiler in your output.
To fix it, get rid of the INCLUDES = line and add all of them to CPPFLAGS:
CPPFLAGS = -Wall -Isrc -Iobj -Isrc/frontend -Isrc/interpreter
When i run the code below , it give me an error message which is :
cc1: warning: main.c: not a directory [enabled by default]
frequent.o: file not recognized: File format not recognized
collect2: error: ld returned 1 exit status
make: * [main] Error 1
CC = gcc
CPPFLAGS = -I
main: main.c headers.h sortt.o frequent.o
#$(CC) $(CPPFLAGS) -c $^ -o $#
sortt.o: headers.h sortt.c
$(CC) $(CPPFLAGS) -c $< -o $#
frequent.o: headers.h frequent_word.c search_similar_word.o
$(CC) $(CPPFLAGS) -c $< -o $#
You have a lot of errors in your rules. Why is frequent.o listing search_similar_word.o as a prerequisite? There's no reason that you can't build frequent.o before or at the same time as search_similar_word.o.
Also, you are using $< in the compilation line which expands to the first prerequisite, but the first prerequisite for frequent.o is headers.h, so you're trying to compile headers.h which is wrong: you want to compile frequent_word.c.
Ditto for sortt.o.
It's also very odd to name your object files with different names than the source files.
In your CPPFLAGS you're listing a -I flag but you've given it no argument: that flag takes a directory as an argument.
And finally, you are using the -c flag when you're trying to link the final object (I'm assuming the comment character # is just an artifact of debugging); that's not right as the -c flag tells the compiler to generate an object file, and to not link the final object.
Your makefile should look something like this:
CC = gcc
CPPFLAGS = -I .
main: main.c headers.h sortt.o frequent.o
$(CC) $(CPPFLAGS) $^ -o $#
sortt.o: sortt.c headers.h
$(CC) $(CPPFLAGS) -c $< -o $#
frequent.o: frequent_word.c headers.h
$(CC) $(CPPFLAGS) -c $< -o $#
I have no idea what to do with search_similar_word.o since it doesn't seem to be used anywhere in your build.