Im facing a problem that discussed many many many times in whole web, but none of those solutions didnot work with me.
I have a makefile:
1 SHELL:=/bin/bash -O extglob
2 CC=g++
3
4 CFLAGS=-c -Wall
5
6 compile:
7 $C(CC) $(CFLAGS) mauth.cpp
mauth.cpp is just blank int main function, that compiles normally using g++ mauth.cpp.
but when i try doing it using makefile it gives me error:
(CC) -c -Wall mauth.cpp
/bin/bash: -c: line 0: syntax error near unexpected token `-c'
/bin/bash: -c: line 0: `(CC) -c -Wall mauth.cpp'
makefile:7: recipe for target 'compile' failed
make: *** [compile] Error 1
If i remove $(CC) $(CFLAGS) to just g++ -c -Wall mauth.cpp makefile works perfectly.
i have extglob on:
[a#localhost mauth]$ shopt | grep extglob
extglob on
Again none of solutions i found in internet worked for me.
Please help me out.
PS im using fedora22
Problem solved!!!
I changed CC=g++ to C=g++ and it did the job.
Your makefile is incorrect and bogus. This:
compile:
$C(CC) $(CFLAGS) mauth.cpp
Should be this instead:
compile:
$(CC) $(CFLAGS) mauth.cpp
Actually, to make it really correct, you need:
compile:
$(CXX) $(CXXFLAGS) mauth.cpp
Related
I am using makefile to build my code for boost cpp application. When makefile get executed it shows following message
g++ -c -Wall -I/c/MinGW/include/ -lboost_system -lws2_32 Timer_async.cpp -o Timer_async.o
and throws following error
#include <boost/asio.hpp>
^
compilation terminated.
mingw32-make: *** [makefile:15: Timer_async.o] Error 1
but if I run this makefile generated command from shell prompt
g++ -c -Wall -I/c/MinGW/include/ -lboost_system -lws2_32 Timer_async.cpp -o Timer_async.o
Program builds properly.
My make file is as
CC=g++
CFLAGS=-c -Wall
LDFLAGS=-lboost_system -lws2_32
INCLUDES=-I/c/MinGW/include/
SOURCES=Timer_async.cpp
OBJECTS=$(SOURCES:.cpp=.o)
EXECUTABLE=hello
all: $(SOURCES) $(EXECUTABLE)
$(EXECUTABLE): $(OBJECTS)
$(CC) $(SOURCES) $(INCLUDES) $(LDFLAGS) -o $#
.cpp.o:
$(CC) $(CFLAGS) $(INCLUDES) $(LDFLAGS) $< -o $#
I think the error is may be how conemu handles file paths. after changing make file to following more specific
CFLAGS = -c -I/c/MinGW/include
2
3 hello: Timer_async.o
4
5 Timer_async.o: Timer_async.cpp
6 g++ $(CFLAGS) Timer_async.cpp
7
8 clean:
9 rm Timer_async.o
I was still getting errors but after adding double quotes in path all errors were corrected.
My modified make file is
CFLAGS = -c -I"/c/MinGW/include"
2
3 hello: Timer_async.o
4
5 Timer_async.o: Timer_async.cpp
6 g++ $(CFLAGS) Timer_async.cpp
7
8 clean:
9 rm Timer_async.o
Why do you specify both $(SOURCES) and $(EXECUTABLE) as dependencies to all? What is that adding that the $(EXECUTABLE) rule isn't achieving?
The #include is failing (that's what the diagnostic message seems to indicate) because the target file cannot be found. You have used the -I flag incorrectly. That will only influence how includedFile.c is located; it has no effect on <includedFile.c>.
Your conclusion "Makefile command not executed" (and I have no idea what a "Makefile command" is) was unwarranted. make did exactly what it was supposed to.
I'm modifying this makefile to use with another project and I get a gcc error saying I cannot specify -o with -c.
The line near the bottom that says:
.c.o:
$(CC) $(CC_FLAGS) ... -o $# &<
has the -o
but CC_FLAGS = $(MCU_CC_FLAGS) -c ...
I don't see how this makefile worked in the first place.
i have ran this makefile in cygwin and i got some errors this is makefile:
FFLAGS=
BFLAGS=-d -v -y
CFLAGS=-g -Wall -Wextra -std=c++11 -Wno-write-strings -I /usr/local/boost_1_50_0
FLEX=flex
BISON=bison
CC=g++
SRCS=y.tab.c ast.cpp tokentable.cpp symboltable.cpp main.cpp lex.yy.c semanticanalyzer.cpp astnodevisitor.cpp constants.cpp astnodetypechecker.cpp utility.cpp astnodecodegenerator.cpp
OBJS=y.tab.o ast.o tokentable.o symboltable.o main.o lex.yy.o semanticanalyzer.o astnodevisitor.o constants.o astnodetypechecker.o utility.o astnodecodegenerator.o
cooc : ${OBJS}
${CC} ${CFLAGS} -o $# ${OBJS}
%.o : %.cpp
${CC} ${CFLAGS} -c $<
y.tab.c : cool.y
${BISON} ${BFLAGS} cool.y
lex.yy.c : cool.flex
${FLEX} ${FFLAGS} cool.flex
.depend: ${SRCS}
rm -f ./.depend
${CC} ${CFLAGS} -MM $^>>./.depend
include .depend
and i got this errors:
MAKE Version 5.0 Copyright (c) 1987, 1997 Borland International
Error makefile 25: Colon expected
Error makefile 26: Command syntax error
Error makefile 27: Command syntax error
Error makefile 29: Command syntax error
* 4 errors during make *
This is a GNU make makefile. You are running Windows nmake. Those two programs are not compatible. If you're using cygwin, install the GNU make program for cygwin and use that instead.
I am trying to use the following in a makefile, but when I type make filter_test it gives me the error below, and I can not figure out why. Note the spaces where the input files should be.
CXX=g++
CXXFLAGS=-O1 -pedantic -Wall -Werror -g
DEPS=p2.o recursive.o $#.cpp
p2.o: p2.cpp ; $(CXXFLAGS) -c p2.cpp
recursive.o: recursive.cpp ; $(CXXFLAGS) -c recursive.cpp
filter_test: p2.o $#.cpp recursive.o ; $(CXX) $(CXXFLAGS) recursive.o p2.o $#.cpp -o aaa
Output:
g++ -O1 -pedantic -Wall -Werror -g -o .cpp
g++: fatal error: no input files
compilation terminated.
make: *** [.cpp] Error 4
$# only has a value inside the recipe, so when make sees $# in the prerequisite list, it treats it as an empty string. So make is trying to build the pre-requisite .cpp and using the default rule to build it. To fix this just write:
filter_test: p2.o filter_test.cpp recursive.o
Leave the recipe blank and let make use default rules.
I have this simple rule in my Makefile:
PP=g++ -std=c++0x
%.o: $.cpp
$(PP) $< -c -o $#
When I run make parse_utils.o, the command be executed should be:
g++ -std=c++0x parse_utils.cpp -c -o parse_utils.o
But in fact it's:
>make parse_utils.o
g++ -c -o parse_utils.o parse_utils.cpp
And I got a compile error because I used C++11 syntax.
Is this wildcard rule wrong?
Your target is wrong. Change
%.o: $.cpp
to
%.o: %.cpp