Issue with my Makefile. No such file or directory - makefile

I'm trying to build a MIPS program with Make. I have two files that are pretty bare as I want to get the Makefile working before continuing with functionality:
logic.asm
# contains a main method
# contains a .globl to print_strings
# calls print_strings
printer.asm
# has a print_strings method that just prints a few strings and returns
My Makefile looks like so:
RASM = /home/bin/rasm
RLINK = /home/bin/rlink
# Suffixes
.SUFFIXES: .asm .obj .lst .out
# Obj files
OBJS = logic.obj printer.obj
# ASM -> OBJ
.asm.obj:
$(RASM) -l $*.asm > $*.lst
# OBJ -> OUT
.obj.out:
$(RLINK) -m -o $*.out $*.obj > $*.map
# target
logic.out: $(OBJS)
$(RLINK) -m -o $*.out $*.out $(OBJS) > $*.map
When I run make, here's what I'm seeing:
$ make
/home/bin/rlink -m -o logic.out logic.out logic.obj printer.obj > logic.map
logic.out: No such file or directory
make: *** [logic.out] Error 1

The problem was with this line:
$(RLINK) -m -o $*.out $*.out $(OBJS) > $*.map
There should only be 1 $*.out, like so:
$(RLINK) -m -o $*.out $(OBJS) > $*.map

Related

How to change the Makefile to create object file?

I am following a code from GitHub (https://github.com/dmalhotra/pvfmm).
There is a Fortran file in ./examples/src/example-f.f90. I have created a subroutine from this example-f.f90 so that I can make an object file out of it and can call this subroutine in our in-house code. The installation guide is given here (https://github.com/dmalhotra/pvfmm/blob/develop/INSTALL).
The Makefile to compile the example-f.f90 is as (https://github.com/dmalhotra/pvfmm/blob/develop/examples/Makefile):
ifndef PVFMM_DIR
PVFMM_DIR=./..
endif
-include $(PVFMM_DIR)/MakeVariables
ifndef CXX_PVFMM
$(error Cannot find file: MakeVariables)
endif
# FC=$(FC_PVFMM) # TODO: for now, FC must be provided by user
# CC=$(CC_PVFMM) # TODO: for now, CC must be provided by user
CXX=$(CXX_PVFMM)
CXXFLAGS=$(CXXFLAGS_PVFMM)
LDLIBS=$(LDLIBS_PVFMM)
RM = rm -f
MKDIRS = mkdir -p
BINDIR = ./bin
SRCDIR = ./src
OBJDIR = ./obj
INCDIR = ./include
TARGET_BIN = \
$(BINDIR)/example1 \
$(BINDIR)/example2 \
$(BINDIR)/example-sctl \
$(BINDIR)/fmm_pts \
$(BINDIR)/fmm_cheb
all : $(TARGET_BIN)
$(BINDIR)/%: $(SRCDIR)/%.f90
-#$(MKDIRS) $(dir $#)
$(PVFMM_DIR)/libtool --mode=link --tag=FC $(FC) $(CXXFLAGS) -I$(INCDIR) $^ $(LDLIBS) -o $#
...
The MakeVariables can be found in the above link.
I changed this make file so that I can make an object file of example-f.f90 (subroutine, I converted as I told before to link it in our in-house code) and also other files in our in-house code and link at the end. The new makefile looks like:
ifndef PVFMM_DIR
PVFMM_DIR=./..
endif
-include $(PVFMM_DIR)/MakeVariables
ifndef CXX_PVFMM
$(error Cannot find file: MakeVariables)
endif
FC_PVMM = mpif90
FC = mpif90
FC=$(FC_PVFMM) # TODO: for now, FC must be provided by user
CC=$(CC_PVFMM) # TODO: for now, CC must be provided by user
CXX=$(CXX_PVFMM)
CXXFLAGS=$(CXXFLAGS_PVFMM)
LDLIBS=$(LDLIBS_PVFMM)
RM = rm -f
MKDIRS = mkdir -p
BINDIR = ./bin
SRCDIR = ./src
OBJDIR = ./obj
INCDIR = ./include
all : $(project_final)
project_final: $(project)
$(PVFMM_DIR)/libtool --mode=link --tag=FC mpif90 $(CXXFLAGS) -I$(INCDIR) $^ $(LDLIBS) -o $#
project: example-f.o
cd ./src && $(MAKE)
example-f.o: $(SRCDIR)/example-f.f90
$(PVFMM_DIR)/libtool --mode=link --tag=FC mpif90 $(CXXFLAGS) -I$(INCDIR) $^ $(LDLIBS) -c $#
...
Kindly note 'project: example-f.o
cd ./src && $(MAKE)' doing to make object files of our inhouse code. In src we have separate makefile to create object files for out in-house code.
But it gives me the following:
cd ./examples && make;
make[1]: Entering directory '/home/bidesh/Coding/FMM/pvfmm-1.3.0/examples'
make[1]: Nothing to be done for 'all'.
make[1]: Leaving directory '/home/bidesh/Coding/FMM/pvfmm-1.3.0/examples'
How can I modify the makefile so that I can compile the whole code that includes example-f.f90 (subroutine) along with other subroutines (in-house code)?
Thanks a lot.

make: Nothing to be done for 'all'. in Omnet

After Installng Omnetpp 5.5.1 in Ubuntu 18.04 ,For any folder in Omnetpp, make command is not making any sense.
As it showing the following message:
make: Nothing to be done for 'all'.
Even suggested methods on Internet are not working in my case.Please help.
My makefile is following for Aloha Folder.
#
# OMNeT++/OMNEST Makefile for aloha
#
# This file was generated with the command:
# opp_makemake -f --deep
#
# Name of target to be created (-o option)
TARGET = aloha$(D)$(EXE_SUFFIX)
TARGET_DIR = .
# User interface (uncomment one) (-u option)
USERIF_LIBS = $(ALL_ENV_LIBS) # that is, $(TKENV_LIBS) $(QTENV_LIBS) $(CMDENV_LIBS)
#USERIF_LIBS = $(CMDENV_LIBS)
#USERIF_LIBS = $(TKENV_LIBS)
#USERIF_LIBS = $(QTENV_LIBS)
# C++ include paths (with -I)
INCLUDE_PATH =
# Additional object and library files to link with
EXTRA_OBJS =
# Additional libraries (-L, -l options)
LIBS =
# Output directory
PROJECT_OUTPUT_DIR = out
PROJECTRELATIVE_PATH =
O = $(PROJECT_OUTPUT_DIR)/$(CONFIGNAME)/$(PROJECTRELATIVE_PATH)
# Object files for local .cc, .msg and .sm files
OBJS = $O/Host.o $O/Server.o
# Message files
MSGFILES =
# SM files
SMFILES =
#------------------------------------------------------------------------------
# Pull in OMNeT++ configuration (Makefile.inc)
ifneq ("$(OMNETPP_CONFIGFILE)","")
CONFIGFILE = $(OMNETPP_CONFIGFILE)
else
ifneq ("$(OMNETPP_ROOT)","")
CONFIGFILE = $(OMNETPP_ROOT)/Makefile.inc
else
CONFIGFILE = $(shell opp_configfilepath)
endif
endif
ifeq ("$(wildcard $(CONFIGFILE))","")
$(error Config file '$(CONFIGFILE)' does not exist -- add the OMNeT++ bin directory to the path so that opp_configfilepath can be found, or set the OMNETPP_CONFIGFILE variable to point to Makefile.inc)
endif
include $(CONFIGFILE)
# Simulation kernel and user interface libraries
OMNETPP_LIBS = $(OPPMAIN_LIB) $(USERIF_LIBS) $(KERNEL_LIBS) $(SYS_LIBS)
COPTS = $(CFLAGS) $(IMPORT_DEFINES) $(INCLUDE_PATH) -I$(OMNETPP_INCL_DIR)
MSGCOPTS = $(INCLUDE_PATH)
SMCOPTS =
# we want to recompile everything if COPTS changes,
# so we store COPTS into $COPTS_FILE and have object
# files depend on it (except when "make depend" was called)
COPTS_FILE = $O/.last-copts
ifneq ("$(COPTS)","$(shell cat $(COPTS_FILE) 2>/dev/null || echo '')")
$(shell $(MKPATH) "$O" && echo "$(COPTS)" >$(COPTS_FILE))
endif
#------------------------------------------------------------------------------
# User-supplied makefile fragment(s)
# >>>
# <<<
#------------------------------------------------------------------------------
# Main target
all: $(TARGET_DIR)/$(TARGET)
$(TARGET_DIR)/% :: $O/%
#mkdir -p $(TARGET_DIR)
$(Q)$(LN) $< $#
ifeq ($(TOOLCHAIN_NAME),clangc2)
$(Q)-$(LN) $(<:%.dll=%.lib) $(#:%.dll=%.lib)
endif
$O/$(TARGET): $(OBJS) $(wildcard $(EXTRA_OBJS)) Makefile $(CONFIGFILE)
#$(MKPATH) $O
#echo Creating executable: $#
$(Q)$(CXX) $(LDFLAGS) -o $O/$(TARGET) $(OBJS) $(EXTRA_OBJS) $(AS_NEEDED_OFF) $(WHOLE_ARCHIVE_ON) $(LIBS) $(WHOLE_ARCHIVE_OFF) $(OMNETPP_LIBS)
.PHONY: all clean cleanall depend msgheaders smheaders
.SUFFIXES: .cc
$O/%.o: %.cc $(COPTS_FILE) | msgheaders smheaders
#$(MKPATH) $(dir $#)
$(qecho) "$<"
$(Q)$(CXX) -c $(CXXFLAGS) $(COPTS) -o $# $<
%_m.cc %_m.h: %.msg
$(qecho) MSGC: $<
$(Q)$(MSGC) -s _m.cc -MD -MP -MF $O/$(basename $<)_m.h.d $(MSGCOPTS) $?
%_sm.cc %_sm.h: %.sm
$(qecho) SMC: $<
$(Q)$(SMC) -c++ -suffix cc $(SMCOPTS) $?
msgheaders: $(MSGFILES:.msg=_m.h)
smheaders: $(SMFILES:.sm=_sm.h)
clean:
$(qecho) Cleaning $(TARGET)
$(Q)-rm -rf $O
$(Q)-rm -f $(TARGET_DIR)/$(TARGET)
$(Q)-rm -f $(TARGET_DIR)/$(TARGET:%.dll=%.lib)
$(Q)-rm -f $(call opp_rwildcard, . , *_m.cc *_m.h *_sm.cc *_sm.h)
cleanall:
$(Q)$(MAKE) -s clean MODE=release
$(Q)$(MAKE) -s clean MODE=debug
$(Q)-rm -rf $(PROJECT_OUTPUT_DIR)
# include all dependencies
-include $(OBJS:%=%.d) $(MSGFILES:%.msg=$O/%_m.h.d)
This aforementioned file is missing some information like c++ INCLUDE_PATH and EXTRA_OBJS and LIBS.Is this the reason for not being run?Please Help.
The makefile says that 'Nothing to be done' because the executable is present and up to date, so it is indeed nothing to be done. This is not an error.
As you have indicated, you can execute ./aloha and then that throws a runtime error. This is NOT related to the build process.

Gfortran compiling error after replacing with f77

QI need to compile some files using gfortran. I went to the makefile and replaced all the "f77" with "gfortran". However I get this error when I do "make"
gfortran -c verbal.f
gfortran -c trgl6_octa.f
gfortran -c trgl6_icos.f
gfortran -c gauss_trgl.f
gfortran -c gauss_leg.f
gfortran -c sgf_3d_fs.f
gfortran -c sgf_3d_w.f
f77 -c -o sgf_3d_2p_w.o sgf_3d_2p_w.f
make: f77: Command not found
make: *** [sgf_3d_2p_w.o] Error 127
I do not understand where in the make file (pasted below) there is a hidden f77 that did not get replaced. I checked all the sources files for "f77" and there was none. I am very confused.
#
# Objects
# -------
#
OBJ0 = verbal.o
OBJ1 = trgl6_octa.o trgl6_icos.o gauss_trgl.o gauss_leg.o
OBJ2 = sgf_3d_fs.o sgf_3d_w.o sgf_3d_2p_w.o
OBJ2A = sgf_3d_3p.o sgf_3d_3p_ewald.o sgf_3d_3p_qqq.o
OBJ3 = prtcl_3d_mob.o
OBJ30 = elm_geom.o abc.o interp_p.o printel.o
OBJ33 = slp_trgl6.o slp_trgl6_sing.o slp_trgl3_sing.o
OBJ4 = gel.o gel_inv.o
OBJ = $(OBJ0) $(OBJ1) $(OBJ2) $(OBJ2A) $(OBJ3) $(OBJ30) $(OBJ33) $(OBJ4)
#
# link
# ----
#
prtcl_3d_mob: $(OBJ)
gfortran -c prtcl_3d_mob $(OBJ)
#
# compile
# ------
#
prtcl_3d_mob.o: prtcl_3d_mob.f
gfortran -c prtcl_3d_mob.f
trgl6_octa.o: trgl6_octa.f
gfortran -c trgl6_octa.f
trgl6_icos.o: trgl6_icos.f
gfortran -c trgl6_icos.f
verbal.o: verbal.f
gfortran -c verbal.f
sgf_3d_fs.o: sgf_3d_fs.f
gfortran -c sgf_3d_fs.f
sgf_3d_w.o: sgf_3d_w.f
gfortran -c sgf_3d_w.f
sgf_3d_3p.o: sgf_3d_3p.f
gfortran -c sgf_3d_3p.f
sgf_3d_3p_ewald.o: sgf_3d_3p_ewald.f
gfortran -c sgf_3d_3p_ewald.f
sgf_3d_3p_qqq.o: sgf_3d_3p_qqq.f
gfortran -c sgf_3d_3p_qqq.f
gel.o: gel.f
gfortran -c gel.f
gel_inv.o: gel_inv.f
gfortran -c gel_inv.f
prtcl_3d_geo.o: prtcl_3d_geo.f
gfortran -c prtcl_3d_geo.f
interp_p.o: interp_p.f
gfortran -c interp_p.f
abc.o: abc.f
gfortran -c abc.f
printel.o: printel.f
gfortran -c printel.f
elm_geom.o: elm_geom.f
gfortran -c elm_geom.f
slp_trgl6.o: slp_trgl6.f
gfortran -c slp_trgl6.f
slp_trgl6_sing.o: slp_trgl6_sing.f
gfortran -c slp_trgl6_sing.f
slp_trgl3_sing.o: slp_trgl3_sing.f
gfortran -c slp_trgl3_sing.f
gauss_leg.o: gauss_leg.f
gfortran -c gauss_leg.f
gauss_trgl.o: gauss_trgl.f
gfortran -c gauss_trgl.f
#
# clean
# -----
#
clean:
rm -f core
rm -f $(OBJ) prtcl_3d_mob
rm -f prtcl_3d_mob.net prtcl_3d_mob.out
rm -f matrix_inverse.out
rm -f particle_elements.out
#
# purge
# ---
#
purge:
rm -f core
rm -f $(OBJ) prtcl_3d_mob
rm -f prtcl_3d_mob.net prtcl_3d_mob.out
rm -f matrix_inverse.out
rm -f particle_elements.out
#
# clobber
# ---
#
clobber:
rm *
#
# all
# ---
#
all:
make prtcl_3d_mob
GNU make has a number of implicit rules https://www.gnu.org/software/make/manual/make.html#Catalogue-of-Rules
By default, it will compile .f files with the rule $(FC) $(FFLAGS) -c where by default FC is set to f77 (see link above for all of this).
As an explicit rule ("from .f to .o") is not found for a file, make invokes the default rule.
Solutions: either one of the two
Set FC to gfortran
add an explicit rule for sgf_3d_2p_w.o
In general, I write the rule myself as
%.o: %.f90
$(FC) $(FFLAGS) -c $<
in the Makefile. It makes it obvious that I need to define FC and FFLAGS.
Also, you can then remove all of the individual rules for compiling your files.

makefile-compiling-back-and-forth - follow up

In continuation with my earlier question
Makefile - compiling back and forth
I made an attempt in creating a single Makefile. The two subdirectories are HAM-src and GFS-src. However, I am still unable to build it. I paste my Makefile below:
export
SHELL = /bin/sh
top_srcdir=./Temp
objdir=$(top_srcdir)/obj
bindir=${exec_prefix}/bin
cfssrcdir=${top_srcdir}/GFS-src
hamsrcdir=${top_srcdir}/HAM-src
incdir=${top_srcdir}/include
exec=${bindir}/esm_gfs-ham_v0
PROG=$(exec)
LDR = mpxlf90_r -qsmp=noauto
FFLAG90 = $(OPTS90) $(FINCS) -qfree=f90 -NS2048 -qmoddir=$(objdir) -I$(objdir)
FFLAGM = -NS2048 -qfixed -qmoddir=$(objdir) -I$(objdir)
F77 = mpxlf95
F90 = mpxlf95
F90_x = xlf90_r
F90_r = mpxlf95_r
SRCHAM = $(hamsrcdir)/ham_control.f90 $(hamsrcdir)/mo_filename.f90 \
$(hamsrcdir)/ham_namelist.f90 $(hamsrcdir)/ham_submodel.f90 \
$(hamsrcdir)/ham_submodel_diag.f90 $(hamsrcdir)/ham_ham.f90
SRCGFS_MOD=$(cfssrcdir)/machine.f $(cfssrcdir)/resol_def.f \
$(cfssrcdir)/omegas.f $(cfssrcdir)/cnvcld_v.f
OBJGFS_MOD = $(patsubst $(cfssrcdir)/%.f,$(objdir)/%.o,$(SRCGFS_MOD))
OBJHAM = $(patsubst $(hamsrcdir)/%.f90,$(objdir)/%.o,$(SRCHAM))
.SUFFIXES: $(SUFFIXES) .f90 .f .o
all: $(PROG)
$(PROG): $(OBJHAM) $(OBJGFS_MOD)
$(LDR) $(CFS_LDFLAGS) -o $# $(OBJGFS_MOD) $(OBJHAM) $(CFS_LIBS) -L$(LDFLAGS)
$(objdir)/%.o: $(cfssrcdir)/%.f
$(F77) $(FFLAGS) -c $< -o $#
$(objdir)/%.o: $(hamsrcdir)/%.f90
$(F90_r) $(F90FLAGS) -c $< -o $#
########## dependencies for $(hamsrcdir) ###########
ham_filename.o: ham_control.o
ham_namelist.o: ham_control.o ham_filename.o
ham_submodel.o: ham_control.o ham_namelist.o $(objdir)/resol_def.o
ham_submodel_diag.o: ham_submodel.o
########## dependencies for $(cfssrcdir) ###########
$(objdir)/omegas.o: $(cfssrcdir)/omegas.f
$(F77) $(FFLAGM) -c $(cfssrcdir)/omegas.f -o $#
$(objdir)/cnvcld_v.o: $(cfssrcdir)/cnvcld_v.f
$(F77) $(FFLAGM) -c $(cfssrcdir)/cnvcld_v.f -o $#
The error:
mpxlf95_r -q64 -O3 -qstrict -qMAXMEM=-1 -qarch=auto -qtune=auto -qcache=auto -qfloat=fltint -qsuffix=cpp=f90 -lessl_r -lmass -lmassv -I./Temp/include -I./Temp/HAM-src -qmoddir=./Temp/obj -I./Temp/obj -c ./Temp/HAM-src/ham_namelist.f90 -o ./Temp/obj/ham_namelist.o
** ham_namelist === End of Compilation 1 ===
1501-510 Compilation successful for file ham_namelist.f90.
mpxlf95_r -q64 -O3 -qstrict -qMAXMEM=-1 -qarch=auto -qtune=auto -qcache=auto -qfloat=fltint -qsuffix=cpp=f90 -lessl_r -lmass -lmassv -I./Temp/include -./Temp/HAM-src -qmoddir=./Temp/obj -I./Temp/obj -c ./Temp/HAM-src/ham_submodel.f90 -o ./Temp/obj/ham_submodel.o
"./Temp/HAM-src/ham_submodel.f90", line 425.7: 1514-219 (S) Unable to access module symbol file for module resol_def. Check path and file permissions of file. Use association not done for this module.
1501-511 Compilation failed for file ham_submodel.f90.
gmake: *** [/gpfs1/home/cccrmod/ham_expt_dec11/regrid_test/CFS-HAM/SORC_CFS-HAM/Temp/obj/ham_submodel.o] Error 1
Why makefile does not compile the resol_def.f module on encountering the dependency?
Another issue - my makefile is not working properly. It goes in a sequence in which the sources are defined.
This is difficult to untangle (a minimal, complete example really would help), but I'd suggest you change this
ham_submodel.o: ham_control.o ham_namelist.o $(objdir)/resol_def.o
to this
$(objdir)/ham_submodel.o: ham_control.o ham_namelist.o $(objdir)/resol_def.o
and see if that solves the first problem. I don't understand the last line of your question ("Another issue...").

Variable substitution error

Does anyone know what is wrong with my Makefile?
CXX = g++ # compiler
CXXFLAGS = -g -Wall -MMD # compiler flags
MAKEFILE_NAME = ${firstword ${MAKEFILE_LIST}} # makefile name
OBJECTS1 = utf.o # object files forming executable
EXEC1 = utf # executable name
OBJECTS2 = driver.o rational.o # object files forming executable
EXEC2 = rational # executable name
OBJECTS3 = da.o qa.o pa.o ua.o # object files forming executable
EXEC3 = ho # executable name
OBJECTS = ${OBJECTS1} ${OBJECTS2} ${OBJECTS3}
EXECS = ${EXEC1} ${EXEC2} ${EXEC3}
DEPENDS = ${OBJECTS:.o=.d} # substitute ".o" with ".d"
.PHONY : all clean
all : ${EXECS}
${EXEC1} : ${OBJECTS1} # link step
${CXX} $^ -o $#
${EXEC2} : ${OBJECTS2} # link step
${CXX} $^ -o $#
${EXEC3} : ${OBJECTS3} # link step
${CXX} $^ -o $#
${OBJECTS} : ${MAKEFILE_NAME} # OPTIONAL : changes to this file => recompile
-include ${DEPENDS} # include *.d files containing program dependences
clean : # remove files that can be regenerated
rm -f ${DEPENDS} ${OBJECTS} ${EXECS}
Error:
./Makefile: 1: CXX: not found
./Makefile: 2: CXXFLAGS: not found
./Makefile: 3: Bad substitution
use the make command to run the Makefile. you can specify a target for make, like make all.
Don't execute the makefile on its own. Your shell is trying to treat it as a shell script of some kind.
Run make, which uses the makefile.

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