Clang command on windows exceeds line limit - windows

The command line limit for windows is ~7000 characters. The clang command for my project is ~130,000 due to a very large number of includes. Is there some way to tell clang about my project includes from a separate file?

I admit to being curious why you have all of the includes on the command line, however, you can use this syntax to put all of the commands in a file:
clang #cmds
where cmds contains something like:
echristo#dzur ~/tmp> cat cmds
-c
foo.c
-o
foo.o
so the full process would look a bit like:
echristo#dzur ~/tmp> ls
cmds foo.c
echristo#dzur ~/tmp> clang #cmds
echristo#dzur ~/tmp> ls
cmds foo.c foo.o

Related

How to create makefile for Linux for the next command - gcc -shared -home/ time.c /libperi.a -o time.so

How to create a makefile for Linux for the next command?
gcc -shared -home/ time.c /libperi.a -o time.so
First, pick a name. This command appears to build time.so, so that's a good name.
The makefile is just a text file. Write it like this:
time.so:
gcc -shared -home/ time.c /libperi.a -o time.so
That whitespace before the gcc is a TAB, not spaces.
Once you have that working, you can read the manual and learn more about Make, which will allow you to write more powerful rules.

How does cygwin terminal work? (Makefile issue)

Here's my makefile:
assemblera: main.o parsingA.o parsingC.o symbolTable.o
gcc -o assemblera main.o parsingA.o parsingC.o symbolTable.o
main.o: main.c parsingA.h parsingC.h symbolTable.h
gcc -c main.c
parsingA.o: parsingA.c parsingA.h
gcc -c parsingA.c
parsingC.o: parsingC.c parsingC.h
gcc -c parsingC.c
symbolTable.o: symbolTable.c symbolTable.h
gcc -c symbolTable.c
clean:
rm *.o assemblera
Now for the problem: with Windows command prompt I can easily generate all the .o files and .exe file, and if I run the latter it works as intended. Now, if I use the cygwin terminal, I can give the instructions to generate the object files / the exe, but those do not appear nowhere in the folder and no error is returned. Also, if I use the make command, it returns this error:
gcc -c main.c
make: *** [Makefile:5: main.o] Error 1
(I did put tabs in front of every "gcc" and "rm"). I know next to nothing about makefiles and cygwin.

in Makefiles, how to test for gcc's --with-ld option?

We're trying to develop an as-portable-as-possible Makefile...
Neither uname nor uname -v is definitive in one suite of cases...
which ld is also unhelpful, as both linkers are present...
I imagine we could just parse output of gcc -v for '--with-ld=/usr/bin/ld', then test the features/version of that linker. But is the best way to do this?
What are 'Best Practices' here? Can gcc be queried more cleanly - from within a Makefile - for its linker options?
The first thing that comes to my mind (tested with GNU make and clearmake):
# redirect gcc -v to stdout && count the number of occurrences
GCC_WITH_LD := $(shell gcc -v 2>&1 | grep -c "\--with-ld")
ifeq ($(GCC_WITH_LD),0)
$(shell echo --with-ld NOT FOUND 1>&2) # print to stderr
# exit using error directive?
else
$(shell echo --with-ld FOUND 1>&2) # print to stderr
endif
mytarget:
#echo myjobs
The option you're looking for is -print-prog-name:
andy#Andrews-Mac-Pro ~ % gcc -print-prog-name=ld
/Library/Developer/CommandLineTools/usr/bin/ld
Then in the Makefile you can set LD with:
LD := $(shell gcc -print-prog-name=ld)
This also works on Solaris.

How can I exclude source file metadata from output when compiling?

For example:
$ gcc -O3 foobar.c -o foobar
$ grep 'foobar\.c' foobar
Binary file foobar matches
How can I exclude such unnecessary and revealing metadata from the output of gcc and other compilers? It appears regardless of whether the output is an assembly file, object file, or executable.
man strip(1)
> strip -s a.out

windows equivalent of command substitution in makefiles

I want to display current build(hg revision) number in the about box of my program. I thought about using a "define" (std::string rev = REVISION;) in the code and pass the value to g++ via makefile:
$(CPP) -c main.cpp -o main.o -DREVISION=`hg id -i`
would work like a charm, but im developing on windows for windows, so my Q: how to create such a behavior on windows.
If you're using g++ then your assumption is mostly right, excepting that passing a macro definition is done using -D option, not -d. Also, $(CPP) in Make usually refers to C PreProcessor. C++ compiler is $(CXX).
$(CXX) -c main.cpp -o main.o -DREVISION=`hg id -i`
Regarding command substitution, it should work fine if you run your build in UNIX-ish compatibility layer, like Cygwin or MinGW. If not, you could avoid using command substitution at all, and pass the result of hg id -i to the compiler literally, e.g. as follows:
REVISION := $(shell hg id -i)
...
$(CXX) -c main.cpp -o main.o -DREVISION=$(REVISION)

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