I'm writing a Makefile, I have a list of all the files (without src/ or .cpp), and I want to convert those to build/*.o. Here's what I've tried already:
FILES=icxxabi list memory string
OBJECTS=$(echo ("${build/$$FILES[#].o}")[#])
So for the input a dir/b c, it should output:
build/a.o build/dir/b.o build/c.o
With GNU Make, you could try
OBJECTS=$(patsubst %, build/%.o, $(FILES))
Take a look at the make file name functions:
OBJECTS = $(addprefix build/,$(addsuffix .o,$(FILES)))
Related
I have created a make file with list of variables. I have added all the files list and assigned to a variable in that make file.
ROLS= \
$(wildcard *.c)
The files list is more than 10000. when I try to print this variable using below rule , it is not printing all the files list.
all:
#echo $(ROLS)
How to print entire list of "c" files in a single variable.
I am using windows 7 64bit system to run this makefile.
Windows has a limit on the complete size of a command line that it will accept. There's nothing make can do about that, it's a hard limit by the operating system.
If all you want to do is actually print the content, then you can use make's internal info function instead so it doesn't try to invoke a Windows command:
all:
$(info $(ROLS))
Of course that won't help if you're trying to do something else with those files that requires a command to be invoked.
Based on additional information in comments:
ROLS= $(wildcard *.c)
target: $(ROLS)
build-target
Or if ROLS used more than once, some efficiency can be achieved with phony target
ROLS= $(wildcard *.c)
.PHONY: all-rols
all-rols: $(ROLS)
target1: all-rols
build-target1
target2: all-rols
build-target2
target3: all-rols
build-target3
I am trying to generate list of object files from source files in my makefile using patsubst
OUT_DIR=Out/
SRC=../../../Client2.4/Client/src/BrokerModule/BrokerApp.cpp
../../../Client2.4/Client/src/CommandMsgManager/CConfigModuleInfo.cpp
OBJ:= $(patsubst %src/%.cpp,${OUT_DIR}$%.o,$(SRC))
I want my OBJ variable to be
OBJ=Out/BrokerModule/BrokerApp.o Out/CommandMsgManager/CConfigModuleInfo.o
after patsubst but above patsubst is not producing the desired result. Please help.
There are some problems with the usage of patsubst, see my suggestion as followed,
OUT_DIR=Out/
SRC=../../../Client2.4/Client/src/BrokerModule/BrokerApp.cpp \
../../../Client2.4/Client/src/CommandMsgManager/CConfigModuleInfo.cpp
# add the definition of src
src=../../../Client2.4/Client/src/
# Modify the definition of OBJ
OBJ:= $(patsubst ${src}%.cpp,${OUT_DIR}%.o,$(SRC))
Filtered out the prepended ${src} and appended .cpp, and keep only
BrokerModule/BrokerApp.cpp & CommandMsgManager/CConfigModuleInfo.cpp.
And % is replaced by the text that matched the % in the previous step.
Patsubst can only handle patterns with one wildcard in it, unluckily. Moreover you are trying to take apart path names not the usual way at the file level. That means, as long as you neither know the prefix nor the postfix parts of the /src/ in your strings, you are out of luck as you can never say 'replace unknown prefix and conserve unknown postfix' (or the other way round).
The usual solution is to 'know' the prefix:
OUT_DIR=Out/
SRC_PATH := ../../../Client2.4/Client/src
SRC=../../../Client2.4/Client/src/BrokerModule/BrokerApp.cpp \
../../../Client2.4/Client/src/CommandMsgManager/CConfigModuleInfo.cpp
OBJ:= $(patsubst $(SRC_PATH)/%,${OUT_DIR}%,$(SRC))
$(info $(OBJ))
Another solution is to use e.g. the GNUmake table toolkit library of make functions (still beta but your problem can be solved):
include gmtt.mk
OUT_DIR=Out
SRC=../../../Client2.4/Client/src/BrokerModule/BrokerApp.cpp \
../../../Client5.6/Client/src/CommandMsgManager/CConfigModuleInfo.cpp
strip-till-last-src = src/$(call implode,$(call down-to,src/,$(call explode,/,$1)))
OBJ:= $(foreach a-path,$(SRC),$(OUT_DIR)/$(call strip-till-last-src,$(a-path)))
$(info $(OBJ))
I have a directory with a bunch of subdirectories. Each subdirectory contains a traj.dat file. I want to use a Makefile to make sure that the file traj.dat gets converted to a different format, and the output file is printed in the same subdirectory as the original file.
Therefore, if I wanted to specify the names of the subdirectories, I could just use:
subdir1/traj.dat.xyz: subdir1/traj.dat
my_convert subdir1/traj.dat subdir1/traj.dat.xyz
subdir2/traj.dat.xyz: subdir2/traj.dat
my_convert subdir2/traj.dat subdir2/traj.dat.xyz
and so on.
How can I get the above result FOR ALL the subdirectories containing a traj.dat file, regardless of their name, without having to list them explicitly?
Cheers!
Assuming you're using GNU make, try:
DATFILES := $(shell find . -name traj.dat)
OUTFILES := $(addsuffix .xyz,$(DATFILES))
all: $(OUTFILES)
%.dat.xyz : %.dat
my_convert $< $#
You weren't really clear what you mean by "subdirectories"; if you just mean immediate subdirectories you can use this instead of the shell function, which is more efficient (and works on Windows):
DATFILES := $(wildcard */traj.dat)
I encountered this line of code in Makefile. I have tried so hard to find an explanation but not able to. Can someone pass a hint if you have a clue? In particular, what does symbol %= mean in this Makefile sentence.
ifndef VARA
VARB := $(CURDIR:/Dev/home/ajhome/%=/home/%)
export VARA:= $(VARB)
endif
Appreciate a lot in advance.
That shouldn't be read as a %=, the % and = have different functions. It's a pattern substitution:
$(VARNAME:pattern1=pattern2)
And % is a placeholder in the pattern. This is often used (for example) to get the name of object files from source files, for example
SRCS = foo.c bar.c
OBJS = $(SRCS:%.c=%.o)
# $(OBJS) is foo.o bar.o
In your case, it will take the directory in $(CURDIR) and replace the /Dev/home/ajhome/ at its beginning with /home/. Well, if $(CURDIR) is a list of directories, it will do so for each one of them, but the variable name suggests that there's only one in them, so I'm going with that.
I have 3 dirs and want to link an executable against the libraries
I already have the directory list:
DIRS=Math Graph Test
I want to get the library list like this:
LIBS=Math/libMath.a Graph/libGraph.a Test/libTest.a
If I use this:
$(DIRS:%=%/%.a)
I get:
Math/%.a Graph/%.a Test/%.a
GNU Makefile says:
Only the first ‘%’ in the pattern and replacement is treated this way; any subsequent ‘%’ is unchanged.
Here I need 2 occurrences to be replaced, not just the first one.
You'll have to use a loop:
LIBS := $(foreach D,$(DIRS),$D/lib$D.a)
eventually I used:
LIBS := $(join $(DIRS), $(DIRS:%=/lib%.a))