I want to use my_name to compile my program ; instead of make
command . Any idea to do the same ??
Your question is difficult to decipher, but one approach is to make a shell script that calls make (or your program, if that's what you're asking about) and name this script whatever you want.
Related
I am trying to read (and eventually set to a Make variable) the value of a variable set in a TCL script in order to echo it to a file.
(I know I can simply puts the var to the file, but it's a more complicated flow, and doing it in the Make would be easier. Just want to know if this is possible)
Set final_val "Test finished! No Failures"
I then want to use the value of final_val (set in the TCL) in the Makefile that calls the script:
#file.tcl
#echo final_val >> $(out_file)
P.S. I am on TCL 8.5
It's not trivial to get a value in a Tcl script into a make run. The simplest way might be to arrange for the script to produce that variable as its only output, as you can then use a fairly simple approach:
On the Tcl side:
#!/usr/bin/env tclsh
set final_val "Test finished! No Failures"
puts $final_val
On the Make side (assuming you've made everything executable):
FINAL_VAL := $(shell thescript.tcl)
There's a lot more complexity possible than just this, of course, but this is the simplest technique that could possibly work.
If you're producing a lot of output in that script, you might need to instead use a separate post-processing of the output to get the part you want. That can get really complex; those cases are often better off being converted to using intermediate files, possibly with recursive makes, as you don't really want to have significant processing done during the variable definition phase of processing a makefile (as it causes real headaches when it goes wrong, and puts you in a world of pain with debugging).
One way that's more complex but which works really well for me is to make the Tcl code generate some file, perhaps outputinfo.mk, that contains the make variable definitions that I want. (On the Tcl side, you're just writing to a file. There's loads of ways to do that.)
Then, I'd make the main makefile have a dependency rule that says that you generate outputinfo.mk you need to run the Tcl script, and then say that the makefile wants to include that outputinfo.mk:
outputinfo.mk:
thescript.tcl > outputinfo.mk
include outputinfo.mk
(For the sake of argument, I'm assuming here that the script writes the file contents to stdout with puts.)
This works well, since make knows about such dependencies caused by include and does the right thing.
In writing a function for fish shell I want to know if a lone wildcard (not part of a bigger expression) was used in the command arguments. Fish does the wildcard expansion before passing arguments to my function, so there is no easy way that I can see to do that, aside from check whether the arguments are the same as the output of ls. The inefficiency of that method makes me sad, though. Is there a better way to do this, without going into fish's source code?
EDIT:
Thanks for the input. Specifically, I am looking to add some functionality like zshell has for warning if there is a * in the arguments of rm. I know that there was an issue opened on GitHub specifically about this but I couldn't find the link again. I have typod, for example, rm * .o instead of rm *.o, and accidentally deleted all my code (... which I brought back from git, but still).
EDIT 2:
Here is the issue on GitHub: https://github.com/fish-shell/fish-shell/issues/1511
No, there's no way for a function to tell where its arguments came from. Maybe if you give more details about what you're really trying to accomplish, we can give another suggestion.
In Haxe, is there a method in the Sys class (or some other class) that returns the output of a shell command (for example, the command "ls"), or will I need to implement this method myself for each target language? I'd like to find a method for invoking shell commands that works with every Haxe target language.
Yes, your own comment contain the answer, which is:
var output = new sys.io.Process("ls", []).stdout.readAll().toString();
Or the cross platform way: sys.FileSystem.readDirectory('')
It might also be faster, because it doesn't invoke an extra process.
Can anyone help me with some advice on how to solve the following problems?
The idea of the problem is to scan a Foo.c file to find all variables, how many times they occur, and the lines were they do occur.
The implementation can be in at least one of the methods:
Build a bat script and eventually additional C program(s)
to solve the problem. Run the implementation in a cmd window.
Build a ps1 script and eventually additional C program(s)
to solve the problem. Run the implementation in a PowerShell window.
I think that, in order to get all variable declarations and uses, and only variable declarations and uses, you're going to need to at least partially parse the source files and analyze the resulting abstract syntax trees.
Your first step, then, is to either write a parser or figure out how to utilize an existing one.
If you are programming C# you can use ANTLR V3 to parse your sources the "C" grammar exists.
You could certainly try to write this as a bat script, but believe me, I've written close to 200 bat scripts and it's horrendous. cmd.exe's findstr would be your friend, but between bat and regex, you're gonna go crazy. Powershell would definitely be better, however a real scripting language would be your best bet, like perl, ruby, or python.
Luckily, in your case anyways, all var in C are explicitly declared, so you could scan once for all the var declarations and create an array of them. Then, scan a second time looking for instances of those variable names. Total number of instances would be total_times_seen -1 since the first would be the var declaration. This assumes of course they are only declared once...
Do you know if there's any tool for compiling bash scripts?
It doesn't matter if that tool is just a translator (for example, something that converts a bash script to a C program), as long as the translated result can be compiled.
I'm looking for something like shc (it's just an example -- I know that shc doesn't work as a compiler). Are there any other similar tools?
A Google search brings up CCsh, but it will set you back $50 per machine for a license.
The documentation says that CCsh compiles Bourne Shell (not bash ...) scripts to C code and that it understands how to replicate the functionality of 50 odd standard commands avoiding the need to fork them.
But CCsh is not open source, so if it doesn't do what you need (or expect) you won't be able to look at the source code to figure out why.
I don't think you're going to find anything, because you can't really "compile" a shell script. You could write a simple script that converts all lines to calls to system(3), then "compile" that as a C program, but this wouldn't have a major performance boost over anything you're currently using, and might not handle variables correctly. Don't do this.
The problem with "compiling" a shell script is that shell scripts just call external programs.
In theory you could actually get a good performance boost.
Think of all the
if [ x"$MYVAR" == x"TheResult" ]; then echo "TheResult Happened" fi
(note invocation of test, then echo, as well as the interpreting needed to be done.)
which could be replaced by
if ( !strcmp(myvar, "TheResult") ) printf("TheResult Happened");
In C: no process launching, no having to do path searching. Lots of goodness.