I am trying to use rm command in ifeq condition in a makefile, but I was encountering error saying missing separator. May I pls know if we can't use rm command in makefile if it's a non-target.
To avoid removing work/*.elf manually, I tried adding the below highlighted line in cfg.mk, however I was getting ‘missing separator error’ (at that highlighted line)
ifeq ($(EN_DBG_MSGS),1)
rm $(CFG_DIR)/work/*.elf #throws error
export CARGS += -DDBG_MSGS_FLAG
endif
I even tried below line but unsuccessful.
if [ -a $(CFG_DIR)/work/$(TEST).elf ]; then rm -r $(CFG_DIR)/work/$(TEST).elf; fi
May I pls know if I am missing anything here.
rgds
Kishore
Related
I have the following lines in my makefile:
.PHONY : clean
clean:
#echo "Running Clean"
$(shell if [ -e exe ]; then rm exe; else echo "no files"; fi)
When I run:
make clean
I get the following output on the shell
Running Clean
no files
make: no: Command not found
Makefile:22: recipe for target 'clean' failed
make: *** [clean] Error 127
Any suggestions?
The problem is the use of $(shell ...). What you want is:
.PHONY : clean
clean:
#echo "Running Clean"
#if [ -e exe ]; then rm exe; else echo "no files"; fi
As far as an explanation of what's going wrong -- when you first run the clean target, make will expand all make variables and functions in the recipes before it starts running them -- because $(shell ...) only has one $, this is considered a make function. Make runs the command, which outputs no files to stdout, and replaces the call with that string, and then starts executing the recipes... So now make sees the following:
clean:
#echo "Running Clean"
no files
When it tries to run no files, due to the lack of a #, it echos the line to the screen, and then passes the command to the shell. Because the shell doesn't recognize the keyword no it outputs the error you're seeing. Make itself then fails because the shell returned an error.
Hey all I'm the same guy who asked this question but I found an answer right after I posted this, I think I'll leave this up (unless this is against stackoverflow etiquette) in case someone else has the same problems. My solution was echoing the string to stdout.
$(shell if [ -e exe ]; then rm exe; else echo "no files" >&2; fi)
I tried to suppress an error from rm command by writing
Makefile:
...
clean: $(wildcard *.mod)
-rm $^ 2>/dev/null
...
I ran:
$ make clean
rm 2>/dev/null
make: [clean] Error 64 (ignored)
I still had gotten an error.
Anyway, when I tried
$ rm [some non-existent files] 2>/dev/null
on the bash shell, it just works fine.
How can I use 2>/dev/null inside a makefile?
2>dev/null will redirect the error output so you don't see it, it will not prevent the shell to raise the error level. And the - sign in front of your shell command will tell GNU make to continue even if the error level is raised but it will not either prevent the shell to raise it.
What you want is the shell not to raise the error level and this can be done like this :
Unix (credits to this answer)
-rm $^ 2>/dev/null ; true
Windows
-rm $^ 2>NUL || true
or if you don't have rm on Windows
-del /F /Q $^ 2>NUL || true
The message make: [clean] Error 64 (ignored) is being printed by make after it sees that your shell command has failed.
It will therefore not be affected by any redirection that you use in the recipe.
Two fixes:
Use the -f rm flag. rm -f never returns an error.
(Well, hardly ever anyway, and if it does you probably want to know about it!)
Stop the shell command returning an error: simply append || : to the command.
Say what? Well if the rm succeeds your job is done and make is happy. OTOH if rm fails, the shell runs the second command in the or.
: is a shell built-in that always succeeds, and is much preferable to true IMHO.
The first of these is best in this case,
though the second is a general, if somewhat less efficient, pattern.
.PHONY: clean
clean: ; rm -rf *.mod
I have a makefile including the following lines:
buildrepo:
#$(call make-repo)
define make-repo
for dir in $(C_SRCS_DIR); \
do \
mkdir -p $(OBJDIR)/$$dir; \
done
endef
On the line with the commands for dir in $(C_SRCS_DIR); \ I get the following error message:
"dir not expected at this moment"
make: *** [buildrepo] Error 255
I am using GNU make.
Can anybody tell me what is going wrong?
Actually this for ... in ... ; do ... done statement is a Unix command not a GNU make command, therefore I guess you are using a Windows machine (or any other one). You have to find the equivalent for your system.
But GNU make has a foreach function which works like this :
$(foreach dir,$(C_SRCS_DIR),mkdir -p $(OBJDIR)/$(dir);)
Also note that in your very specific case (not related to GNU make but to Windows) you can create all the dirs without a for/foreach loop, just like this :
mkdir -p $(addprefix $(OBJDIR)/,$(C_SRCS_DIR))
For a schoolproject I try around with makefiles. First I create the files with
install: main.c
gcc -asve-temps main.c
#if test ! -d bin/; then mkdir bin; else : fi
mv a.out $(shell pwd)/bin/
chmod 555 ./bin/a.out
Now I want to clear the project:
clear:
#if test -d *.[osia]; then rm *.[osia] else : ; fi
#if test -d a.out then rm a.out; else: ; fi
Running make install works fine. Running make clear produces the error code:
/bin/sh: 1: test: main.i: unexpected operator
and does not remove the requested files. I want to delete all the *.o *.s *.i and *.a files by running the make clear target using the pattern given above avoiding the error cannot remove ... : no such file or directory
test expects a single argument; when you pass it a glob, it's getting a bunch of them. Something like find will work in this case:
find . -maxdepth 1 -name '*.[osia]' -delete
Or, why check if the file exists at all?
rm -f *.[osia]
Couple of other notes: if you don't have an else clause in your if statement, don't include it. Read up on the test command; you certainly don't want to be using -d if you're looking for files. And, you can use the variable $PWD in place of running a subshell to get it.
I found that I can use ifneq in makefile and I tried to compare 0 and the output of command stat:
#for f in `find $(PATH_PAGES) -name *.hbs`; do \
ifneq "`stat -c '%Y' $$f`" "0";
//some code here
endif
done
But in terminal I've got an error: ifneq: command not found
Is there a different way to compare this or maybe I'm doing something wrong?
In this case you don't want to use Make's ifneq, because it does text substitution before handing over the command to the shell, but you have a shell loop that needs to do different things in each iteration depending on the output of a shell command.
Use the shell if instead:
if [ "`stat -c '%Y' $$f`" != "0" ]; then
//some code here
fi
If you want to use makefile's if condition then there should not be [TAB] before the if statement because if you specify [TAB] then it is treated as shell command thats why you are getting error that ifneq:command not found its not there in shell.
May be this Conditionals in Makefile: missing separator error?
can help in getting better understanding with makefiles
I found that I needed to prepend the if with a #, and backslashes proved to be necessary as well -
#if [ "`stat -c '%Y' $$f`" != "0" ]; then\
echo hello world;\
fi