How do I remove the first three bytes in a string to remove the lib suffix, for example libstdc++ to stdc++, in GNU make?
You mean something like:
$(patsubst lib%,%,$(MYLIB))
?
Related
I am trying to generate list of object files from source files in my makefile using patsubst
OUT_DIR=Out/
SRC=../../../Client2.4/Client/src/BrokerModule/BrokerApp.cpp
../../../Client2.4/Client/src/CommandMsgManager/CConfigModuleInfo.cpp
OBJ:= $(patsubst %src/%.cpp,${OUT_DIR}$%.o,$(SRC))
I want my OBJ variable to be
OBJ=Out/BrokerModule/BrokerApp.o Out/CommandMsgManager/CConfigModuleInfo.o
after patsubst but above patsubst is not producing the desired result. Please help.
There are some problems with the usage of patsubst, see my suggestion as followed,
OUT_DIR=Out/
SRC=../../../Client2.4/Client/src/BrokerModule/BrokerApp.cpp \
../../../Client2.4/Client/src/CommandMsgManager/CConfigModuleInfo.cpp
# add the definition of src
src=../../../Client2.4/Client/src/
# Modify the definition of OBJ
OBJ:= $(patsubst ${src}%.cpp,${OUT_DIR}%.o,$(SRC))
Filtered out the prepended ${src} and appended .cpp, and keep only
BrokerModule/BrokerApp.cpp & CommandMsgManager/CConfigModuleInfo.cpp.
And % is replaced by the text that matched the % in the previous step.
Patsubst can only handle patterns with one wildcard in it, unluckily. Moreover you are trying to take apart path names not the usual way at the file level. That means, as long as you neither know the prefix nor the postfix parts of the /src/ in your strings, you are out of luck as you can never say 'replace unknown prefix and conserve unknown postfix' (or the other way round).
The usual solution is to 'know' the prefix:
OUT_DIR=Out/
SRC_PATH := ../../../Client2.4/Client/src
SRC=../../../Client2.4/Client/src/BrokerModule/BrokerApp.cpp \
../../../Client2.4/Client/src/CommandMsgManager/CConfigModuleInfo.cpp
OBJ:= $(patsubst $(SRC_PATH)/%,${OUT_DIR}%,$(SRC))
$(info $(OBJ))
Another solution is to use e.g. the GNUmake table toolkit library of make functions (still beta but your problem can be solved):
include gmtt.mk
OUT_DIR=Out
SRC=../../../Client2.4/Client/src/BrokerModule/BrokerApp.cpp \
../../../Client5.6/Client/src/CommandMsgManager/CConfigModuleInfo.cpp
strip-till-last-src = src/$(call implode,$(call down-to,src/,$(call explode,/,$1)))
OBJ:= $(foreach a-path,$(SRC),$(OUT_DIR)/$(call strip-till-last-src,$(a-path)))
$(info $(OBJ))
Normally I use GCC's I-flag to include folders in this way:
gcc main.c -IfolderA -IfolderB
Well I need to reorganize my makefiels structure and I'm thinking about to have an environment variable which is defined as this:
INCLUDES="folderA folderB"
How could I use GCC's I-flag to include both folders?
I thought about something (but it does not work) like this:
gcc main.c -I($(INCLUDES))
You need to add the -I flag to all the "elements" of your INCLUDES variable. Perhaps through something like this:
gcc main.c $(foreach dir,$(INCLUDES),-I$(dir))
The foreach function.
You could also use the addprefix function -- although it's designed to work on filenames, it can still be used here:
gcc main.c $(addprefix -I,$(INCLUDES))
I'm writing a Makefile, I have a list of all the files (without src/ or .cpp), and I want to convert those to build/*.o. Here's what I've tried already:
FILES=icxxabi list memory string
OBJECTS=$(echo ("${build/$$FILES[#].o}")[#])
So for the input a dir/b c, it should output:
build/a.o build/dir/b.o build/c.o
With GNU Make, you could try
OBJECTS=$(patsubst %, build/%.o, $(FILES))
Take a look at the make file name functions:
OBJECTS = $(addprefix build/,$(addsuffix .o,$(FILES)))
I have 3 dirs and want to link an executable against the libraries
I already have the directory list:
DIRS=Math Graph Test
I want to get the library list like this:
LIBS=Math/libMath.a Graph/libGraph.a Test/libTest.a
If I use this:
$(DIRS:%=%/%.a)
I get:
Math/%.a Graph/%.a Test/%.a
GNU Makefile says:
Only the first ‘%’ in the pattern and replacement is treated this way; any subsequent ‘%’ is unchanged.
Here I need 2 occurrences to be replaced, not just the first one.
You'll have to use a loop:
LIBS := $(foreach D,$(DIRS),$D/lib$D.a)
eventually I used:
LIBS := $(join $(DIRS), $(DIRS:%=/lib%.a))
My makefile contains these snippets (among others):
SRC = src
OBJ = obj
DEPS = $(wildcard $(SRC)/*.cpp)
# ...
all : $(BINARIES)
#echo $(pathsubst $(SRC)/%.cpp,$(OBJ)/%.d,$(DEPS))
#echo $(DEPS:$(SRC)/%.cpp=$(OBJ)/%.d)
When I make all, only the second #echo outputs something:
$ make all
obj/sample1.d obj/sample1_U.d
The (gnu make) manual states:
Another type of substitution reference lets you use the full power of the patsubst function. It has the same form ‘$(var:a=b)’ described above, except that now a must contain a single ‘%’ character. This case is equivalent to ‘$(patsubst a,b,$(var))’
From this explanation, I would expect that both #echo statements produce the same output, which they clearly don't. What is wrong with the first form using the explicit pathsubst?
(I am using gnu make 3.81 on OS X.)
Presumably you want patsubst, not pathsubst.