Makefile: target pattern contains no `%' - makefile

Why does my Makefile not work?
makefile:
app-reset:
bin/console avanzu:admin:fetch-vendor
make app-reset is returning:
makefile:3: *** target pattern contains no `%'. Stop.

As explained in https://www.gnu.org/software/make/manual/make.html#Recipe-Syntax, every line in your build recipe must start with a tab character. If you use anything else (such as a sequence of spaces), you get confusing errors.
Usually this manifests as Makefile:42: *** missing separator. Stop. but in your case the colons (:) in your command confused make into thinking you were trying to define a pattern rule.
In any case, the solution is to use a tab character instead. (Or, if you are using GNU make, set .RECIPEPREFIX.)

Can you try this?
sudo apt-get install lib32ncurses5 lib32z1
I meet same problem in 18.04, but I pass the make after install lib32ncurses5 lib32z1.

Related

make: *** No rule to make target 'php', needed by 'test-newsletter-only'. Stop

I have a Makefile (being read by GNU Make 4.1) containing the following line:
test-newsletter-only: php bin/phpunit src/AppBundle/Tests/Service/NewsletterFromPageServiceTest.php
... and when I run make test-newsletter-only in my shell, I get the following:
make: *** No rule to make target 'php', needed by
'test-newsletter-only'. Stop.
I have verfified with php -v that a valid copy of PHP is installed in the environment where I'm running this. What am I doing wrong here?
Please look through make docs.
You can find rule syntax here
php is interpreted as a prerequisite, while I assume you intended it to be part of the recipe. Take it to the new line.

how do i fix; makefile:1: *** target pattern contains no '%'. Stop

I'm new to Linux, so for my undergraduate project, I am working on Ubuntu and I have been trying to configure Freeswitch...almost having a breakthrough. Then finally, to use make && make install, it brought:
"makefile:1: *** target pattern contains no '%'. Stop."
Please, what should I do
Well, it would help greatly if you provided the content of your makefile at line 1 (where the error is reported to be, by makefile:1:). Without that we can only guess.
But basically what that message means is that you have used static pattern rule syntax, but your target pattern(s) don't contain any pattern token (%). What this usually means is you have a "stray" colon in your rule that you didn't expect or want. Without seeing your makefile rules we can't say more than that.
Also very useful is the GNU make manual section Errors Generated by Make which should give you a description of the error.

Difficulties with a Makefile

So I'm trying to install the Homotopy Type Theory library for Coq from github following these instructions. Running the command etc/install_coq.sh sets it off messing with a bunch of files before it hits an error as so:
$ make clean
make: *** No rule to make target `clean'. Stop.
Apparently there's one or more bugs present within Makefile.am, and according to what I've read while googling the issue it's likely related to improper whitespace. Running make clean myself yields the same thing:
make: *** No rule to make target `clean'. Stop.
Meanwhile running make -f Makefile.am clean yields:
Makefile.am:4: *** missing separator. Stop.
Lines 4-6 in the file are simply:
if make_hoqide
bin_SCRIPTS += hoqide
endif
What's wrong with that that's causing the problem?
Makefile.am is generally paired with Makefile.in; these need to be processed with automake or configure before you get a usable real Makefile.
If you've got a script "autogen.sh" in your top-level source directory, run that
first, then configure:
$ ./autogen.sh
$ ./configure
$ make
This is, in fact, step 3 of the instructions that you linked to. Perhaps the install_coq.sh script isn't finding all of the dependencies that you need?

Missing separator in Makefile

So here's the thing.
I'm trying to build pngwriter. In the makefile there's a line saying:
include make.include
The file make.include has the function to specify the platform used via a symlink, it has just one line:
make.include.linux
(there's a file in the same directory called make.include.linux which has some necessary settings. And by the way, I'm doing this on Windows with MinGW)
in the msys shell, when I do make, it says:
make.include:1: *** missing separator. Stop.
I've looked at other missing separator posts and they're about spaces/tabs, which I think it's not the case here. I've searched about makefiles, symlinks, separators and could solve it.
Please help!
EDIT! OK, so make.include.linux isn't a command, it's a file whose contents need to be included in the original makefile. The make.include should be, as I read, a symlink to make.include.linux.
What you have there isn't valid make syntax. Commands can only be run as part of a target recipe. In your case it seems like what you want is:
all:
make.include.linux
Assuming that make.include.linux is a command, and not something else. Make sure the indentation is a tab character.

Get error for "make: Nothing to be done for 'target'"

Let me illustrate it with an example.
mkdir test
cd test
touch target
make target
This will result in: make: Nothing to be done for 'target'.
So make tells me there is nothing to do. This is because make did not find a rule to make target, but because the target already exists make tells me there is nothing to do.
Now, I don't want that. I want make to give me an error when it cannot find a rule for target, even though the target already exists.
I have tried the following:
echo '.DEFAULT:
echo make: *** No rule to make target `$#'. Stop.
false'> Makefile
But this does not stop the make when making multiple targets.
The problem is, that make assumes the target name is also a file which will be build by the given commands.
But sometimes this is not true (e.g. think of "clean").
To tell make that some targets don't build this file, you need to make them "phony". Put the following line into your Makefile:
.PHONY: target
If you think about it, you would end up with a chicken-and-egg situation (or infinite regress). Suppose you managed to have a rule that said 'You must have a rule to create target before it is legitimate', then you'd have a rule that says 'target depends on X' for some other file X. That's written:
target: X
command to build target from X
But then you'd be back to the starting point: you'd also want a rule to create X. How can you do that? You might have a rule that depends on nothing and magically creates the file X when it is needed:
X:
command to build X from nothing
Without a rule like that, you have an infinite regress.
So, make is designed to ensure that files exist and are up to date. If a file exists and there are no rules - implicit or explicit - to specify how it is made, then the file is up to date. What you are seeking to do is not possible.
Actually this sounds like a perfectly reasonable (if misguided ;-)) request. You will have to explicitly list every source file with a rule with an empty recipe though.
Here you go:
Makefile: ;
.PHONY: dodgy
dodgy%: dodgy; $(error You must provide a rule for $*)
%: dodgy% ;
The proof of the pudding:
$ rm aa
$ make aa
Makefile:4: *** You must provide a rule for aa. Stop.
$ touch aa
$ make aa
Makefile:4: *** You must provide a rule for aa. Stop.
Note that the line Makefile: ; is necessary. After all, the first thing make tries to do is rebuild the Makefile.
Note also that the catch-all pattern rule is non-terminal. This can be a massive performance hit. As the manual says about match anything rules "They are very useful, but it can take a lot of time for make to think about them."

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