I want to design a PID controller in LabVIEW for target FPGA Device. My FPGA Device is NI Digital Electronic FPGA board SO any hint will be helpful for me thanks.
it is already there for you:
http://zone.ni.com/reference/en-XX/help/371599L-01/lvfpga/fpga_floating_point_pid/
A few examples are available too, shipped with Labview FPGA
Related
I have an altera DE2 cyclone-ii fpga board and I want to implement a project on software defined radio(SDR) using GNU Radio on it.Is it possible to load USRP Hardware Driver(FPGA build) provided by Ettus Research.If possible how can I do it.If not is there any other way to implement SDR on FPGA :)
You probably will need some daughter boards to do the front-end processing, which handles the high-frequency signals.
You can use an RTL as a daughter board and with some changes at the USRP code (mostly on the signal reception) you will be able to build your own SDR.
I bought a cheap board with Altera Cyclone II from ebay and want to start experimenting.
I created a simple program, after some research I managed to compile it and after flashing to the board the programming tool said it is 100% complete.
However the behaviour of the board has not changed since the time I first plugged the power supply in(three onboard LEDs are blinking).
It looks like the program has not been loaded to the board.
I don't know what I did wrong.
Any ideas? I am completely new to FPGAs. Thank you
Normally the configuration stream is written into fpga sram, and it won't live across the power cycle. If you want that configuration be "permanent", write it into on-board configuration flash chip.
Did you check with this short introduction: http://laurie.tech/start-fpga/ ?
I'm new to fpga programming, and I'm wondering how to make my fpga design distributable. Here's the scenario I have in mind. I have a network of computers, each deployed with an fpga based peripheral. I want to update the fpga design on the peripherals periodically. How do I accomplish this without spending a fortune on software licenses?
I have a small dev kit for an fpga that shipped with an executable to load example design files (it was an Altera fpga FYI). Does anyone know how I would create such an executable?
Some specifics:
My fpgas are Xilinx Spartan 6Es. I'm using Xilinx ISE for fpga development. The host computers are running debian linux.
Thanks for any and all advice!
If youre dealing with Altera: one computer would have the software tools and licenses needed to synthesize the project. Assuming all the FPGAs are the same model on each station/node, Quartus will generate an .sof file which you can copy and open from station to station. All you would need to do is download the Altera programmer tool (I believe you can download it separately from Quartus II) on each station which is free. Then upload the .sof to the board using the programmer, where you can permanently store it on the fpga prom using a technique similar to the following:
https://m.youtube.com/watch?v=ZrMe8JS7Ktk
However if you have Xilinx and Altera mix, Xilinx has .bit/xdl files, and uses another tool (impact) to upload their bitstreams. They can't be converted to and from bit and sof. So it's recommended that you probably stick to one make (Xilinx or Altera) and model based on your plans.
It looks like what you are looking for is how to make your FPGA's field upgradable. Assuming your FPGA is loading from an external memory such as an SPI flash chip, then you need to modify your design so that it is capable of writing to the SPI chip (or whatever) itself. This is most simply done by putting a register in your design which maps to the individual pins on the flash chip, and then "bit bang" the register from a connected computer. Assuming your FPGAs feed data into your own software running on the computer, then you would modify this software to have the functionality of manipulating this register to reflash the flash device. Obviously, if this goes wrong you bricked your device until it can be flashed again with the JTAG, but it provides a way for all the devices to get updated in the systems they operate without needing to buy a JTAG cable for every single station.
If you have Ethernet on your board you can use the remote programming tool from fpga-cores.
Then you can remote login to the network and program the FPGAs or mail the new config file to you customer and they run the programmer. This is how we remotely updates our boards.
Spartan 6 is supported. As a bonus you can also do some remote debugging with the remote logic analyzer.
Everything is free for non commercial use.
I noticed that the PCI bus has the JTAG wires (i.e. TCK TDI TDO etc.): is there any way to use that JTAG for re-programming an fpga based PCIe device? (supposing that the fpga's JTAG is connected to the PCI wires).
thanks
Michele
EDIT: since I see a -1, maybe I couldn't make myself understood... I'm going to try to better explain the situation. We have a Terasic DE5 (Stratix V FPGA) PCIe board, which actually has the JTAG "wires" of the PCIe bus routed to the FPGA. It's true that there is a JTAG port soldered on the board, but for mechanical reasons is hard to reach and use.
So my question is: is it possible to use the PCI pins to programm the FPGA as we can do with the BLASTER? if so, what's the linux infrastructure to support the PCIe JTAG programming? If there's no chance, could someone explain me why?
I've never come across any motherboard which allows the host processor access to the JTAG on the PCI slots. It's there (as I understand it) for manufacturers to use in end-of-line test kit.
I guess you might find some JTAG pins on a header somewhere. Again, I've never come across any motherboard with that documented for end users.
I've looked at the JTAG connections you describe but found no way to use them. These connections seem to be only useful for manufacturing test of a motherboard with FPGA board attached. That is the purpose for which JTAG (boundary scan) was original designed.
Here are two alternatives to what you propose:
Send new bitstreams over PCIe, write them to the boot flash. Reset the FPGA to load the new design. On some machines, you can reset the FPGA without rebooting by requesting Linux to rescan the device.
Send new bitstream over PCIe, and use partial reconfiguration to load the changed part of the design. This requires an additional license from Altera.
My company is trying to build a pcb with an obsolete xilinx fpga (XC3042A) which is part of the XC3000 series chips. Does anyone have any experience programming the data to the chip? I'm looking for what software, hardware, etc. people have used.
I have programmed old Xilinx chips (XC4010XL) using a custom built interface to the ISA bus.
I used Turbo-C on a DOS box and a home-made ISA card with '245 (bidir transceiver) and a 74LS74 (dual flip flop D) for strobe signals on a slave parallel configuration.
It is not difficult to implement the same using a parallel port, for instance.
You should be able to find the programming specs from the Xilinx website. They provide documentation on the different methods used in programming their FPGA. It should be in their AppNotes. They have several modes - typically slave serial or select map (parallel). That means some sort of SPI flash, or parallel flash, or JTAG.
If you look around, you may find schematics for a DIY programming cable too! You can also interface a small micro, say a 8-bit PIC to handle the programming specs while you design your own custom interface to it or interface it to a SD card or something else.
The current Xilinx tools and cables will program old parts.
The XC3000 series does not use the JTAG interface, so you can not use the Xilinx programmer to download your configuration.
You can do so by either using an external EPROM or an embedded processor to download the code.
Take a look at this applications note from Xilinx:
http://www.xilinx.com/support/documentation/application_notes/xapp090.pdf
For daisy chain:
http://www.xilinx.com/support/documentation/application_notes/xapp091.pdf
It describes the data format as well as signal info for downloading the configuration file to the FPGA.
You can use older version of the Xilinx programmer from their web site and configure the devices, I believe the last version of the xilinx supporting the 3000 series was version 8 but I am not sure.
Check out FTDI. You might be able to convince them to go with some updated hardware. It's currently $150 CAD for USB + FPGA, and $80 CAD extra if you bundle it with a Manual. Plus shipping.
It even supports the free web kit available from the Xilinx website.