Have you ever experienced a situation when an object file was not present after successful compilation?
Running on windows using gnumake-4.2.1 and gcc-arm-none-eabi-5_4-2016q3 toolchain
I have a makefile which I am not full author of
this is interesting part
DEPFLAGS = -MT $# -MMD -MP -MF $#.d
$(OBJS_OUTPUT_FOLDER)/%.o : %.cpp
#$(CXX) -c $< -o $# $(CFLAGS) $(DEPFLAGS) $(INC_FOLDERS_INT) $(LANGUAGE_STANDARD_CPP) \
&& echo $# OK && $(CP) $# C:/build/
and this is the console output
build/bar.o OK
build/baz.o OK
build/foo.o OK
cp: can't stat 'build/foo.o': No such file or directory
make[1]: *** [Makefile:223: build/foo.o] Error 1
make[1]: *** Waiting for unfinished jobs....
Checking the file system shows that the foo.o really is not present, sometimes other files are missing as well (for example baz.o.d).
I don't really think its fault of the makefile because it gets done eventually (usually on the second to third try without cleaning).
When all of the objects are done I usually get linker error
aaa.hh:183: undefined reference to `MyNamespace::MyFun(short, short, short)'
MyFun is not in bar, baz neither in foo. The object file that should contain MyFun is present, but the size of it is total nonsense (556B), but if I manually delete it (as suggested elsewhere on SO when dealing with undefined references (as a corrupted one)) and make all again it gets done (now the size is around 1.5MB) and creates the binary.
Edit:
As the incorrect files have stable size (well, for the time being it seems so) I have added
#test `wc -c <$#` -ne 556;
to the rule(Checking file size in makefile, stopping if file is too short), this catches the wrong objects (I know specific case) and together with .DELETE_ON_ERROR: I don't have to manually delete the bad ones I find after linking the output of the console in this case is
[ CXX ] build/bar.o
make[1]: *** [Makefile:219: build/bar.o] Error 1
make[1]: *** Deleting file 'build/bar.o'
while in the other case
[ CXX ] build/foo.o
/spt/resources/sh: can't open build/foo.o: no such file
sh: 556: unknown operand
make[1]: *** [Makefile:220: build/foo.o] Error 2
so it probably is not makefile deleting it (I believe it would announce it as in the first case)
Edit2:
After setting a virtual machine (Windows 7) and making the project again (same makefile, same toolchain, same make) it goes smoothly. I guess there really is something on the host computer, maybe an antivirus or some other corporate security software...
Thanks in advance
Related
I am supposed to write a Makefile for a project I need to do. I have it all done but when I try to do it, I get the following output:
make: Nothing to be done for `Makefile'
What might be the cause of this?
Here's my Makefile file:
###########################################################
# Makefile for XXXXX
# name1, name2
# account1, account2
###########################################################
EXEC = a1
CC = /opt/SUNWspro/bin/cc
$(EXEC):
$(CC) -o $(EXEC) a1.cpp a1.h a1.sic
rm -f *.o
clean:
rm -f *.o core diss $(EXEC)
#######################[ EOF: Makefile ]###################
Edit:
Thanks to a kind user, I now know what happened.
Now I have the following output
/opt/SUNWspro/bin/cc -o a1 a1.cpp a1.h a1.sic
ld: fatal: file a1.cpp: unknown file type
ld: fatal: file processing errors. No output written to a1
make: *** [a1] Error 2
Can you please help?
Are you typing make Makefile for some reason? Don't. Just type make. make a1 or make -f Makefile will work for your situation, too, but why bother with the extra typing?
As an aside, it's a bit weird to include header files on your compile line. Also, your makefile doesn't specify any dependencies, which is kind of the whole reason to have one in the first place...
Edit: to answer your new question, don't compile C++ code with a C compiler. That said, I'm not sure about the link error you're getting. Is a1.cpp not a normal source file (type file a1.cpp to find out)?
It seems like you are having very fundamental problems. Maybe starting with a good beginner book would be useful?
I'm running into a problem trying to write a Makefile for cross compilation for a Beaglebone. I'm using gcc-linaro 7.5.0 on a Windows 10 machine.
The problem occurs when I try to put all sources from the directory into a variable for later use.
SRCDIR = $(CURDIR)\source
SRCS := $(wildcard $(SRCDIR)\*.cpp
This and this have previously been posted and this solution has been accepted, however, I cannot seem to get it to work. This line #echo $(SRCS) gives me ECHO is off which makes me assume that I'm doing something wrong because $(SRCS) seems to be empty, hence the message(?) (source folder exists and it is not empty)
Then when the linker is called I get a message possibly also indicating that the directory seems to be empty which it is not.
"D:\UserData\User\DEV\gcc-linaro-7.5.0-2019.12-i686-mingw32_arm-linux-gnueabihf\bin\arm-linux-gnueabihf-g++.exe" -o hellobone -marm -O0 -g -I. -ID:\UserData\User\DEV\hellobone\include
arm-linux-gnueabihf-g++.exe: fatal error: no input files
compilation terminated.
make: *** [hellobone] Fehler 1
I have searched for hours for an answer to this. I am new to gcc and Makefiles.
I have a Makefile in some source code that looks like this:
CC=gcc
SRCDIR=src
BINDIR=../bin
CFLAGS= -flag
LIBS= -lthing
...
$(BINDIR)/program_name: $(SRCDIR)/program_name.c
$(CC) $(CFLAGS) $(SRCDIR)/program_name.c -o $(BINDIR)/program_name $(LIBS)
I understand what all of this means except what ../ in BINDIR is meant to do. When I make the Makefile, I get the error message:
/usr/bin/ld: cannot open output file ../bin/program_name: No such file or directory
collect2: error: ld returned 1 exit status
Makefile:20: recipe for target '../bin/program_name' failed
make: *** [../bin/program_name] Error 1
My guess is that the original author of this Makefile meant that the bin folder should go in the parent directory of where the Makefile is located. I know when using the Linux CLI command cd that the dot dot means go up a directory. Is that what this is trying to achieve?
To automatically create the $(BINDIR) directory before it is actually needed you must declare it as a prerequisite (dependence) of any target that uses it. But each time its content changes its timestamp also changes. So, declaring it as a regular prerequisite is not the best thing to do because the targets depending on it would be re-built without real reason, just because the content of $(BINDIR) changed.
This is why make also supports order-only prerequisites (OOPs):
$(BINDIR)/program_name: $(SRCDIR)/program_name.c | $(BINDIR)
$(CC) $(CFLAGS) $< -o $# $(LIBS)
$(BINDIR):
mkdir -p $#
Note the | that introduces the list of OOPs. An OOP is built if it does not exist, which causes the targets depending on it to be (re-)built too. But if it exists make does not even consider its last modification time. Even if some target depending on it is older, it is not rebuilt just because of that.
Note: I also used the $< and $# automatic variables. In the rule's recipe they expand as the first prerequisite ($(SRCDIR)/program_name.c) and the target ($(BINDIR)/program_name), respectively. They are highly recommended: less typing, less errors prone, more generic rules... they have many good properties.
Your makefile is missing a rule to create the BINDIR directory - if it doesn't exist, your link line won't be able to put the resulting binary there! A rule like this one should do it:
$(BINDIR):
mkdir -p $(BINDIR)
Just make sure that any other rules (like the one in your question) also depend on this directory!
I am supposed to write a Makefile for a project I need to do. I have it all done but when I try to do it, I get the following output:
make: Nothing to be done for `Makefile'
What might be the cause of this?
Here's my Makefile file:
###########################################################
# Makefile for XXXXX
# name1, name2
# account1, account2
###########################################################
EXEC = a1
CC = /opt/SUNWspro/bin/cc
$(EXEC):
$(CC) -o $(EXEC) a1.cpp a1.h a1.sic
rm -f *.o
clean:
rm -f *.o core diss $(EXEC)
#######################[ EOF: Makefile ]###################
Edit:
Thanks to a kind user, I now know what happened.
Now I have the following output
/opt/SUNWspro/bin/cc -o a1 a1.cpp a1.h a1.sic
ld: fatal: file a1.cpp: unknown file type
ld: fatal: file processing errors. No output written to a1
make: *** [a1] Error 2
Can you please help?
Are you typing make Makefile for some reason? Don't. Just type make. make a1 or make -f Makefile will work for your situation, too, but why bother with the extra typing?
As an aside, it's a bit weird to include header files on your compile line. Also, your makefile doesn't specify any dependencies, which is kind of the whole reason to have one in the first place...
Edit: to answer your new question, don't compile C++ code with a C compiler. That said, I'm not sure about the link error you're getting. Is a1.cpp not a normal source file (type file a1.cpp to find out)?
It seems like you are having very fundamental problems. Maybe starting with a good beginner book would be useful?
I am attempting to compile a simulator for Y86 code (http://csapp.cs.cmu.edu/public/sim.tar) on Windows using mingw and msys, the simulator uses Tcl and Tk for a GUI that it has, so I first tried downloading the needed includes and libs for Tcl and Tk to build with, that didn't work, so I downloaded the source and built them in msys (http://wiki.tcl.tk/14828).
The issue I am having is that I keep getting the same error when running the make file,
chrismeyer#MEYER-C /src/sim
$ make
(cd misc; make all)
make[1]: Entering directory /src/sim/misc'
make[1]: Nothing to be done forall'.
make[1]: Leaving directory /src/sim/misc'
(cd pipe; make all GUIMODE=-DHAS_GUI TKLIBS="-l /opt/tcl/lib" TKINC="-I /opt/tcl/include")
make[1]: Entering directory/src/sim/pipe'
Building the pipe-std.hcl version of PIPE
../misc/hcl2c -n pipe-std.hcl < pipe-std.hcl > pipe-std.c
gcc -Wall -O2 -I /opt/tcl/include -I../misc -DHAS_GUI -o psim psim.c pipe-std.c \
../misc/isa.c -l /opt/tcl/lib -lm
c:\minGW\bin..\lib\gcc\mingw32\3.4.5........\mingw32\bin\ld.exe: cannot find -lC:/msys/1.0/opt/tcl/lib
collect2: ld returned 1 exit status
make[1]: * [psim] Error 1
make[1]: Leaving directory `/src/sim/pipe'
Sorry about the formatting of the error, it got messed up a little bit.
The main problem is this line
C:\minGW\bin\..\lib\gcc\mingw32\3.4.5\..\..\..\..\mingw32\bin\ld.exe: cannot find -lC:/msys/1.0/opt/tcl/lib
I am unsure why gcc cannot find the lib directory, it exists, I have checked many times.
Any insight into this issue would be very helpful!
Thanks!
After taking a short look at the Makefiles in the sim.tar distro i would say your variables are not setup properly.
Try the following settings in your Makefile:
TKLIB="-L/opt/tcl/lib -ltk -ltcl"
TKINC="-I/opt/tcl/include"
Depending on the exact libs you have you might need to add some version numbers like -ltcl85 or so, but try without first.