I'm new to STM32 and I followed the instructions here in order to program my first stm32f103c8t6 board in Ubuntu.
Here is the code which I added to the source code:
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration----------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_0);
HAL_Delay(500);
}
/* USER CODE END 3 */
}
And of course, I have set PA0 port as GPIO_output in STM32CubeMX.
Here is the output of function MX_GPIO_Init:
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOA_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0, GPIO_PIN_RESET);
/*Configure GPIO pin : PA0 */
GPIO_InitStruct.Pin = GPIO_PIN_0;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
The code builds and uploads successfully to the board. Here is the output for rebuilding the code which builds and uploads the code:
-------------- Clean: Release in sample1 (compiler: GNU GCC Compiler for ARM)---------------
Executing clean command: make -f Makefile cleanRelease
rm -fR .dep build
Cleaned "sample1 - Release"
-------------- Build: Release in sample1 (compiler: GNU GCC Compiler for ARM)---------------
Checking if target is up-to-date: make -q -f Makefile Release
Running command: make -f Makefile Release
mkdir -p build
C. Compiling build/system_stm32f1xx.o...
C. Compiling build/stm32f1xx_hal.o...
C. Compiling build/stm32f1xx_hal_cortex.o...
C. Compiling build/stm32f1xx_hal_dma.o...
C. Compiling build/stm32f1xx_hal_flash.o...
C. Compiling build/stm32f1xx_hal_flash_ex.o...
C. Compiling build/stm32f1xx_hal_gpio.o...
C. Compiling build/stm32f1xx_hal_gpio_ex.o...
C. Compiling build/stm32f1xx_hal_pwr.o...
C. Compiling build/stm32f1xx_hal_rcc.o...
C. Compiling build/stm32f1xx_hal_rcc_ex.o...
C. Compiling build/stm32f1xx_hal_tim.o...
C. Compiling build/stm32f1xx_hal_tim_ex.o...
C. Compiling build/main.o...
C. Compiling build/stm32f1xx_hal_msp.o...
C. Compiling build/stm32f1xx_it.o...
S. Compiling build/startup_stm32f103xb.o...
2018-06-21T10:32:46 INFO usb.c: -- exit_dfu_mode
C. Linking build/sample1.elf...
/usr/bin/arm-none-eabi-size build/sample1.elf
text data bss dec hex filename
3560 20 1572 5152 1420 build/sample1.elf
H. Linking build/sample1.hex...
B. Building build/sample1.bin...
Used gcc: 6.3.1
/usr/local/bin/st-flash erase
2018-06-21T10:32:46 INFO common.c: Loading device parameters....
2018-06-21T10:32:46 INFO common.c: Device connected is: F1 Medium-density device, id 0x20036410
2018-06-21T10:32:46 INFO common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x10000 bytes (64 KiB) in pages of 1024 bytes
2018-06-21T10:32:46 INFO common.c: Loading device parameters....
2018-06-21T10:32:46 INFO common.c: Device connected is: F1 Medium-density device, id 0x20036410
2018-06-21T10:32:46 INFO common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x10000 bytes (64 KiB) in pages of 1024 bytes
st-flash 1.4.0-39-g6db0fc2
Mass erasing
/usr/local/bin/st-flash --reset write build/sample1.bin 0x8000000
2018-06-21T10:32:46 INFO common.c: Attempting to write 3580 (0xdfc) bytes to stm32 address: 134217728 (0x8000000)
st-flash 1.4.0-39-g6db0fc2
Flash page at addr: 0x08000000 erased
Flash page at addr: 0x08000400 erased
Flash page at addr: 0x08000800 erased
2018-06-21T10:32:46 INFO common.c: Finished erasing 4 pages of 1024 (0x400) bytes
2018-06-21T10:32:46 INFO common.c: Starting Flash write for VL/F0/F3/F1_XL core id
2018-06-21T10:32:46 INFO flash_loader.c: Successfully loaded flash loader in sram
Flash page at addr: 0x08000c00 erased
1/4 pages written
2/4 pages written
2018-06-21T10:32:46 INFO common.c: Starting verification of write complete
2018-06-21T10:32:46 INFO common.c: Flash written and verified! jolly good!
3/4 pages written
4/4 pages written
Process terminated with status 0 (0 minute(s), 1 second(s))
0 error(s), 0 warning(s) (0 minute(s), 1 second(s))
However, the LED does not start to blink as expected. LED works fine when I connect it to 5volt. I have checked the board's pins by AVO meter and they are all connected to the micro-controller.
After a few research, I thought that it has to do something with Boot0 and Boot1 pins so I tried different options from here but none of them worked.
Here is the image of my board:
How can I fix it?
I believe the HAL_Delay function is using systick to count time in ms, systick must be set to 1ms to get the right delay, did you configure that ?
I am not sure how you do this.
If the time between the output toggles is very low, the output will not toggle because you set GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;, try GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; then you can use an oscilloscope to check if it toggles.
If you do not have an oscilloscope at hand, you could try to insert a "while loop" counting towards a high number, instead of the HAL_Delay function.
Counter=0;
while (Counter<500000000)
{
Counter++;
}
Assuming your clock frequency is set at 72MHz, this will give a time in the range of 0.5 to 1 sec.
Remember to declare the variable as integer 32 bit or higher, e.g. uint32_t counter = 0;
If it does not work, set a breakpoint at the HAL_GPIO_Togglepin line, it will then pause at the breakpoint line and every time you click "RUN", it should then run to the breakpoint again and the output should toggle.
I was dealing with the same problem for a week. a simple program for blinking the LED diode in the arduino environment with stm32f103c8t6 was working, the combination of stm32f103c8t6, stm32CubeMX, ubuntu's gcc-arm (gcc-arm-none-eabi version:15:6.3.1+svn253039-1build1) and ubuntu 18.04 does not.
After I installed GNU Embedded Toolchain for Arm the things started to work.
GNU Arm Embedded Toolchain Version 8-2018-q4-major Linux 64 solved my problem.
Your code should work, but you are only toggling an unconnected µC pin.
If you look at the schematics from the "black pill" homepage the LED is connected to
PB12
The BOOT0 pin should be connected to GND if you want to run your firmware (from flash) the BOOT1 pin doesn't matter.
One thing in your image: you don't have a resistor for your LED to limit the current, depending on the LED type this could damage the LED and/or the µC pin.
Maybe you should first try to use D2 from the board and if that works you could switch over to your on LED.
I don't know if you've done a correct initialization of the pin:
PB12 Setup
GPIO_InitTypeDef GPIO_InitStruct;
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET);
/*Configure GPIO pin : PB12 */
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
The Clock enable is very important for each peripheral.
I had the same problem and I solved that by connecting BOOT0 pin to the ground...
Related
I have a custom boot loader program. The loader must be able to program any part of the flash, including upgrading itself. To accomplish this, the loader startup code copies the whole program from flash into RAM and then jumps to main().
The program works fine, but I can't get the debugger to set breakpoints. The specific error message that I get is "Unable to set requested breakpoint on target". Reading the state of variables and single stepping DOES seem to work.
How can I get the debugger to work in this setup?
Development Environment: Atmel Studio 7
Processor: ATSAME70 (This is an ARM Cortex M7)
Compiler: GCC
Tool: Atmel-ICE
Interface: SWD (Serial Wire Debug)
The relevant portions of the linker script look like this...
/* Memory Spaces Definitions */
MEMORY
{
rom (rx) : ORIGIN = 0x00400000, LENGTH = 0x00004000 /* rom, 2097152K */
ram (rwx) : ORIGIN = 0x20400000, LENGTH = 0x00060000 /* ram, 393216K */
}
SECTIONS
{
.reset : {
. = ALIGN(4);
KEEP("Device_Startup/startup.o"(.text))
KEEP(*(.reset_code))
} > rom
PROVIDE(_exit = .);
.text :
{
. = ALIGN(4);
_rom_to_ram_copy_vma_start = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
...
...
_rom_to_ram_copy_vma_end = .;
} > ram AT > rom
_rom_to_ram_copy_lma_start = LOADADDR(.text);
}
The program coplies everthing between _rom_to_ram_copy_vma_start and _rom_to_ram_copy_vma_end into RAM and then jumps to main in RAM.
Given that I used "ram AT > rom" in the linker script one would think that the debugger should know that the code is in RAM and should have no problem setting the breakpoint there.
I am trying to program my STM32f103c8 using STM32Cubemx, code::blocks and CubeMXMakefile.py. The compilation result shows 0 errors and 0 warnings and that flashing was successful but the code (blinking PC13) isn't running on the board.
I installed Stlink by cloning
"https://github.com/texane/stlink" repo, and running make on it and checked if it worked by running lsusb and confirmed that "STMicroelectronics ST-LINK/V2" was detected.
i also had already installed the arm compilers for codeblocks and they seem to work as well.
My issue was mainly at first that the code wouldn't flash to the board and when running " CubeMXMakefile.py . " i would get a warning that st-flash is not installed although it was built from running Make on the clone, and when trying to "make flash" i would get an error that st-flash can't be found in "/usr/local/bin". I solved this issue (i think) by manually copying the the st-flash file from the build/release directory in the clone repo to the path mentioned.
Now the code compiles with no errors in compiling or flashing but the code doesn't work still.
this is the code, all ofcourse generated by cubemx except for the while block:
/**
******************************************************************************
* #file : main.c
* #brief : Main program body
******************************************************************************
** This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* COPYRIGHT(c) 2019 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f1xx_hal.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* Private variables ---------------------------------------------------------*/
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
/* USER CODE BEGIN PFP */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE END PFP */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* #brief The application entry point.
*
* #retval None
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration----------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_13);
HAL_Delay(500);
}
/* USER CODE END 3 */
}
/**
* #brief System Clock Configuration
* #retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct;
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
_Error_Handler(__FILE__, __LINE__);
}
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
{
_Error_Handler(__FILE__, __LINE__);
}
/**Configure the Systick interrupt time
*/
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
/**Configure the Systick
*/
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
/* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}
/** Configure pins as
* Analog
* Input
* Output
* EVENT_OUT
* EXTI
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
/*Configure GPIO pin : PC13 */
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* #brief This function is executed in case of error occurrence.
* #param file: The file name as string.
* #param line: The line in file as a number.
* #retval None
*/
void _Error_Handler(char *file, int line)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
while(1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* #brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* #param file: pointer to the source file name
* #param line: assert_param error line source number
* #retval None
*/
void assert_failed(uint8_t* file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
/**
* #}
*/
/**
* #}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
this is the compilation output:
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
-------------- Clean: Release in testagain (compiler: GNU GCC Compiler for ARM)---------------
Executing clean command: make -f Makefile cleanRelease
rm -fR .dep build
Cleaned "testagain - Release"
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
-------------- Build: Release in testagain (compiler: GNU GCC Compiler for ARM)---------------
Scanned 0 files for #includes, cache used 0, cache updated 0
Checking if target is up-to-date: make -q -f Makefile Release
Running command: make -f Makefile Release
mkdir -p build
C. Compiling build/system_stm32f1xx.o...
C. Compiling build/stm32f1xx_hal.o...
C. Compiling build/stm32f1xx_hal_cortex.o...
C. Compiling build/stm32f1xx_hal_dma.o...
C. Compiling build/stm32f1xx_hal_flash.o...
C. Compiling build/stm32f1xx_hal_flash_ex.o...
C. Compiling build/stm32f1xx_hal_gpio.o...
C. Compiling build/stm32f1xx_hal_gpio_ex.o...
C. Compiling build/stm32f1xx_hal_pwr.o...
C. Compiling build/stm32f1xx_hal_rcc.o...
C. Compiling build/stm32f1xx_hal_rcc_ex.o...
C. Compiling build/stm32f1xx_hal_tim.o...
C. Compiling build/stm32f1xx_hal_tim_ex.o...
C. Compiling build/main.o...
C. Compiling build/stm32f1xx_hal_msp.o...
C. Compiling build/stm32f1xx_it.o...
S. Compiling build/startup_stm32f103xb.o...
2019-01-27T23:17:52 INFO common.c: Loading device parameters....
2019-01-27T23:17:52 INFO common.c: Device connected is: F1 Medium-density device, id 0x20036410
2019-01-27T23:17:52 INFO common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x10000 bytes (64 KiB) in pages of 1024 bytes
C. Linking build/testagain.elf...
/usr/bin/arm-none-eabi-size build/testagain.elf
text data bss dec hex filename
3560 12 1572 5144 1418 build/testagain.elf
H. Linking build/testagain.hex...
B. Building build/testagain.bin...
Used gcc: 6.3.1
/usr/local/bin/st-flash erase
st-flash 1.5.1-12-g30de1b3
Mass erasing
/usr/local/bin/st-flash --reset write build/testagain.bin 0x8000000
2019-01-27T23:17:52 INFO common.c: Loading device parameters....
2019-01-27T23:17:52 INFO common.c: Device connected is: F1 Medium-density device, id 0x20036410
2019-01-27T23:17:52 INFO common.c: SRAM size: 0x5000 bytes (20 KiB), Flash: 0x10000 bytes (64 KiB) in pages of 1024 bytes
2019-01-27T23:17:52 INFO common.c: Attempting to write 3572 (0xdf4) bytes to stm32 address: 134217728 (0x8000000)
st-flash 1.5.1-12-g30de1b3
Flash page at addr: 0x08000000 erased
Flash page at addr: 0x08000400 erased
Flash page at addr: 0x08000800 erased
2019-01-27T23:17:52 INFO common.c: Finished erasing 4 pages of 1024 (0x400) bytes
2019-01-27T23:17:52 INFO common.c: Starting Flash write for VL/F0/F3/F1_XL core id
2019-01-27T23:17:52 INFO flash_loader.c: Successfully loaded flash loader in sram
Flash page at addr: 0x08000c00 erased
1/4 pages written
2/4 pages written
2019-01-27T23:17:52 INFO common.c: Starting verification of write complete
2019-01-27T23:17:52 INFO common.c: Flash written and verified! jolly good!
3/4 pages written
4/4 pages written
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
CWD for depslib was: /home/ubunzer/Documents/CBARM/testagain.
CWD for depslib is: /home/ubunzer/Documents/CBARM/testagain.
Scanned 0 files for #includes, cache used 0, cache updated 0
Process terminated with status 0 (0 minute(s), 2 second(s))
0 error(s), 0 warning(s) (0 minute(s), 2 second(s))
try
st-flash reset
I found my MCU not running code after flashing.
It worked after resetting manually.
If it does not work for you, try this with openOCD.
Tried with OpenOCD, didn't re-flash the device, just "reset run" - and device started working.
https://github.com/texane/stlink/issues/532#issuecomment-286882627
I'm not new to programming or C, but I am very new to chip programming in particular and I'm having a lot of trouble finding and deciphering documentation.
To be specific, I am using MPLab X IDE in conjunction with the XC8 compiler. My chip is a PIC12F1501. My intent (for now) is to gently pulse an LED, but eventually it will be adapted to drive a speaker with a sine wave. Pretty sure my circuit is good as I can make an LED blink on and off with a digital output.
Now, I understand how to set the TRIS register so that the right legs are output or input as required. I know how to use ANSEL to set these pins into analog mode. What I cannot seem to fathom is what command or combination of commands I need to use to actually write an analog value to a pin. I've used the latch (LAT) to set a digital output, but I can't see how to do the same thing with an analog value.
From the data sheet for the chip I get the vague idea that I'm supposed to set the value of some other register representing the DAC to determine the level of voltage output, and then latch to 1 just as you would for digital output, but I'm not used to reading these things. I've tried a number of register names that are hinted in the documentation for the DAC but none of them compile.
I've tried snippets of code for other chips in the same approximate family and none of them compile either.
Can someone share a brief snippet demonstrating how analog output works in the PIC12F1501?
In the specification sheet for the PIC12(L)F1501, you will find the required registers described in chapter 16 (pages 124 - 126). In short summary they are DAC1CON0 and DAC1CON1. You set your desired value with the DAC1CON1 register and enable/configure with the DAC1CON0 register.
One thing to note is that the DAC is not meant to drive an external load and probably wont work with your LED attached unless you have an external buffer.
// With 5V and 0V Positive/Negative references, outputs 3.125V
// (See manual equation 16-1).
DAC1CON1 = 20;
// Enable the DAC and output to both DACOUT pins using VDD as positive
// reference (see manual register 16-1).
DAC1CON0 = 0b10110000;
// Note that most chips also have utility structs in the MC8 headers so
// you can also set the bits individually as follows:
DAC1CON0bits.DACOE1 = 1;
DAC1CON0bits.DACOE2 = 1;
DAC1CON0bits.DACEN = 1;
The Microchip supplied header file does not define DAC1CON0 or DAC1CON1 only DACCON0 and DACCON1.
This code may build for you:
/*
* File: main.c
* Target: PIC12F1501
* Compiler: XC8 v1.45
* IDE: MPLABX v4.05
* Author: dan1138
*
*
* PIC12F1501
* +---------------:_:---------------+
* PWR -> : 1 VDD VSS 8 : <- GND
* <> : 2 RA5 DACOUT1/PGD/RA0 7 : <> ICD_PGD
* <> : 3 RA4 PGC/RA1 6 : <> ICD_PGC
* ICD_MCLR -> : 4 RA3/MCLR DACOUT2/INT/RA2 5 : <> DAC-OUTPUT
* +---------------------------------+
* DIP-8
*
* Created on July 25, 2018, 7:20 PM
*/
#pragma config FOSC = INTOSC /* Oscillator Selection Bits (INTOSC oscillator: I/O function on CLKIN pin) */
#pragma config WDTE = OFF /* Watchdog Timer Enable (WDT disabled) */
#pragma config PWRTE = OFF /* Power-up Timer Enable (PWRT disabled) */
#pragma config MCLRE = ON /* MCLR Pin Function Select (MCLR/VPP pin function is MCLR) */
#pragma config CP = OFF /* Flash Program Memory Code Protection (Program memory code protection is disabled) */
#pragma config BOREN = OFF /* Brown-out Reset Enable (Brown-out Reset disabled) */
#pragma config CLKOUTEN = OFF /* Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin) */
#pragma config WRT = OFF /* Flash Memory Self-Write Protection (Write protection off) */
#pragma config STVREN = ON /* Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset) */
#pragma config BORV = LO /* Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), low trip point selected.) */
#pragma config LPBOR = OFF /* Low-Power Brown Out Reset (Low-Power BOR is disabled) */
#pragma config LVP = OFF /* Low-Voltage Programming Enable (High-voltage on MCLR/VPP must be used for programming) */
#include <xc.h>
void main(void)
{
DACCON0 = 0x90; /* DAC drives DACOUT2 */
for(;;)
{
/* generate a 5-bit sawtooth outout */
DACCON1 = (DACCON1 + 1u) & 0x1Fu;
}
}
Your PIC12F1501 also has got 4 PWM channels. You can very easily use these PWMs as analog output when you put a RC-Filter behind the pin. That will give you a resolution of up to 10 Bit.
The GPU device that I have is GeForce GT 750M, which I found is compute capability 3.0. I downloaded the CUDA code found here: (https://github.com/fengChenHPC/word2vec_cbow. Its makefile had the flag -arch=sm_35.
Since my device is compute capability 3.0, I changed the flag to -arch=sm_30. It compiled fine, but when I run the code, I get the following error:
word2vec.cu 449 : unspecified launch failure
word2vec.cu 449 : unspecified launch failure
It shows it multiple times, because there are multiple CPU threads launching the CUDA kernel. Please note that the threads do not use different streams to launch the kernel, so the kernel launches are all in order.
Now, when I let the flag be, i.e. -arch=sm_35, then the code runs fine. Can someone please explain why the code won't run when I set the flag to match my device?
Unfortunately your conclusion that the code works when compiled for sm_35 and run on an sm_30 GPU is incorrect. The culprit is this:
void cbow_cuda(long window, long negative, float alpha, long sentence_length,
int *sen, long layer1_size, float *syn0, long hs, float *syn1,
float *expTable, int *vocab_codelen, char *vocab_code,
int *vocab_point, int *table, long table_size,
long vocab_size, float *syn1neg){
int blockSize = 256;
int gridSize = (sentence_length)/(blockSize/32);
size_t smsize = (blockSize/32)*(2*layer1_size+3)*sizeof(float);
//printf("sm size is %d\n", smsize);
//fflush(stdout);
cbow_kernel<1><<<gridSize, blockSize, smsize>>>
(window, negative, alpha, sentence_length, sen,
layer1_size, syn0, syn1, expTable, vocab_codelen,
vocab_code, vocab_point, table, table_size,
vocab_size, syn1neg);
}
This code will silently fail if the kernel launch fails because of incomplete API error checking. And the kernel launch does fail if you build for sm_35 and run on sm_30. If you change the code of that function to this (adding kernel launch error checking):
void cbow_cuda(long window, long negative, float alpha, long sentence_length,
int *sen, long layer1_size, float *syn0, long hs, float *syn1,
float *expTable, int *vocab_codelen, char *vocab_code,
int *vocab_point, int *table, long table_size,
long vocab_size, float *syn1neg){
int blockSize = 256;
int gridSize = (sentence_length)/(blockSize/32);
size_t smsize = (blockSize/32)*(2*layer1_size+3)*sizeof(float);
//printf("sm size is %d\n", smsize);
//fflush(stdout);
cbow_kernel<1><<<gridSize, blockSize, smsize>>>
(window, negative, alpha, sentence_length, sen,
layer1_size, syn0, syn1, expTable, vocab_codelen,
vocab_code, vocab_point, table, table_size,
vocab_size, syn1neg);
checkCUDAError( cudaPeekAtLastError() );
}
and compile and run it for sm_35, you should get this on an sm_30 device:
~/cbow/word2vec_cbow$ make
nvcc word2vec.cu -o word2vec -O3 -Xcompiler -march=native -w -Xptxas="-v" -arch=sm_35 -lineinfo
ptxas info : 0 bytes gmem
ptxas info : Compiling entry function '_Z11cbow_kernelILx1EEvllflPKilPVfS3_PKfS1_PKcS1_S1_llS3_' for 'sm_35'
ptxas info : Function properties for _Z11cbow_kernelILx1EEvllflPKilPVfS3_PKfS1_PKcS1_S1_llS3_
0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
ptxas info : Used 34 registers, 448 bytes cmem[0], 8 bytes cmem[2]
~/cbow/word2vec_cbow$ ./word2vec -train text8 -output vectors.bin -cbow 1 -size 200 -window 7 -negative 1 -hs 1 -sample 1e-3 -threads 1 -binary 1 -save-vocab voc #> out 2>&1
Starting training using file text8
Vocab size: 71290
Words in train file: 16718843
vocab size = 71290
cbow.cu 114 : invalid device function
ie. the kernel launch failed because no appropriate device code was found in the CUDA cubin payload in your application. This also answers your earlier question about why the output of this code is incorrect. The analysis kernel simply never runs on your hardware when built with the default options.
If I build this code for sm_30 and run it on a GTX 670 with 2gb of memory (compute capability 3.0), I get this:
~/cbow/word2vec_cbow$ make
nvcc word2vec.cu -o word2vec -O3 -Xcompiler -march=native -w -Xptxas="-v" -arch=sm_30 -lineinfo
ptxas info : 0 bytes gmem
ptxas info : Compiling entry function '_Z11cbow_kernelILx1EEvllflPKilPVfS3_PKfS1_PKcS1_S1_llS3_' for 'sm_30'
ptxas info : Function properties for _Z11cbow_kernelILx1EEvllflPKilPVfS3_PKfS1_PKcS1_S1_llS3_
0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads
ptxas info : Used 34 registers, 448 bytes cmem[0], 12 bytes cmem[2]
~/cbow/word2vec_cbow$ ./word2vec -train text8 -output vectors.bin -cbow 1 -size 200 -window 7 -negative 1 -hs 1 -sample 1e-3 -threads 1 -binary 1 -save-vocab voc #> out 2>&1
Starting training using file text8
Vocab size: 71290
Words in train file: 16718843
vocab size = 71290
Alpha: 0.000009 Progress: 100.00% Words/thread/sec: 1217.45k
ie. the code runs correctly to completion without any errors. I can't tell you why you are not able to get the code to run on your hardware because I cannot reproduce your error on my hardware. You will need to do some debugging on your own to find the root cause of that.
As this LINK shows there is no GeForce GTX 750M.
yours is either:
GeForce GTX 750 Ti
GeForce GTX 750
or
GeForce GT 750M
If yours is one of the first two then your GPU is Maxwell-based and has Compute Capability = 5.0.
Otherwise, your GPU is Kepler based and has Compute Capability = 3.0.
If you're not sure what your GPU is, first figure it out by running deviceQuery from the NVIDIA SAMPLE.
I'm a beginner in C language. I'm trying to operate on EEPROM memory in my ATmega 8 and ATtiny2313.
Based on this tutorial I've created the following codes:
1) writes a number to place 5 in uC's eeprom
#define F_CPU 1000000UL
#include <avr/eeprom.h>
int main()
{
number=5;
eeprom_update_byte (( uint8_t *) 5, number );
while (1);
{
}
}
2) blinks the LED n times, where n is the number read from place 5 in eeprom
#define F_CPU 1000000UL
#include <avr/io.h>
#include <util/delay.h>
#include <avr/eeprom.h>
int main()
{
DDRB=0xFF;
_delay_ms(1000);
int number;
number=eeprom_read_byte (( uint8_t *) 5) ;
for (int i=0; i<number; i++) //blinking 'number' times
{
PORTB |= (1<<PB3);
_delay_ms(100);
PORTB &= (0<<PB3);
_delay_ms(400);
}
while (1);
{
}
}
The second program blinks the led many times, and it's never the amount which is supposed to be in eeprom. What's the problem? This happens in both atmega8 and attiny2313.
EDIT:
Console results after compilation of the first program:
18:01:55 **** Incremental Build of configuration Release for project eeprom ****
make all
Invoking: Print Size
avr-size --format=avr --mcu=attiny2313 eeprom.elf
AVR Memory Usage
Device: attiny2313
Program: 102 bytes (5.0% Full)
(.text + .data + .bootloader)
Data: 0 bytes (0.0% Full)
(.data + .bss + .noinit)
Finished building: sizedummy
18:01:56 Build Finished (took 189ms)
That is one of the every time failures for beginners :-)
If you compile simply with avr-gcc <source> -o <out> you will get the wrong results here, because you need optimization! The write procedure MUST be optimized to fulfil the correct write access! So please use '-Os' or '-O3' for compiling with avr-gcc!
If you have no idea if your problem comes from read or write the eeprom, read your eeprom data with avarice/avrdude or similar tools.
The next pitfall can be, that you erase your eeprom section if you program your flash. So please have a look what your programmer really do! A full chip erase erases the eeprom as well.
Next pitfall: What fuses you have set? You are running with the expected clock rate? Maybe you have programmed internal clock and your outside crystal seems to be working with wrong speed?
Another one: Just have a look for the fuses again! JTAG pins switched off? Maybe you see only JTAG flickering :-)
Please add the compiler and programming commands to your question!