I have a golang CLI program which generates a makefile to a specific project. While this works, there is an issue when the project already has a makefile. Of course I can check that in advance to avoid collusion, but how is it suggested to do it?
I'm not an expert in makefiles, but how can I create second makefile (maybe with the project name or something) that user can run via make (I guess with additional steps or info to the terminal)
You can generate it as Makefile.project and document to be run as make -f Makefile.project
You can give your Makefile whatever filename. Then make must be executed with parameter -f <your_filename> or --file=<your_filename>. See make manual on filenames.
Which version of make are you using? Some versions run special makefiles before others. For example, GNU make looks for the following files and runs the first one it finds: GNUmakefile, Makefile, makefile.
If you are using GNU make, then name your generated file GNUmakefile and add in the making any makefile already in the directory. That way, anyone running make in the directory will automatically run the generated makefike first.
Related
I don't have idea that what is meaning of path-like target specification.
I would like to see execute commands in Makefile that generated by cmake to know that build process of clang.
I saw it with make -n command, it seems like executed other make command like following.
make -f utils/hmaptool/CMakeFiles/hmaptool.dir/build.make utils/hmaptool/CMakeFiles/hmaptool.dir/build
I have no idea what above make command do it.
In this command, target specification is path-like.(utils/hmaptool/CMakeFiles/hmaptool.dir/build)
What is meaning of this?
I know non-path-like target, for example make install or make clean and so on.
But I have no idea path-like target.
What is this??
The above command will use the makefile utils/hmaptool/CMakeFiles/hmaptool.dir/build.make, and will attempt to build the target utils/hmaptool/CMakeFiles/hmaptool.dir/build.
You will have to check the makefile to know what exactly build is. Probably a PHONY target to build everything in that folder.
I'm trying to 'make' BIND DNS server.
I'm using the command: make -f Makefile.in and I get the error:
Makefile.in:32: *** missing separator (did you mean TAB instead of 8 Spaces?). Stop..
I tried it both on AntiX Linux (which is based on Debian testing) and on Ubuntu.
I tried versions 9.11.2, 9.10.6 and 9.9.11 of BIND.
I'm using keyboard layout QWERTY US UTF8 (but I did not edit the Makefile.in).
On line 32 of the Makefile.in there is this:
#BIND9_MAKE_RULES#
I've never seen such lines before (I'm new to 'make').
Could this be a directive replaced by space characters and cause the problem?
I know there are several questions like this, which are downvoted or closed as off topic, but some answers would be appreciated, or probably if you could tell me where should this question be asked?
You can't use Makefile.in as a makefile. It's not a makefile. It's a template for a makefile, that must be processed first to turn it into a real makefile, which will be called Makefile (no .in).
You should read the INSTALL or README file in the source distribution to learn how to build it. I haven't tried to build BIND (in a very, very long time) but most likely it comes with a configure script that you must run first. That script will create the Makefile for you. Then you run make (without any -f ... flags).
As corrected by MadScientist:
Makefile.in is a template file used by autoconf and friends. Specifically, autoconf takes configure.in file to generate a configure script. This script then takes Makefile.in and modifies it to create Makefile. What you found was a marker for this process. You can find more information here
I am writing a recipe to configure and install some software in Ubuntu using makefiles, and I know you need $(MAKE) instead of make inside the makefile, but is it possible to install a given package just by typing $(MAKE) install package?
Thanks
Make is not a shell, and makefiles are not shell scripts. You really need to remember that - don't try to write a shell script and put it in a makefile. Make is a "declarative" language and not a "procedural" like a script.
You need to understand what files you expect to have after the installation, and what files you have before the installation, and what commands are used to go from the latter to the former. Then make rules where the former depend on the latter, with those commands in the recipes.
If that sounds like too much work, and it may very well be, then, you need to not use a Makefile, but write yourself a shell script instead, and call it in addition (probably after) using Make.
install and package are not files you expect to have after the installation, so they should not have recipes written for them. They may be considered "phony" Make targets, but then, you still need to depend them on "real" files, and write detailed recipes for those.
By default, when running make to compile a C source code file named prog.c
make prog
the default command that executes is
cc prog.c -o prog
Sometimes I really need to include some additional flags. I know that when there are no Makefiles, make relies on some environment variables.
On Ubuntu 14.04, how to configure these variables to change the command that gets executed by default?
Step by step answers will be appreciated!
When no makefile is present (or no rule exists in that makefile) make relies on a default built-in database of rules. Run make -p to get make to spit out all the rules it knows about (in the no makefile case that will be the default ones).
When you look at that list you will find a pattern rule for building C source into object files or executables. Those rules have variables in them (like CFLAGS, LDFLAGS, etc.) that can be used to control exactly what you are trying to. That's why they are there (and are why that default command has such funny spacing, in case you ever wondered about that).
I wanted to create a makefile. So I wrote instructions in a notepad file.
But what extension should I give while saving this file?
If you run:
make
this program will look for a file named makefile in your directory, and then execute it.
If you have several makefiles, then you can execute them with the command:
make -f MyMakefile
By default, The GNU Make tries some particular names, no using any extension. You can specify file with any name to it. But if you want syntax highlighting in some editors, you can use an extension.
There is a wildcard rule for recognizing make files in Geany editor:
Make=*.mak;*.mk;GNUmakefile;makefile;Makefile;makefile.*;Makefile.*;
From the GNU Make documentation
By default, when make looks for the
makefile, it tries the following
names, in order: GNUmakefile, makefile
and Makefile. Normally you should call
your makefile either makefile or
Makefile
These will be searched for if you don't specify the makefile with the -f flag (Only GNU make will look for GNUMakefile, so give it that name only if you know you're using GNU tools)
It sounds like you're running Windows, in which case makefiles often have a .NMK suffix (because they are intended for use with NMAKE). In the civilised world though makefiles do not generally have a suffix: makefile or Makefile are the canonical file names.
If you need to distinguish one from another, and you are configuration managing the makefile, you should use project.make as the name. On the basis that most LSE's , in particular gedit, are recognising this over .mak. Upon packaging, or sign out to a dedicated folder it can be renamed to makefile, the fully qualified path being descriptive of the project. In this way you can have different versions. If your work is complex enough to be using a makefile you should not mixing multiple builds in the same folder anyway.