I am having issues with a Makefile on certain systems
SRC = $(wildcard $(SRCDIR)/*.c)
SRCS = $(wildcard $(SRCDIR)/*.s)
works when compiling in Azure Devops, but not when compiling on my local Windows 10 computer.
Changing the source to
SRC = \
$(SRCDIR)/browser.c \
$(SRCDIR)/main.c \
SRCS = $(SRCDIR)/data's
allows compilation without issue in both instances. I am wondering if it could be a dependency not being met, or VPATH getting in the way (although it is not used in my Makefile...
The issue was to do with a patch being applied to make. Removing the patch allowed wildcard to work as expected.
Related
I want to recompile an old Fortran 77 code (having a lot of subroutines) via gfortran in MingW bash platform in windows 10. There is a makefile among the old code files which is attached here:
Version = 2.10
FOR = df
FFLAGS = /optimize:5
INSTALL = move
DELETE = del
COPY = copy
# these libraries must already exist somewhere
# where ld can find them
LIBS = \rfem\lib\GAF77.lib \rfem\lib\VFEM.lib DFPORT.lib
# where the final program is to be placed
BINDIR = \rfem\bin
# where the cat man pages are to go
CATDIR = \rfem\doc
# here are the files needed to construct Rslope2D
FILES = mrslope2d.f \
chknxe.f dismsh.f echosd.f fem2det.f fem2rf.f \
fem2sd.f feminit.f mesh.f openin.f opensd.f \
pltfld.f readsd.f rect.f setsd2.f sim2sd.f \
statsd.f szchk.f vecmsh.f
OBJS = mrslope2d.obj \
chknxe.obj dismsh.obj echosd.obj fem2det.obj fem2rf.obj \
fem2sd.obj feminit.obj mesh.obj openin.obj opensd.obj \
pltfld.obj readsd.obj rect.obj setsd2.obj sim2sd.obj \
statsd.obj szchk.obj vecmsh.obj
rslope2d.exe: $(OBJS)
link /out:rslope2d.exe $(OBJS) $(LIBS)
$(DELETE) $(BINDIR)\rslope2d.exe
$(INSTALL) rslope2d.exe $(BINDIR)
$(COPY) rslope2d.1 $(CATDIR)
clean:
$(DELETE) *.obj
After navigating to the directory where this makefile is located and typing make in the MingW window (to recompile the main code),
I encounter the following error:
No rule to make target 'mrslope2d.obj', needed by 'rslope2d.exe'. Stop.
I am a beginner in Fortran, so apologies if the question is simple.
Looking forward to your suggestions and guidance as I do not know how to resolve this.
Thanks
I've looked through the other posts similar to mine, which have been resolved by fixing a tab or spaces, but that didn't work for me (or I'm not looking in the right place). I'm trying to download the Swarm software, whose last stable release was in the early 2000s. Maybe this is a lost cause (or I might just have to suck it up and run this in a virtual machine) but I'm getting the error "Makefile.am:1: *** missing separator. Stop." The first part of my makefile code is:
if USEBUILTINAVCALL
SUBDIRS = $(LIBOBJCDIR) avcall etc src tools java COM m4 tests
else
SUBDIRS = $(LIBOBJCDIR) etc src tools java COM m4 tests
endif
EXTRA_DIST = VERSION macosx/buildlibs.sh macosx/ChangeLog macosx/configure.sh macosx/INSTALL.MacOSX macosx/README.MacOSX macosx/swarm.xcode/project.pbxproj
SWARM_INSTALL = #SWARM_INSTALL#
install-data-local:
$(mkinstalldirs) $(DESTDIR)$(includedir)
$(INSTALL_DATA) swarmconfig.h $(DESTDIR)$(includedir)
$(INSTALL_DATA) externvar.h $(DESTDIR)$(includedir)
$(mkinstalldirs) $(DESTDIR)$(bindir) $(DESTDIR)$(datadir)/swarm
$(INSTALL_PROGRAM) $(top_builddir)/libtool $(DESTDIR)$(bindir)/libtool-swarm
if test $(SWARM_INSTALL) = install-sh; then $(INSTALL_PROGRAM) $(srcdir)/install-sh $(DESTDIR)$(bindir); fi
install-recursive: install-data-local
This looks to me like a Makefile.in file, not a Makefile. That is, it's intended to be converted by configure or automake.
GNU make doesn't support an if statement (it has ifdef and ifeq and ifneq, but not if). And tokens like #SWARM_INSTALL# are meant to be replaced.
I want to build an out of tree kernel module with the output directory being separate from my source directory? How would I do this? I'm willing to go any route. I'm okay with minimal changes to the kernel build system, I'm okay with copying source files (however I do not want to rebuild if I haven't made any changes to the source files and this doesn't work if I copy source files normally), and I'm okay with setting a parameter or something.
many many people face this problem, including me.
To support build external module at separate output directory.
I modify the kbuild:
firstly, modify src variable at scripts/Makefile.build and scripts/Makefile.clean
-src := $(obj)
+src := $(if $(KBUILD_EXTMOD_SRC),$(KBUILD_EXTMOD_SRC)$(patsubst $(KBUILD_EXTMOD)%,%,$(obj)),$(obj))
secondly, modify scripts/Makefile.modpost
-src := $(obj)
+src := $(if $(KBUILD_EXTMOD_SRC),$(KBUILD_EXTMOD_SRC),$(obj))
# Include the module's Makefile to find KBUILD_EXTRA_SYMBOLS
-include $(if $(wildcard $(KBUILD_EXTMOD)/Kbuild), \
- $(KBUILD_EXTMOD)/Kbuild, $(KBUILD_EXTMOD)/Makefile)
+include $(if $(wildcard $(src)/Kbuild), \
+ $(src)/Kbuild, $(src)/Makefile)
then build external module like this:
make -c $(kernel_src) M=$(extmod_outpu_dir) KBUILD_EXTMOD_SRC=$(extmod_src_dir) modules
Using GNU make for a project in Linux. I'd like to have a test and a prod build, and trying to implement it with conditional directives. Test build has different source files and flags etc. from the prod build.
First I found that if block only works when it's following a target.
# More variable definition skipped.
SRCS := some source files
CXXFLAGS := some complile flags
test: ${myBinary}
ifeq (${BUILD}, UNIT)
#echo BUILD == ${BUILD}
SRCS += ${TEST_SRCS}
CXXFLAGS += some test flags
endif
I use this way so that later I can use a pattern to build .o files, instead of listing all source files for 2 different builds. Basically I try to find a way to use patterns to build .o files, yet still have different files, flags, etc. for test/prod builds.
${BUILD_DIR}/%.o : %.cpp
${CXX} -c ${CXXFLAGS} ${INCS} $< -o $#
But after I put it next to a target, still got this error:
make: SRCS: Command not found
make: *** [test] Error 127
How to fix it to meet my goal?
Other advice on organizing the makefile to meet the goal is most welcomed too.
Edit:
The 2 executables produced can have different names but can be in same location.
I wanna put object files are in ${BUILD_DIR} to separate them from source files.
"Command not found" error is gone after unindenting SRCS line.
I have an X11 app I developed on a RedHat box. When I moved to CentOS, the X11 libraries moved as well. From /usr/X11R6/lib64 to /usr/X11R6/lib (even though both were running 64-bit), and I have seen them elsewhere on other Linux/Unix systems.
I had used the -I and -L compile flags to point to the X11 lib directories directly in the makefile, but have since realized, this requires changes to the makefile when switching machines.
My question is, for the sake of portability... should I keep using -I and -L in the makefile? And if so, is there a way to detect the location automatically? Or, should I just rely on the user having these in their LD_LIBRARY_PATH?
If you're relying on GNU make, you could do something like:
X11LIBS ?= $(word 1, $(dir $(wildcard /usr/X11R6/lib64/libX11.so.*)))
X11LIBS ?= $(word 1, $(dir $(wildcard /usr/X11R6/lib/libX11.so.*)))
X11LIBS ?= $(word 1, $(dir $(wildcard /usr/lib/libX11.so.*)))
# and so on for whatever paths you come across
LDFLAGS += -L$(X11LIBS) -R$(X11LIBS)
This allows the user to override X11LIBS on the command line (make X11LIBS=/usr/local/X11R6/lib), and tries a couple of locations if no user option is given.
You could even abort the build if no path is found, like
ifeq ($(X11LIBS),)
$(error Could not find X11 library path, please specify in X11LIBS
endif
All this is only an option if you're content with restricting the Makefile's portability: non-GNU make very likely won't be happy with these macros.