FSMs extraction with yosys - fpga

I have been trying to use yosys in order to extract FSMs from my structural verilog file (gate library is simprims of Xilinx) with no success. I figured I might need to inform yosys which gate library I use or something similar, but as I said, no success.
Is there anything I should do in order to make this work?
Thank you.

Yosys' FSM extraction is designed to extract FSMs from coarse grain RTL-derived netlists. It is not going to be able to extract FSMs from technology-mapped netlists, this would need a different approach.

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Laravel design patterns

I have a little hard time with all of those design patterns and things that could help me write maintainable code, clean and reusable.What are the most used design patterns in your Apps? A list or something with them will be nice, there are a lot of design patterns and I dont really know with what should I start.
You don't have to consider that much about design patterns if you follow 'Laravel' pre-defined way. they kinda have defined almost everything by following those design patterns.
You can refer these articles as a start.
https://github.com/alexeymezenin/laravel-best-practices
https://www.innofied.com/top-10-laravel-best-practices/
And most importantly Official documentation.
https://laravel.com/docs/7.x
The most import thing you need to consider when using 'Laravel' try to use 'Laravel' as much as possible. (Instead of pure php)

hypothetical: how would you implement bidirectional language support in Sublime text editor, and what features would you like it to have?

Maybe this question is too open-ended and someone will kill it
--- however:
I am building systems (web apps and native) requiring multiple language support, including rtl languages like Arabic and Hebrew. Currently I have no need to be able to program in those languages, but writing content is a must.
There are some difficult choices to make I think in the implementation, because I think at some level (I don't know it's why I'm asking) the text file needs to have a consistent direction of string flow, but when we read and compose these files we need to view these elements with their character order reversed in order for them to be sensible.
(Open ended and non-constructive? I'm hoping to construct a solution.)
I fail to see the connection with SublimeText.
You need RTL support, you use a pre-made component that can handle it.
Or start with a library that can help with that support and does the heavy-lifting (for instance Uniscribe, http://msdn.microsoft.com/en-us/library/windows/desktop/dd374091%28v=vs.85%29.aspx,
or HarfBuzz, http://www.freedesktop.org/wiki/Software/HarfBuzz/)
Adding it yourself means a lot of work (SublimeText fails miserably at it, I don't even think it tries).
To get an idea what you have to deal with, take a look at the Unicode Bidirectional Algorithm
(http://www.unicode.org/reports/tr9/)
Just vote for adding RTL Languages here...
https://sublimetext.userecho.com/topic/37207-right-to-left-languages-support/
They will add it if the votes reach 600

Implement VHDL/Verilog only using lookup tables in Xilinx ISE

Is there any way of telling ISE to synthesize my VHDL/Verilog code into combinational circuits consisting only of look-up tables? I would like to avoid multiplexers, multipliers, and the like in the tech schematic... and wouldn't mind having an unoptimized (with many components than is optimal) version because of this preference.
Thanks SOCommunity!
There is a way to do that. Look at the XST user guide for switches that control the use of the primitives you want to avoid:
http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_2/xst_v6s6.pdf
or:
http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_2/xst.pdf
depending on your target architecture.
For example, to avoid DSP blocks use:
-use_dsp48 no
To avoid automatic packing into BRAMs use:
-auto_bram_packing no
This switch can also be useful:
-slice_utilization_ratio
as will others.
I have a convenient way to look at the available switches, along with some explanation of what they do, on my site:
https://www.boldport.com/flow/#new/options
(click 'Edit', and then 'More options...')
I hope this helps.
In Xilinx you can use the Language templates for this purpose. Select the device you are using and check the available type of LUT's and other components. You can individually instantiate these LUT in your design.
You may have to switch off the "optimization during synthesis" option in XST properties to make this work correctly.
http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/ise_p_lt_using_language_templates.htm

Typing similar code

I've occasionally found myself in situations where I have to type out redundant code... where only one variable or two will change in each block of code. Usually I'll copy and paste this block and make the necessary changes on each block of code... but is there a better way to handle this?
Heavy use of cut and paste usually means there's something not quite right in the design of the code. Think about how you could refactor such as breaking out the cut/paste functionality into commonly called methods.
Yes. There is always a better way to do it than copy-and-paste. You should always get a little uneasy (kind of like you feel when you're about to give a speech in front of a huge crowd) when you're about to hit "Ctrl-V."
In almost any introductory class you're likely to be using a language that has functions, methods, or sub procedures. (What they're called and what they do depends on the language in question). Any variable that changes needs to be a parameter to that function/method/subprocedure.
When you do that (and the method/function/sub is accessible) you can replace the HUGE chunks of code with a single call to your new m-f-s.
There are a lot of other ways to do this, but when you're just getting started this is probably the way to go.
you have a lot of approaches to this situation. I don't know if you're working with OO or structured programming but you can build methods or functions and give them cohesion and unique responsibilities. I think it's an easy way of thinking...
In the OO paradigm we use some therms on how to avoid this situation: cohesion and low decoupling (you could search for them over the Internet). If you can apply both of them in your code, it will be easier to read and maintain.
That's all

Complicated Algorithm - How to store rules separate from processing code?

I'm working on a project which will do some complicated analyzing on some user-supplied input. There will be 3 parts of the code:
1) Input supplied by user, such as keywords
2) Rules, such as if keyword 1 is repeated 3 times in keyword 5, do this, etc.
3) And the analyzing itself which executes the rules and processes the user input, and generates the output necessary based on the processing.
Naturally this will lead to a lot of spaghetti code and many, many if statements in the processing code. I want to avoid that, and keep the rules (i.e. the if statements) separately from the code which loops through the user input and generates the output.
How can I do that, i.e. what is the best way?
If you have enough rules that you want to externalize, you could try using a business rules engines, like Drools in Java.
A business rules engine is a software system that executes one or more business rules in a runtime production environment. The rules might come from legal regulation ("An employee can be fired for any reason or no reason but not for an illegal reason"), company policy ("All customers that spend more than $100 at one time will receive a 10% discount"), or other sources. (Wikipedia)
It could be a little bit overhead depending of what you're trying to do. In my company we're using such kind of tools for our quality analysis tool.
Store it in XML. Easy to parse and update.
I had designed a code generator, which can be controllable from a xml file.
For each command I had a entry in the xml. I was processing the node to generate the opcode for that command. Node itself contains the actions I need to do for getting the opcode. For some commands I had to look into database, all those things I had put in this xml file.
Well, i doubt that it is necessary to have hughe if statements if polymorphism is applied correctly.
Actually, you need a proper domain model for your rules. This goes somehow into the direction of the command pattern, depending on the complexitiy of your code maybe in combination with the state machine pattern.
Once you have your model, defining rules is instantiate them correctly.
This could be done by having an xml definition, which is parsed and transformed into your model. But the new modern and even more fancy way would be using DSLs. If you program in Java and have a certain freedom about your libraries, this would be a proper use case for Embedded DSLs with Groovy. Basically you would need a Builder which constructs your model, that's all.
You always can implement factory that will create certain strategies according to passed parameters. And then you will use those strategies in your code without any if.
If it's just detecting keywords, a finite state machine or similar. If it's doing more, then other pattern matching systems, such as rules engines.
Adding an embedded scripting language to your application might help. The rules would then be expressed in scripts, executed by the applications on processing.
The idea is that scripts are easy to change and contain high level logic that will be executed by your application in details.
There are a lot of scripting languages available to do this : lua, Python, Falcon, squirrel, angelscript, etc.
Have a look at rule engines!
The approach from Lars may also be arguable.

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