I'm trying to connect SFH7050 pulse oximeter to Arduino Uno. SFH7050 is connected via Heart Rate 3 Click board...
https://www.mikroe.com/heart-rate-3-click
...and I struggle to find suitable library for it. I have been searching for two weeks and I haven't found dedicated library yet. Tried MAX30100 library (heard it should work*) and it errors me on initialisation (with "begin"). There's probably something I'm missing here (probably some knowledge, duh), but I'm stuck for good
I'm quite new to Arduino in general, does anybody know, how to get this particular pulse oximeter going?
*I would gladly ask this person again about this, but it's sadly not possible
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hi,
me and my friend are making a console and we would like it to output HDMI(preferably 1080p) using ESP32 but, after looking for ages we haven't found anything.
You can get a VGA card for it, but that is probably the limit of what can be achieved in terms of processing power.
However, it should be sufficient for retro-style consoles. For anything more, you'd need more powerful hardware.
The ESP32 does not produce video output of any kind. Have a look at the data sheet
Actually, you can produce video with the ESP. Look into what Bitluni has done. Also, there is others that have produced code for emulators all on the ESP32 with composite video and VGA outputs.
Youtube search for bitluni, or "esp32 composite video"
I have built several ESP32 clocks out of CRT TVs (color and black/white).
I am using a Cyclone V on a SoCKit board (link here) (provided by Terasic), connecting an HSMC-NET daughter card (link here) to it in order to create a system that can communicate using Ethernet while communication that is both transmitted and received goes through the FPGA - The problem is, I am having a really, really hard time getting this system to work using Altera's Triple Speed Ethernet core.
I am using Qsys to construct the system that contains the Triple Speed Ethernet core, instantiating it inside a VHDL wrapper that also contains an instantiation of a packet generator module, connected directly to the transmit Avalon-ST sink port of the TSE core and controlled through an Avalon-MM slave interface connected to a JTAG to Avalon Master bridge core which has it's master port exported to the VHDL wrapper as well.
Then, using System Console, I am configuring the Triple Speed Ethernet core as described in the core's user guide (link here) at section 5-26 (Register Initialization) and instruct the packet generator module (also using System Console) to start and generate Ethernet packets into the TSE core's transmit Avalon-ST sink interface ports.
Although having everything configured exactly as described in the core's user guide (linked above) I cannot get it to output anything on the MII/GMII output interfaces, neither get any of the statistics counters to increase or even change - clearly, I am doing something wrong, or missing something, but I just can't find out what exactly it is.
Can any one please, please help me with this?
Thanks ahead,
Itamar
Starting the basic checks,
Have you simulated it? It's not clear to me if you are just simulating or synthesizing.
If you haven't simulated, you really should. If it's not working in SIM, why would it ever work in real life.
Make sure you are using the QIP file to synthesize the design. It will automatically include your auto generated SDC constraints. You will still need to add your own PIN constraints, more on that later.
The TSE is fairly old and reliable, so the obvious first things to check are Clock, Reset, Power and Pins.
a.) Power is usually less of problem on devkits if you have already run the demo that came with the kit.
b.) Pins can cause a whole slew of issues if they are not mapped right on this core. I'll assume you are leveraging something from Terasic. It should define a pin for reset, input clock and signal standards. Alot of times, this goes in the .qsf file, and you also reference the QIP file (mentioned above) in here too.
c.) Clock & Reset is a more likely culprit in my mind. No activity on the interface is kind of clue. One way to check, is to route your clocks to spare pins and o-scope them and insure they are what you think they are. Similarly, if you may want to bring out your reset to a pin and check it. MAKE SURE YOU KNOW THE POLARITY and you haven't been using ~reset in some places and non-inverted reset in others.
Reconfig block. Some Altera chips and certain versions of Quartus require you to use a reconfig block to configure the XCVR. This doesn't seem like your issue to me because you say the GMII is flat lined.
do anyone work with MAX MSP and can help me?
how can i control videosignal with incoming audio signal. I would like to swith video input signal betwen 2 cameras, when the music changes. How can i read a frequency or bpm and by changing send signal to switch camera or visualisation? Have someone an idea? I would be glad to read a cople of ideas. Thanks
If you're using Max 5 or later, they have really great built in help files. For instance, when you open Max, go to Help -> Jitter Tutorials. I'd start by reading the first few just to get a handle of how jitter deals with data and matrices. Then specifically for video switching, read tutorial 8: Simple Mixing and 9: More mixing.
Then read tutorial 21: Working with Live Video and Audio Input, and then Tutorial 22: Working with Video output, that'll cover your input and outputs.
For audio analysis, you can either grab some prebuilt stuff in the Max toolbox website. MSP has similar tutorials to Jitter, I'd suggest reading the few introduction one, then you can jump to MSP Tutorial 6: A review of Fundamentals, Tutorial 25: Using the FFT, and Tutorial 23: Viewing Signal Data.
Those should get you started and on the right path.
Also check out the CNMAT set of externals, as there is a lot of really useful prebuilt stuff in there.
I am new to VHDL and FPGA. I have written a sample code which does EXOR of a and b and stores it in c. This code is in VHDL behavioral architecture. I am using Quartus 11.1+SP2-2.11.
I assigned pins say a to SW0, b to SW1 and c to LEDG0. Everything is compiling and there are no errors. I go to Tools->Programmer. I have my FPGA in RUN mode. Mode in Programmer is JTAG and hence the Hardware setup is USB-Blaster [PORT 0]. When I load the .sof file and Click "Start", the progress says "failed". I do not know why.
I tried to search everywhere, but all tutorials or links give the same explanation. I guess there are hardly any who encountered this problem. I want to know if I am missing something. I want to get my fundamentals right!
Are you by any chance using Linux? If you are make sure you've done this: http://www.alterawiki.com/wiki/Quartus_for_Linux#Setup_JTAG
There can be multiple reasons as to why the loading of .sof to FPGA fails. I figured out the following for my device. If any of you are beginners, please follow the same:
1) Make sure you have the data sheet of your device with you. I followed a tutorial and entered the device number they mentioned not the one I had.
2) Check for pin assignments. This is the most important. I found out the Pins used for various switches and LEDs in a consolidated document online.
3) If it still does not work, it is best to contact experts.
Is thee FPGA an Altera DE2? If yes, you can try with this file that works with the DE2 board so that you can know if it is your .sof file that needs to be changed. If the USB blaser appears in Quartus Programmer then most likely your driver is installed correctly and you should verify whether it is your .sof file that needs to change or something else.
I have looked everywhere, the datasheet, the Xilinx website, digilent, etc. etc. and can't find anything! I was able to use the Adept tool to verify that my Cellular RAM is functioning correctly, but I just can't find any stock VHDL code as a controller to write data to and read data from it!! Help!!
Found this link but it's for asynchronous mode, which is not nearly fast enough:
http://embsi.blogspot.com/2013/01/how-to-use-cellular-ram-from-micron.html
Eventually found this on the Nexys 2 Digilent page:
http://www.digilentinc.com/Products/Detail.cfm?Prod=NEXYS2
under
"Onboard Memory controller reference design"
It's just a shame that this was not included with Nexys 3 details as it would have saved a lot of time!
Hopefully somebody else with this issue could at least find what I posted here and find it quickly...