VHDL code for metal detector - vhdl

Question

I am working on a metal detector at the moment but can't figure out how to implement it my VHDL code.
ENTITY sensor IS
port ( metaldetector : in std_logic;
metal : out std_logic;
);
END ENTITY sensor;
As long as there isn't any metal close to the sensor 'metaldetector' gets pulses on a 6.1kHz frequency. So as long as the 'metaldetector' keeps getting pulses the out port 'metal' should be '0'.
When there is a pulse missing (or multiple pulses) 'metal' should become '1' until the next pulse.
It shouldn't be that hard to make a code that can do that, but i just can't figure it out. Any help would really be great!

Answer 1

We managed to solve the problem with some help of other students, and a lot of trying.
I'll post our solution down here, hopefully it can be usefull to others. :)
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
ENTITY sensor IS
port ( metaldetector : in std_logic;
clk : in std_logic;
metal : out std_logic
);
END ENTITY sensor;
ARCHITECTURE sensorbehav OF sensor IS
signal new_count, count: unsigned(20 downto 0);
begin
process (clk, metaldetector)
begin
if (rising_edge (clk)) then
if (metaldetector = '1') then
count <= (others => '0');
else
count <= new_count;
end if;
end if;
end process;
process (count)
begin
new_count <= count + 1;
end process;
process (count)
begin
if (count > 9000) then
metal <= '1';
else
metal <= '0';
end if;
end process;
END ARCHITECTURE;