understanding Makefiles - makefile

Question

I have the following make file:
CC = gcc
CCDEPMODE = depmode=gcc3
CFLAGS = -g -O2 -W -Wall -Wno-unused -Wno-multichar
COMPONENTHEADER = Q_OBJECT
CPP = gcc -E
CPPFLAGS = -I/usr/include/Inventor/annex -D_REENTRANT -I/usr/share/qt3/include
CXX = g++
CXXCPP = g++ -E
CXXDEPMODE = depmode=gcc3
CXXFLAGS = -g -O2 -fno-exceptions -W -Wall -Wno-unused -Wno-multichar -Woverloaded- virtual
CYGPATH_W = echo
GUI = QT
Gui = Qt
INCLUDES =
LIBS = -lSoQt -lqt-mt -lXmu -lXi -lCoin -lGL -lXext -lSM -lICE -lX11 -ldl -lpthread -lm -lcxcore -lcv -lhighgui -lcvaux
OBJS = MathTools.o PointCloud.o ExtractFeatures.o Tile.o Shape.o RoadDynamic.o
SRCS = MathTools.cpp PointCloud.cpp ExtractFeatures.cpp Tile.cpp Shape.cpp RoadDynamic.cpp main.cpp
HDRS = constants.h Shape.h MathTools.h PointCloud.h ExtractFeatures.h Tile.h RoadDynamic.h
WIDGET = QWidget *
all: main
main: main.o ${OBJS}
${CC} ${CFLAGS} ${INCLUDES} -o $# main.o ${OBJS} ${LIBS}
.c.o:
${CC} ${CFLAGS} ${INCLUDES} -c $<
depend:
makedepend ${SRCS}
clean:
rm *.o core *~
tar:
tar cf code.tar Makefile *.c *.h testfile1
print:
more Makefile $(HDRS) $(SRCS) | enscript -2r -p listing.ps
I am wondering why when I run make the output is
g++ -g -O2 -fno-exceptions -W -Wall -Wno-unused -Wno-multichar -Woverloaded-virtual -I/usr/include/Inventor/annex -D_REENTRANT -I/usr/share/qt4/include -c -o main.o main.cpp
instead of:
gcc -g -O2 -W -Wall -Wno-unused -Wno-multichar ...
it seems the cxx variables are overriding the cc variables. Why is that?
also what does the "include =" do in this case? It doesn't seem to be set to anything.
Thank you

Answer 1

Because your object files are apparently built from .cpp files. You have no explicit rule for building .o files from .cpp files, so Make uses the implicit rule $(CXX) $(CPPFLAGS) $(CXXFLAGS) -c.