My include file references many other make files using something like:
include Enablers/MSRP/Android.mk
the problem is that the make file that references all other makefiles is deep in sub-folders, or, in other words the correct path would be something like:
include ../../../../../Enablers/MSRP/Android.mk
In order for me to build my makefile I have to add ../../../../.. to make search path:
ndk-build -I../../../../.. -j8 other params...
(ndk-build is a wrapper for gnu make on android buildsystem, it's equivalent to make build-local.mk other params)
So, what can i do to to avoid adding the ../../../../.. to make search path? I could go the makefile and update all makefile include statements, but I'm looking for the way to add that extra include path at the top of my makefile. Something like:
makeincludepaht += include Enablers/MSRP/Android.mk
include Enablers/MSRP/Android.mk
...
Append the new include path to the standard search path:
.INCLUDE_DIRS += ../../..
Look at the end of the Special Variables section for the .INCLUDE_DIRS special variable.
I'm not familiar with ndk-build, but I have similar setup. I just set a variable in make that contains this path and then use that variable in all my includes.
makefile:
INCLUDE_TOP=../../../../..
include $(INCLUDE_TOP)/someDir/includes.mk
You can also then use INCLUDE_TOP inside includes.mk for all your paths. It is usually better to make it default to some value by conditionally setting in there.
includes.mk:
# will only set if not already set
INCLUDE_TOP ?= ./
HEADERS=$(INCLUDE_TOP)/headers
Related
I have a Makefile that includes another makefile with the include makefile directive and the included Makefile exists on a deep path (200 characters). The Makefile doesn't produce any error on reading the long path Makefile however it's contents are not included in the main Makefile.
include <long-path>/my.mk
I have tried using UNC path post script as well but that also seems to have no effect. Any help how to handle long paths inclusions in Makefiles?
There can be different ways on how you handle this:
Provide Relative Path: A relative path refers to a location that is relative to a current directory, so you dont require to give a full path
Keep your files/sandbox at very short location if possible: Eg: C:
You can use mount/ shortpath option to use short paths.
I have a Makefile with only project-level definitions: which source files to use, what binary or library to make, etc..
It includes ../../Make.Arch for architecture-specific definitions (such as compiler command).
In turn, Make.Arch is meant to include ../etc/Makefile.Standard for all the boilerplate of actually allowing the make system to work .
But include requires a path relative to where the makefile is actually being run (or maybe where the first Makefile is), not relative to the second... What to do?
Make interprets relative paths from the working directory, the directory in which Make is being run. You haven't specified how you're running Make, so I'll assume your running it in the directory with Makefile.
If you are allowed to modify the makefiles, you can change the paths.
You could change Make.Arch from this:
include ../etc/Makefile.Standard
to this:
include ../../../etc/Makefile.Standard
but that would require that any makefile that uses Make.Arch be two directories down from it. That's clearly not a good idea. But we can use a variable:
include $(ARCH_DIR)/../etc/Makefile.Standard
which is provided by Makefile (or any other makefile that uses Make.Arch):
ARCH_DIR := ../..
include $(ARCH_DIR)/Make.Arch
If you are not allowed to modify the makefiles, then you must cheat. One way is to create a symbolic link to Makefile.Standard.
mkdir ../etc
ln -s ../../../etc/Makefile.Standard ../etc
Now Makefile will work. (It ought to be possible to make a link to etc/, but for some reason I can't get that to work right now.)
Apart from the standard directories used by make to locate files loaded by include directives, is there any way to specify additional include paths within the makefile itself? I'm aware of the -I command-line GNU make option but I would like to know if there's any make variable to specify the same.
I suggested using the .INCLUDE_DIRS variable, but as pointed out in the comment below, that variable is read-only.
The only other way I can think of is to have a top-level file invoke the real makefile, and have the top level one update MAKEFLAGS:
# Top level -- Call it GNUmakefile?
INCLUDE_DIRS := first second third
MAKEFLAGS += $(foreach dir,$(INCLUDE_DIRS),--include-dir=$(dir))
.DEFAULT all:;$(MAKE) -f Makefile $(MAKECMDGOALS)
Then the real Makefile is invoked with the three directories in .INCLUDE_DIRS.
Is there a generic was to specify a rule for something that goes from something with an extension to something with no extension? (in this case, '.in' to '')?
I have a project that's using automake. I have some config file templates that need substitutions before installing them. For example, I have a 'foo.ini.in' file that I want to use to create 'foo.ini'. I have a few of these scattered throughout the codebase. However, for each one, I need to create a custom Makefile rule to make them work. Is there a better way? I currently do this in Makefile.am:
bazdir=$(libdir)/#PACKAGE_NAME#/baz
EXTRA_DIST = foo.ini.in bar.ini.in
CLEANFILES = foo.ini bar.ini
foo.ini: foo.ini.in
sed -e 's|#LIBDIR#|$(bazdir)|g' $< > $#
bar.ini: bar.ini.in
sed -e 's|#LIBDIR#|$(bazdir)|g' $< > $#
This works fine, but I need to duplicate the rule for every file. I'd like to write one rule that will do the substitution for any 'ini.in' files to 'ini' files. I've tried:
%.ini.in: %.ini
sed ....
but autoconf complains that % pattern substitution is a non-portable gnumake-ism. It also doesn't like
.ini.in.ini:
sed .....
.. which I can't really blame it for not liking, because I can't even parse that.
Is there a way to do this?
NOTE: I can not use AC_CONFIG_FILES to do this substitution, because 'bazdir' is not fully expanded in that case.
Fortunately, there's a much better way: let the 'configured' files be generated from the templates using the configure script itself. As I mentioned in the comment, I don't see any reason to try to expand $bazdir in the Makefile.am itself. Maybe you can clear this up for me if there's some special reason for this.
In the configure.ac script, substitution variables are defined with the AC_SUBST macro. I'm guessing you want to replace LIBDIR with the value of $bazdir. Note that LIBDIR isn't a good choice of name, as libdir is already used in configure scripts; so let's use a variable name prepended with a project name: BAZ_LIBDIR
1/. set bazdir in the configure script: bazdir="${libdir}/${PACKAGE_NAME}/baz", and substitute with: AC_SUBST(BAZ_LIBDIR, $bazdir). Alternatively, just assign the value to BAZ_LIBDIR and use the single argument form of AC_SUBST. BAZ_LIBDIR is now ready for substitution...
2/. At the end of configure.ac, specify the files to be generated from their <file>.in templates, with AC_CONFIG_FILES. Typically this will list Makefile's, as well as data files, where the .in suffix is implicit.
Assuming a projectdir tree... could be any sort of tree layout of course:
BAZ_LIBDIR="${libdir}/${PACKAGE_NAME}/baz"
AC_SUBST(BAZ_LIBDIR)
...
AC_CONFIG_FILES([Makefile projectdir/Makefile])
AC_CONFIG_FILES([projectdir/foo.ini projectdir/bar.ini])
...
AC_OUTPUT
Instances of #BAZ_LIBDIR# in the <file>.ini.in files will be replaced with the substitution value. No arcane sed invocations are required to generate <file>.ini files.
Another nice feature is that you needn't add foo.ini.in or bar.ini.in to the EXTRA_DIST variable in the Makefile.am - and make distclean will clean the bar.ini and foo.ini files.
I would like to tell (g)make to include some common initializations from a separate file knowing the relative location of the included file with respect to the main Makefile.
However in the manuals I cannot find any built-in variable that would, for example, give you the name of the current Makefile.
For example if I want to include the content of a file in the same directory as the current make file, instead of hard-wiring the location of the include:
# MAIN Makefile : ./scripts/make/TaskA.mk
include ./scripts/make/Common.inc
...
I would like to write something like the following assuming that _MAKEFILE_ contains the TaskA.mk location:
# MAIN Makefile : ./scripts/make/TaskA.mk
MAKEFILE_DIR=$(dirname $(_MAKE_FILE_))
include $(MAKEFILE_DIR)/Common.inc
Doesn't the manual give a recipe based on MAKEFILE_LIST?
Basically
this_makefile := $(lastword $(MAKEFILE_LIST))
before any include directives should do the trick.
Look at GNU make - Other Special Variables. MAKEFILE_LIST includes all Makefiles read. So, if you take the first one and extract the directory, you're done.
MAKEFILE_DIR=$(dir $(firstword $(MAKEFILE_LIST)))
include $(MAKEFILE_DIR)Common.inc