I'm currently using Xilinx ise10.1.I have simulated a Vhdl program for an upcounter.But i dont know how to interface it with PLB bus, so that the microblaze c code can read it via the same bus.Please help me as i'm a fresher in using these tools.
The version 10.1 of ISE is quite old. So, forgive me if I don't remember everything correct.
If you start the xps tool of the EDK part of Xilinx, you should find somewhere in the menus a wizard to create a new Microblaze peripheral. This will create a template with a PLB bus to connect to the Microblaze. You're HDL code can be inserted in the template.
For ISE 14.4:
start xps
create a new project ('File' -> 'New Blank Project')
'Hardware' -> 'Create of Import Peripheral'
'Create templates for a new peripheral'
....
If you only want to read it occasionally, and everything is running off the same clock, you could just instantiate a GPIO peripheral and connect your counter outputs to the GPIO input lines.
Related
I am working with a Zynq board where a custom AXI 4 lite slave peripheral is created and then added from the IP Repository. Then these blocks have been successfully connected with Run Connection Automation. Then bit stream was generated successfully.
Further the SDK was launched. There was a blank C project with simple code for the ZYNQ PS working already. This code was altered by following the pdf "Designing a custom AXI4 lite Slave Peripheral" (the one shown in the following image).
Write and read functions for the custom AXI slave peripheral
Now the SDK executes without any error but when I observe the addresses on SDK monitor, there is no data written into it (as shown in the following image).
Where could I have gone wrong or what have I missed?
Working with vhdl on Vivado 16.2.
What I have already tried: -processing with XSDB console with command
mwr -force 0x43C00000 0x01234
no change there.
Checked the Vivado Address editor to contain the same base address
included xparamters.h
Thank you very much in advance..
update: the xparameters.h file did not have the same base and high address as the vivado address editor. So tried with changing the 'memory region' in linker script to RAM from DDR enter image description here ,
now when observed in the 'variables' window, when clicked on 'Step Into' button, i do get the expected change in valuesenter image description here ..
The XSDB console output and Memory monitor output remain unchanged though.
The hardware platform specification file does show the custom AXI lite with the right expected base and high address.enter image description here
Hardware_platform specified
One of the reasons that were causing this problem was a different hardware platform associated with the debug configurations wrt to the one you want to use.
As we make some changes in the IPs and update them, when the bitstream is exported to SDK, a new hardware platform gets created . Say if the older one is TOP_WRAPPER_hw_platform_0, now a new one is created TOP_WRAPPER_hw_platform_1.
This new platform should be updated in the debug configuration settings Hardware platform.
further in debug config settings the following needed to be ticked on
Under Target Setup
Reset entire system
Program FPGA
Under Application tab
Download Application
Stop at 'main'
This is a LabVIEW (Software) FPGA (Hardware) question so I don't know whether I should post here or on the electronics Stack Exchange.
I have a USRP-2953R and I want to achieve a very simple project. I want to read a signal from RF0/RX1 and output it to RF1/TX1 using the FPGA (not forwarding anything to the host). The signal is centered at 5.9GHz with 10MHz of bandwidth. Is that feasible? What should my approach be?
I have tried different modifications to the "Simple NI-USRP Streaming" project that comes with LabVIEW 2013, but I haven't successfully outputted anything. I'm using LabVIEW 2013 SP1 and I am able to compile and execute code successfully on the USRP FPGA. It simply doesn't do what I want it to do.
Any help would be greatly appreciated.
The "Simple NI-USRP Streaming" project's starting FPGA code starts on the receive side with the ADCs being sampled. These values are then mixed down, and decimated before piping it to the Target-Host RX FIFO. The transmitter code starts by reading the Host-Target TX FIFO. Try replacing the RX and TX FIFOs with one Target scoped FIFO. Then as samples get placed in the FIFO they will also get pulled out for transmit (note you may need to put the TX code in a separate SCTL). Also, you may want to leave the original RX FIFO in place for debugging and just add the target scoped one in parallel.
Also, make sure the Host is setting up the USRP correctly. You will probably have to make some modifications to the TX-RX Host vi before it will configure the FPGA code (described above) to run properly. For instance, you will have to remove the target scoped FIFOs (if you removed them from the FPGA).
I'm not sure what you've already tried but hopefully this was of some help!
This query is related to configuring the Occipital Structure Sensor with the OpenNI2 SDK. The SDK has already been in use with the MS Kinect family of depth-sensing devices originating from the XBox 360 technology. The Structure Sensor is basically an overwhelmingly reduced version of MS Kinect/Carmine which is specifically built with the iPad in mind. However, the manufacturers have made it configurable with the OpenNI2 SDK as well.
I am trying to configure this device with the NiViewer provided as part of the OpenNI2 interface. Based on the quick start guide at the following link, the "UsbInterface=2" must be changed to "UsbInterface=0" in the PS1080.ini file and this step should allow the depth and IR streams of this device to work properly.
http://com.occipital.openni.s3.amazonaws.com/Structure%20Sensor%20OpenNI2%20Quick%20Start%20Guide.pdf
However, when the NIViewer is run, despite showing the device as connected, it does not stream any of the streams of this device. After a bit of trying, I found that it was possible to right-click on the NIViewer and manually enable both the (the depth and IR) streams. However, when this is done, the following error appears (for the IR stream attempt):
Failed to create IR Stream: XnOniDevice: Can't initialize stream of type 1: Failed to set USB interface!
Stream: couldn't create using source 1
Context: Couldn't create stream from device: 0237c220, source 1
Based on my own search, similar "failed to set USB interface" problems are reported for Kinect with MACOSX but the solution is not really specific to the Structure Sensor with the Windows 7 64-bit.
If you directly look into the XnOniDevice.cpp, it does show unavailability of streams being caught:
https://github.com/OpenNI/OpenNI2/blob/master/Source/Drivers/PS1080/DriverImpl/XnOniDevice.cpp
I reckon, a recompilation of source should not be necessary as this was not required for Windows-based systems. Any help in this regard would be highly appreciated. I'll report back if I found a solution to this issue.
After looking further into the editing details of the "PS1080.ini" file, I noticed that the solution to this problem was a simple one. The semicolons ';' in the INI file are basically used in commenting and that's where the mistake was. If you forget to remove the ';' before the "UsbInterface=0" command, the comment is basically ignored. Once saved, the Sensor works perfectly and both the Depth and IR feeds can be seen in the NIViewer window.
I am working on a project that uses the Spartan 6 FPGA eval kit.
The problem I am having is that when trying to change the directory on the CF card, the software can't build the working stack.
The directory is "a:\\setup" and that is being passed to the sysace_chdir(const char *path) function.
When I try to add some print code to debug the problem, none of the changes are registered.
In the SDK, I have the MicroblazeProc_hw_platform, then my project, then a standalone_bsp_0 project, which has the sysace_chdir() function in it.
When I build all the projects, the simple print statements (I use xil_printf() for output) do not display in the output.
Any help would be great.
PS - I am connected to the FPGA in the SDK using a COM port, and other print statements do get output during the initialization of the other things like the UARTs, so this is not a problem with output to the terminal or anything.
I think I figured out what the problem was.
I inserted my card into a USB card reader and formatted it using a FAT32 file system.
As for the cnages in the BSP, I was not able to figure that out, but the code is now able to change directory.
The wierd thing is that after the code is executed, if I pull out the CF card and insert it into my pc, I don't see the newly created directory. I don't know why.
I designed some logic in matlab/simulink and now I want to import microblaze there, which will handle a communication via serial port and it will also sets some parameteres inside logic through from register blocks. I created the microblaze at XPS and then export through EDK processor block and HDL netlisting to matlab/simulink. I also add shared memories at edk processor block. Everythings works fine until i tried to create a hw-cosim block. Then i got an error:
Begin generation
Checking model status
Checking simulation times
Performing compilation and generation
* ERROR *
Errors occurred during netlist generation.
Reference to non-existent field 'memmap_info'.
Any help will be highly appreciated. :)
My configuration:
Matlab 2011a
Windows 7
Ise 13.4 Design edition
Thanks,
Ondrej
You might want to check:
Upgrade your ISE version.
Verify that the generated instances have the proper names after create them.