I can't figure where my code is wrong. I'm trying to launch the "make" command on a C++-project in windows prompt (I installed mingw-get-inst-20120426 on my pc) and it gives me back always the same error:
Makefile:672: * missing separator. Stop.
This is the line 672 of my file:
&& $(MAKE) $(AM_MAKEFLAGS) DESTDIR="$$dc_destdir" uninstall \
I have check for hidden spaces in this line, but there are only tabs: I have no idea where the error is (I'm newbie to makefiles).
Can anybobody help me?
Thanks,
Stefano
You should show the rest of the rule, not just that one line. The problem is not on this line but on the lines before it. I'll make a guess and say that either (a) you've forgotten to add a backslash at the end of the previous line, or (b) you have a backslash but then you've also added some extra whitespace or whatever after the backslash; the backslash must be the last character on the line to be recognized as a continuation character.
It's possible that the variables $(MAKE) $(AM_MAKEFLAGS) include leading or trailing spaces, please post the context of this line in your Makefile, as-well as the values used for those variables.
Edit: I had intended my answer to be: the contents of $(MAKE) $(AM_MAKEFLAGS) likely include a trailing or leading space, thus causing this error.
Related
This is my makefile:
all:ll
ll:ll.c
gcc -c -Wall -Werror -02 c.c ll.c -o ll $# $<
clean :
\rm -fr ll
When I try to make clean or make make, I get this error:
:makefile:4: *** missing separator. Stop.
How can I fix it?
make defines a tab is required to start each recipe. All actions of every rule are identified by tabs. If you prefer to prefix your recipes with a character other than tab, you can set the .RECIPEPREFIX variable to an alternate character.
To check, I use the command cat -e -t -v makefile_name.
It shows the presence of tabs with ^I and line endings with $. Both are vital to ensure that dependencies end properly and tabs mark the action for the rules so that they are easily identifiable to the make utility.
Example:
Kaizen ~/so_test $ cat -e -t -v mk.t
all:ll$ ## here the $ is end of line ...
$
ll:ll.c $
^Igcc -c -Wall -Werror -02 c.c ll.c -o ll $# $<$
## the ^I above means a tab was there before the action part, so this line is ok .
$
clean :$
\rm -fr ll$
## see here there is no ^I which means , tab is not present ....
## in this case you need to open the file again and edit/ensure a tab
## starts the action part
On VS Code, just click the "Space: 4" on the downright corner and change it to tab when editing your Makefile.
By default, you should always write command after a Tab and not white space. This can be changed to another character with .RECIPEPREFIX variable.
This applies to gcc line (line #4) in your case. You need to insert tab before gcc.
Also replace \rm -fr ll with rm -fr ll. Insert tabs before this command too.
The solution for PyCharm would be to install a Makefile support plugin:
Open Preferences (cmd + ,)
Go to Plugins -> Marketplace
Search for Makefile support, install and restart the IDE.
This should fix the problem and provide a syntax for a makefile.
TLDR;
makefile syntax can be quirky
if you want a line of code to be interpreted as make code it must only be indented with spaces.
if you want a line of code to be interpreted as bash code it must only be indented with tabs
sometask:
ifeq ($FOO,bar) // this is make code. only spaces
echo "foobar" // this is bash code. only tabs
endif // again, this is make code. only spaces
technically its the leading indentation that dictates the interpreter.
Using .editorconfig to fix the tabs automagically:
root = true
[*]
charset = utf-8
end_of_line = lf
insert_final_newline = true
indent_style = space
indent_size = 4
[Makefile]
indent_style = tab
Its pretty old question but still I would like say about one more option using vi/vim editor to visualize the tabs. If you have vi/vim installed then open a Makefile (e.g. vim Makefile) and enter :set list. This will show number of tabs inserted as below,
%-linux: force$
^I#if [ "$(GCC_VERSION)" = "2.96" ] ; then \$
^I^Iecho ===== Generating build tree for legacy $# architecture =====; \$
^I^I$(CONFIGURE) $(CWD) $# legacy; \$
^Ielse \$
^I^Iecho ===== Generating build tree for $# architecture =====; \$
^I^I$(CONFIGURE) $(CWD) $#; \$
^Ifi$
^Icd build-$#;make$
You started line 4 with "space,space" instead of "tab" - nothing else.
When you created a Makefile in VSCode, You should set the Tab Size: 4.
If anyone of you are using a product from Intellij, the solution for this it's the following:
Go to Preferences > Editor > Code Style
here you need to select the file type related to your problem. But most probably you need to select Other File Types.
In the tab opened mark the checkbox for Use tab character and be careful, Tab size and Indent values must be 4.
The key point was "HARD TAB"
Check whether you used TAB instead of whitespace
Check your .vimrc for set tabstop=X
If you are using mcedit for makefile edit. you have to see the following mark.
This is because tab is replaced by spaces.
To disable this feature go to
gedit->edit->preferences->editor
and remove check for
"replace tab with space"
If you are here searching how to make the tabs and new lines you added understandable by vim you have to first enable tab in vim.
You can do it using :set noet i.e. (to switch from spaces to TAB) before you make your tab additions.
With this command your tabs will look like the other ones (i.e. ^I) and *** missing separator. Stop. error from make will go away :)
after you make changes you can switch back with :set et
Do yourself a favour and make this a permanent member of your .editorconfig, if your editor/IDE supports it (it probably does!)
[Makefile]
indent_style = tab
If you are editing your Makefile in eclipse:
Windows-> Preferences->General->Editor->Text Editors->Show Whitespace Characters -> Apply
Or use the shortcut shown below.
Tab will be represented by gray ">>" and Space will be represented by gray "." as in figure below.
If someone ever comes across this issue with
*** missing separator. Stop.
during the build, they should double-check their file system path to the sources, it should not contain special characters like "#"
e.g. path
/home/user/#my_sources/
might be invalid
My main Makefile call config.mk
include $(TOPDIR)/config.mk
then config.mk include some sentences like this:
ifdef CPU
sinclude $(TOPDIR)/cpu/$(CPU)/config.mk
endif
ifdef SOC
sinclude $(TOPDIR)/cpu/$(CPU)/$(SOC)/config.mk
endif
I have prepared these two tree and necessary config.mks. But for "SOC", whose value is "versatile", there is a problem. If I put "versatile" directly here, it could find the file and everything is fine; but when I use $(SOC), il will meet an error, and say
/../../../cpu/arm926ejs/versatile: is a folder, stop
Anyone know what the problem is ??
Are you sure you gave the exact error message? What version of make are you using? That error doesn't look like anything GNU make would print.
Anyway, I'll bet the problem is that your assignment of the SOC variable has trailing whitespace. According to the POSIX definition of make, leading whitespace before a variable value is removed, but trailing whitespace is preserved. That means, for example, if you write your makefile like this:
SOC = versatile # this is the versatile SOC
then make will remove the comment, but keep the space, so the value will be 'versatile' (space at the end). This means when the value is expanded in the sinclude line you get:
sinclude $(TOPDIR)/cpu/$(CPU)/versatile /config.mk
which make interprets as trying to include two different values, the first of which is a directory.
Even if you don't have a comment there, any trailing whitespace will be preserved. When editing makefiles you should try to put your editor into a mode where it flags trailing whitespace, or even better removes it automatically. GNU Emacs, for example, can do this.
I saw the following in a code once in a Makefile. What is the colon in the middle means?
export LD_LIBRARY_PATH=/e3rd/lib:/3rd/im/lib
It doesn't look like the same as the colon from Colon and $ in makefile.
It be nice too if you can tell me what is the potential use of it as well.
That's just a separator for paths. It's a syntax for separating paths in LD_LIBRARY_PATH. Nothing to do with makefile.
In my makefile, I would like to check for the existence of a library and give an informative error message. I created a conditional that should exit the make process when the file is not found:
9: ifeq ($(${JSONLIBPATH}),)
10: JSONLIBPATH = ${ALTJSONLIBDIR}/${LIBJSON}
11: endif
12: ifeq ($(${JSONLIBPATH}),)
13: $(error JSON library is not found. Please install libjson before building)
14: endif
My makefile gets stuck on line 13:
Makefile:13: *** commands commence before first target. Stop.
After line 13, my makefile has its targets.
I tried putting this conditional block into a target (e.g. a target called isJSONLibraryInstalled) but this does not execute correctly.
How would I check for a file's existence and handle the error case, before processing targets? Apologies if this is a dumb question.
First of all, you are looking at the contents of a variable that is named after the current path, which is probably not what you want. A simple environment variable reference is $(name) or ${name}, not $(${name}). Due to this, line 13 is always evaluated.
Second, I think it is choking on the indentation of the $(error ...) expression. While the expression resolves to an empty string, there is still a tab character at the start of the line, which indicates a command, which in turn cannot exist outside a rule.
I think using spaces rather than tabs to indent would work.
When you get Make error messages, always check the Error message documentation
On GNU Make 3.81 (error appears to have been removed from newer versions), it says:
This means the first thing in the makefile seems to be part of a command script: it begins with a TAB character and doesn't appear to be a legal make command (such as a variable assignment). Command scripts must always be associated with a target.
What makes matters more confusing is that "doesn't appear to be a legal make command" part. That explains why in:
a := b
$(error a)
the error happens at line 2 and not 1: make simply accepts statements that it can parse, like the assignment, so the following works:
a := b
a:
echo $a
Note: SO currently converts tabs to spaces in code, so you can't just copy the above code into your editor.
For me it was an unnecessary white space before the connector that was causing this.
On slickEdit I selected the option to view all special character and noticed the black sheep.
You can check whitespaces, spaces and tabs by using VSCode [View > Render Whitespace]
As you can see;
command-1 has a tab (->) and whitespace at the end
command-2 has space at first
command-3/4 has tab+spaces
So, you should remove the whitespaces at the end and apply the same spaces with the same action. e.g: tab like the following;
I want to backtrace the makefile for firefox so that I can get the final gcc command that is used to compile the c++ files. How can I do that?
If you find a line in there that begins with "# $(CXX)" or "# g++", then change the line to "$(CXX)" or "g++" -- in other words, delete the "#" symbol from the line. When an "#" symbol appears at the beginning of a command in a Makefile, it causes Make to not echo the command before executing it. Deleting the "#" symbol will cause the expanded form of the line to be echoed before the command is invoked.
I haven't looked at Firefox's makefile, so it is more than possible that they are using predefined pattern rules for building the code, in which case you won't see any lines beginning with "$(CXX)" . If that is the case, you will need to override the rules, so that the default build rules echo the commands before executing them.
For more information on overriding Makefile pattern build rules, see this link:
http://www.gnu.org/software/make/manual/make.html#Pattern-Rules
The usual stunt for this is to replace gcc with a program that reads the gcc command line,
store it in some log file so it can be inspected, and then launches gcc with the command line. You can do this by replacing "gcc.exe" in your development directories by this stepping stone program.
Here's the make rule that compiles C++ files:
http://hg.mozilla.org/mozilla-central/annotate/c1ab8650e0ce/config/rules.mk#l1391
If all you want to do is replace the compiler, you can (in your mozconfig, or on the configure commandline) set CXX="whatever".
Can you redirect the output of make to a file, then use a text editor to search for the line of interest?