I am building a CPU circuit with Logisim. My CPU has only 2 general purpose registers and a 16-byte RAM. I have encoded the following instruction set (Rxy means one of the two registers)
• ADD Rxy, Rxy (add Rxy and Rxy and store result inside the first register)
• SUB Rxy, Rxy (same but with sub)
• ST Rxy, Address (save value of Rxy into RAM address)
• LD Rxy, Address (load into Rxy value at RAM address)
• BZ Rxy, Address (branch to address if value of Rxy is zero)
I thought I could use decrement the second addend until it reaches 0 and at each step, add the first addend to itself.
For example, 5*3 = 5+5+5 ; 3-1-1-1
But I'm not sure my instruction can permit this program... I only have a branch if Rxy is equal to 0, whereas I would like to branch if not equal to 0.
My program currently looks like this :
Assume R1 is preloaded with second addends (iteration left count)
(A) LD R0, Address # constant 1
SUB R1, R0 # decrement iteration left
ST R1, Address # save iteration count in memory
LD R0, Address # Load first addend
LD R1, Address # load current total
ADD R0, R1 # do addition
ST R0, Address # save new current total
BZ R1, (B) # if iteration is 0, then display and end, else add
(B)
STOP
Is there a way to loop with my instruction set?
You can change
BZ R1, (B)
(B)
to
BZ R1, (B)
LD R0, Address # constant 1
SUB R0, R0
BZ R0, (A)
(B)
Related
How do I modify this LC-3 code to make it count the number of 0s instead of ones
.ORIG x3000
LD R2, INPUT
AND R0, R0, #0 ; COUNTER INITIALIZED TO ZERO
ADD R1, R0, #1
ADD R3, R0, #15
LOOP
AND R4, R2, R1
BRz SKIP
ADD R0, R0, #1
SKIP
ADD R1, R1, R1
ADD R3, R3, #-1
BRzp LOOP
INPUT .FILL x1997
.END
Have you watched how it works in the debugger? Single step this small program, and you'll see how it works.
Can you find the if-then construct in here? An if-then construct has the form if-condition-then-action. So, you're looking for something that has this effect:
if ( bit is set )
R0++;
And you want to change it to the opposite condition, so it counts zeros instead.
if ( bit is clear )
R0++;
Where bit is clear is the same as ! (bit is set), i.e. it is the opposite.
Note that the above is in terms of structured language like C. In assembly, if-condition-then-action looks more like this:
if ( condition is false ) goto Label1; // action is skipped if condition is false
..action.. // action runs if condition is true
Label1:
This is because the only control structure in assembly/machine code is conditional branch, which in C looks like if ( condition ) goto label;
If, i suppose, your program is OK (i don't try it) a quick modification is to flip all 0 to 1 and 1 to 0.
NOT do the job!
I leave you the exercise.
Another way, is that if you count n bit1 this mean that you have 16-n bit0...
Again NOT is your friend to compute 16-n
Note that both leave the code intact which can be used as a subroutine.
Don't forget to use HALT to stop the program
I have a simple loop that takes a name and prints the name without saving it.
looptext getc ;starts text get loop for name
;since name isn't re-used, we don't have to save it
add r1, r0, -10 ;Test for enter character
brz finishloop1 ;if enter, cancel the text loop
OUT ;If it's not enter, print out the character typed
br looptext ;Go back to loop
finishloop1
The program then asks for an ID number separated by spaces. All these values are saved into an array and each loop, it checks if the new input is the 'new' lowest value or 'new' highest value and sets it into the respectable register.
[Deleted code for copyright sake]
At the end of the code, where I need to add a sorting algorithm, I am left with an array of only characters.
I need to go through each index of the array and rearrange the characters in the numerical order (smallest to largest).
Thank you very much all of you for the tips and tricks. Thank you specifically #Ped7g for linking me that sorting algorithms page. I ended up searching around and actually finding someone on gitub that had a bubble algorithm already written out in Assembly code. So thanks for indirectly giving me the answer.
Note: For any future people coming here to find answer, here is the link the bubble sorting algorithm code:
https://github.com/oc-cs360/s2014/blob/master/lc3/bubblesort.asm. This is part of the lecture notes for a university course.
; Implementing bubble sort algorithm
; R0 File item
; R1 File item
; R2 Work variable
; R3 File pointer
; R4 Outer loop counter
; R5 Inner loop counter
.ORIG x3000
; Count the number of items to be sorted and store the value in R7
AND R2, R2, #0 ; Initialize R2 <- 0 (counter)
LD R3, FILE ; Put file pointer into R3
COUNT LDR R0, R3, #0 ; Put next file item into R0
BRZ END_COUNT ; Loop until file item is 0
ADD R3, R3, #1 ; Increment file pointer
ADD R2, R2, #1 ; Increment counter
BRNZP COUNT ; Counter loop
END_COUNT ADD R4, R2, #0 ; Store total items in R4 (outer loop count)
BRZ SORTED ; Empty file
; Do the bubble sort
OUTERLOOP ADD R4, R4, #-1 ; loop n - 1 times
BRNZ SORTED ; Looping complete, exit
ADD R5, R4, #0 ; Initialize inner loop counter to outer
LD R3, FILE ; Set file pointer to beginning of file
INNERLOOP LDR R0, R3, #0 ; Get item at file pointer
LDR R1, R3, #1 ; Get next item
NOT R2, R1 ; Negate ...
ADD R2, R2, #1 ; ... next item
ADD R2, R0, R2 ; swap = item - next item
BRNZ SWAPPED ; Don't swap if in order (item <= next item)
STR R1, R3, #0 ; Perform ...
STR R0, R3, #1 ; ... swap
SWAPPED ADD R3, R3, #1 ; Increment file pointer
ADD R5, R5, #-1 ; Decrement inner loop counter
BRP INNERLOOP ; End of inner loop
BRNZP OUTERLOOP ; End of outer loop
SORTED HALT
FILE .FILL x3500 ; File location
.END
I'm using C11* atomics to manage a state enum between a few threads. The code resembles the following:
static _Atomic State state;
void setToFoo(void)
{
atomic_store_explicit(&state, STATE_FOO, memory_order_release);
}
bool stateIsBar(void)
{
return atomic_load_explicit(&state, memory_order_acquire) == STATE_BAR;
}
This assembles (for an ARM Cortex-M4) to:
<setToFoo>:
ldr r3, [pc, #8]
dmb sy ; Memory barrier
movs r2, #0
strb r2, [r3, #0] ; store STATE_FOO
bx lr
.word 0x00000000
<stateIsBar>:
ldr r3, [pc, #16]
ldrb r0, [r3, #0] ; load state
dmb sy ; Memory barrier
sub.w r0, r0, #2 ; Comparison and return follows
clz r0, r0
lsrs r0, r0, #5
bx lr
.word 0x00000000
Why are the fences placed before the release and after the acquire? My mental model assumed that a barrier would be placed after after a release (to "propagate" the variable being stored and all other stores to other threads) and before an acquire (to receive all previous stores from other threads).
*While this particular example is given in C11, the situation is identical in C++11, as the two share the same concepts (and even the same enums) when it comes to memory ordering. gcc and g++ emit the same machine code in this situation. See http://en.cppreference.com/w/c/atomic/memory_order and http://en.cppreference.com/w/cpp/atomic/memory_order
The memory fence before the store is to guarantee that the store isn't ordered before any prior stores. Similarly, the memory fence after the read guarantees that the read isn't ordered after any following reads. When you combine the two, it creates a synchronizes-with relation between the writes and reads.
T1: on-deps(A) -> fence -> write(A)
T2: read(A) -> fence -> deps-on(A)
read(A) happens before deps-on(A)
write(A) happens after on-deps(A)
If you change the order of either fence, the sequence of dependencies is broken which obviously will cause inconsistent results (e.g. race conditions).
Some more possible reading...
Acquire and Release Fences
Memory Barriers: a Hardware View for Software Hackers
I am having a difficult time understanding this particular problem. I have the answers, but I really want to know the reason as to why they are what they are! I understand how each opcode works, just not in applying it to this problem.....
An engineer is in the process of debugging a program she has written. She is looking at the following segment of the program, and decides to place a breakpoint in memory at location 0xA404. Starting with the PC = 0xA400, she initializes all the registers to zero and runs the program until the breakpoint is encountered.
Code Segment:
0xA400 THIS1 LEA R0, THIS1
0xA401 THIS2 LD R1, THIS2
0xA402 THIS3 LDI R2, THIS5
0xA403 THIS4 LDR R3, R0, #2
0xA404 THIS5 .FILL xA400
Show the contents of the register file (in hexadecimal) when the breakpoint is encountered.
Again, I'm not seeking a list of answers, but an explanation to help me understand what exactly is going on in the program. Thanks so much!
If the engineer put the breakpoint on line 0xa404 (stopping the program before 0xa404 is run), the code would do the following:
0xA400 THIS1 LEA R0, THIS1 ; LEA loads the address of THIS1 into R0.
; Since THIS1 is at memory location 0xA400,
; after this instruction R0 = 0xA400
0xA401 THIS2 LD R1, THIS2 ; LD loads the contents of the memory at
; THIS2 into R1. Since THIS2 is this very
; line its contents are this instruction,
; which is 0010001111111111 in binary or
; 0x23ff in hex, so after this line executes
; R1 hold 0x23ff
0xA402 THIS3 LDI R2, THIS5 ; LDI visits THIS5 and treats its value as a
; new memory location to visit. It visits
; that second location and stores its
; contents into R2. In this case, it would
; look at THIS5 and see its value is 0xA400.
; It would then visit 0xA400 and store its
; contents in R2. 0xA400 contains the first
; line of your program which translates to
; 1110000111111111 in binary, 0xe1ff in
; hex, so it stores 0xe1ff into R2.
0xA403 THIS4 LDR R3, R0, #2 ; LDR starts from the memory location of R0,
; adds 2 to that, then stores whatever it
; finds in that memory location into R3. In
; this case R0 = 0xA400. It adds 2, bringing
; it up to 0xA402, which is the instruction
; immediately above this one. In binary, that
; instruction is 1010 0100 0000 0001, which
; translates into 0xa401 so the program stores
; the program stores 0xa401 into R3.
0xA404 THIS5 .FILL xA400
I'm beginning in ARM assembly and I've been trying to write a simple integer division subroutine. So far, I have the following:
.text
start:
mov r0, #25
mov r1, #5
bl divide
b stop
divide:
cmp r0, r1
it lo
mov pc, lr
sub r0, r0, r1
add r2, r2, #1
b divide
stop:
b stop
I wrote it based on the pseudocode I came up with for the algorithm:
Is the Divisor (bottom) larger than the Dividend (top)?
Yes:
-Return the remainder and the counter(quotient)
No:
-Subtract the Divisor from the Dividend
-Increment the counter by 1
-Repeat the method
r0 contains the numerator and r1 contains the denominator.
When the algorithm finishes, r0 should contain the remainder and r2 should contain the quotient. However, upon running, r0 contains 19 and r2 contains 0.
Are there any fallacies in my logic that I'm just missing?
I removed it lo and changed mov to movlo and it worked fine.