I am adapting my site to RTL languages. And I am not sure if I should use
.rtl p{
direction: rtl;
unicode-bidi: bidi-override;
}
//or
.rtl2 p{
direction: rtl;
unicode-bidi:embed;
}
http://jsfiddle.net/f9hf7/3/
but as suggested here
http://css-tricks.com/almanac/properties/u/unicode-bidi/
and few other sites we should use
direction: rtl;
unicode-bidi:embed;
By looking at the test this just aligns it to the right .
I might be wrong here since since I dont understand the language used in the demo
But in both cases class .rtl and .rtl2 chars are in the same place.
Can someone who actually speaks any of the RTL languages enlighten me here please and advise what is the right way.
Thank you!
Related
I was reading someone's code and found out that he wrote the code (below following).
for example:
operandA = -operandA;
That works but I don't understand how this operator is working. Can anyone give any similar idea please?
In the program's logic, the given statement changes the movement of X (operandA) to reverse direction when it hits something.
I believe it is just setting operandA to the negative of operandA
Can I call functions like:
label1: component_name PORT MAP (x AND y, b SSL 3, output);
In VHDL?
I searched a lot until I decided to post here, and also read the VHDL manual, but it doesn't say you can't. Although it doesn't show it's possible either.
I'm on macOS right now, so I can't test it.
EDIT: I'm using Altera Quartus 16.0
Thanks in advance!
It will depend a lot on the compiler unfortunately.
As a relevent aside, expressions such as
x and y
are treated differently from function calls
and_fn(x,y)
I have successfully used code with fully qualified associations, and function calls rather than expressions, such as:
label1: component_name
port map(
a => and_fn(x,y),
b => myfunc(),
c => output
);
The definitive document is the Language Reference Manual, but the point is moot - try it in your toolset, support and compliance varies.
In the Hack language type system, is there a "top" type, also known as an "any" type, or a universal "Object" type? That is, a type which all types are subclasses of?
The manual mentions "mixed" types, which might be similar, but are not really explained. There is also the possibility of simply omitting the type declaration in some places. However, this cannot be done everywhere, e.g. if I want to declare something to be a function from string to the top type, it's not clear how I do this. function (string): mixed?
I'm an engineer working on Hack at Facebook. This is a really insightful and interesting question. Depending on what exactly you're getting at, Hack has a couple different variations of this.
First, let's talk about mixed. It's the supertype of everything. For example, this typechecks:
<?hh // strict
function f(): mixed {
return 42;
}
But since it's the supertype of everything, you can't do much with a mixed value until you case analyze on what it actually is, via is_int, instanceof, etc. Here's an example of how you'd have to use the result of f():
<?hh // strict
function g(): int {
$x = f();
if (is_int($x)) {
return $x;
} else {
return 0;
}
}
The "missing annotation" type ("any") is somewhat different than this. Whereas mixed is the supertype of everything, "any" unifies with everything -- it's both the supertype and subtype of everything. This means that if you leave off an annotation, we'll assume you know what you're doing and just let it pass. For example, the following code typechecks as written:
<?hh
// No "strict" since we are omitting annotations
function f2() {
return 42;
}
function g2(): string {
return f2();
}
This clearly isn't sound -- we just broke the type system and will cause a runtime type error if we execute the above code -- but it's admitted in partial mode in order to ease conversion. Strict requires that you annotate everything, and so you can't get a value of type "any" in order to break the type system in this way if all of your code is in strict. Consider how you'd have to annotate the code above in strict mode: either f2 would have to return int and that would be a straight-up type error ("string is not compatible with int"), or f2 would have to return mixed and that would be a type error as written ("string is not compatible with mixed") until you did a case analysis with is_int etc as I did in my earlier example.
Hope this clears things up -- if you want clarification let me know in the comments and I'll edit. And if you have other questions that aren't strict clarifications of this, continue tagging them "hacklang" and we'll make sure they get responded to!
Finally: if you wouldn't mind, could you press the "file a documentation bug" on the docs pages that were confusing or unclear, or could in any way be improved? We ideally want docs.hhvm.com to be a one-stop place for stuff like this, but there are definitely holes in the docs that we're hoping smart, enthusiastic folks like yourself will help point out. (i.e., I thought this stuff was explained well in the docs, but since you are confused that is clearly not the case, and we'd really appreciate a bug report detailing where you got lost.)
For C#, JetBrains ReSharper often suggests that you invert your if statements to reduce the number of nested if-statements.
For example, it suggests that the code below:
private void Foo()
{
if (someCondition)
{
// Some action
}
}
could be converted to:
private void Foo()
{
if (!someCondition) return;
// Some action
}
Is there a similar way to do this with VHDL code? Even if it is possible, is there a good reason to avoid this coding style in VHDL?
I am wondering if it possible to achieve something like this in VHDL
process(clock)
begin
if (rising_edge(clock)) then
-- Some action
end if;
end process;
becomes
process(clock)
begin
if (not rising_edge(clock)) then
return;
end if;
-- Some action
end process;
Naturally there is no early return from a VHDL process because you don't return from a process...
In addition to early return from a subprogram (procedure or function) there are similar approaches to help structure loops : exit (terminating the loop) and next (terminating the current iteration).
These can be embedded in if statements as in your example but there's a more convenient and readable form :
loop
...
exit when A = '1';
...
next when B = '1';
...
end loop;
Don't.
not rising_edge(clock) is not guaranteed to be synthesizable by the IEEE standard for synthesizable logic. If you know of any tools that do synthesize this, I would be interested to know.
Also, you won't gain anything because (as stated by other repliers) the return statement is not valid in a process.
Try it: Even though this particular style won't work, it was a fair suggestion.
If you want to learn about out non-traditional ways of writing code the best way is to write it, simulate it and synthesize it. By experimenting, you will learn a lot and end up to be the smartest designer on your team.
The strategy you suggest is called early return because you are returning from a function early,
before reaching its end. It can be done in VHDL and it is as useful as in other languages, but the downside is that it can only be used in subprograms. You cannot "return" from a process.
In theory, you could move the code from inside your process to a procedure, but it would not help achieve what you want. I suggest that you read section 6.3 - Concurrent Procedure Call Statements
from Ashenden's Designer's Guide to VHDL to understand the details. In short, there are many restrictions to how the wait statement can be used in a procedure.
What's the point? (Does Resharper describe why you want to do this?)
My thoughts on doing this in VHDL-land:
In synthesisable code, it is very likely that - whatever shenanigans you pull to "optimise" your logic - if it turns out to be the same function, the synthesiser will (almost) always (in my experience) find the logic equivalency that mean it ends up with the same optimal logic for the same function as when you write it the straightforward way. (Counter-examples welcome!)
In tetsbench code, I guess you might be able to same some cycles?
From a code-readability perspective: there might be a gain, but if you have that many nested ifs maybe your overall structure needs a re-think...
I've seen all of these:
is_valid
is_valid?
valid?
Is there a preferred one?
EDIT: More conditionals:
has_comment has_comment? comment?
was_full was_full? full?
Please do add more descriptive examples.
I think the convention is mostly to add a '?' at the end of the method instead of 'is'
valid?
In favor of trying the code to be 'natural language' like, is_valid? should be most suitable for me. Lets show an example:
if #order.is_valid?
#order.save
end