Linux on Microblaze bigendian stop loading kernel virtual memory nexys2 - linux-kernel
I'm trying to embed a light version of linux on microblaze bigendian on nexys2 board.
Memory: micronRam 16MB.
I compile the image with buildroot 2014.05
I'm loading the image with XMD after loading on the board the standard prog. test memory
Running the image with con 0x85000000 stop at Kernel virtual memory, below what I get:
Early console on uartlite at 0x84000000
bootconsole [earlyser0] enabled
Ramdisk addr 0x00000000,
Compiled-in FDT at c027cc88
Linux version 3.14.4 (gmv#gmv-Inspiron-N5050) (gcc version 4.9.0 (Buildroot 2014 .05) ) #2 Tue Aug 26 22:20:19 WEST 2014
setup_cpuinfo: initialising
setup_cpuinfo: No PVR support. Using static CPU info from FDT
wt_msr_noirq
setup_memory: max_mapnr: 0x1000
setup_memory: min_low_pfn: 0x85000
setup_memory: max_low_pfn: 0x86000
setup_memory: max_pfn: 0x86000
Zone ranges:
DMA [mem 0x85000000-0x85ffffff]
Normal empty
Movable zone start for each node
Early memory node ranges
node 0: [mem 0x85000000-0x85ffffff]
On node 0 totalpages: 4096
free_area_init_node: node 0, pgdat c0349df8, node_mem_map c0557000
DMA zone: 32 pages used for memmap
DMA zone: 0 pages reserved
DMA zone: 4096 pages, LIFO batch:0
early_printk_console remapping from 0x84000000 to 0xffffd000
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping off. Total pages: 4064
Kernel command line: console=ttyUL0,115200
PID hash table entries: 64 (order: -4, 256 bytes)
Dentry cache hash table entries: 2048 (order: 1, 8192 bytes)
Inode-cache hash table entries: 1024 (order: 0, 4096 bytes)
Memory: 10712K/16384K available (2547K kernel code, 106K rwdata, 676K rodata, 18
97K init, 186K bss, 5672K reserved)
Kernel virtual memory layout:
* 0xffffe000..0xfffff000 : fixmap
* 0xffffd000..0xffffe000 : early ioremap
* 0xf0000000..0xffffd000 : vmalloc & ioremap
my dts file is
/*
* Device Tree Generator version: 1.1
*
* (C) Copyright 2007-2013 Xilinx, Inc.
* (C) Copyright 2007-2013 Michal Simek
* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
*
* Michal SIMEK <monstr#monstr.eu>
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 14.7 EDK_P.20131013
* Today is: Tuesday, the 26 of August, 2014; 18:57:24
*
* XPS project directory: device-tree_bsp_0
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,microblaze";
model = "Xilinx MicroBlaze";
aliases {
serial0 = &xps_uartlite_0;
} ;
chosen {
bootargs = "console=ttyUL0";
linux,stdout-path = "/plb#0/serial#84000000";
} ;
cpus {
#address-cells = <1>;
#cpus = <0x1>;
#size-cells = <0>;
microblaze_0: cpu#0 {
bus-handle = <&mb_plb>;
clock-frequency = <50000000>;
compatible = "xlnx,microblaze-8.50.c";
d-cache-baseaddr = <0x85000000>;
d-cache-highaddr = <0x85ffffff>;
d-cache-line-size = <0x10>;
d-cache-size = <0x2000>;
device_type = "cpu";
i-cache-baseaddr = <0x85000000>;
i-cache-highaddr = <0x85ffffff>;
i-cache-line-size = <0x10>;
i-cache-size = <0x2000>;
interrupt-handle = <&xps_intc_0>;
model = "microblaze,8.50.c";
reg = <0>;
timebase-frequency = <50000000>;
xlnx,addr-tag-bits = <0xb>;
xlnx,allow-dcache-wr = <0x1>;
xlnx,allow-icache-wr = <0x1>;
xlnx,area-optimized = <0x0>;
xlnx,avoid-primitives = <0x0>;
xlnx,base-vectors = <0x0>;
xlnx,branch-target-cache-size = <0x0>;
xlnx,cache-byte-size = <0x2000>;
xlnx,d-axi = <0x0>;
xlnx,d-lmb = <0x1>;
xlnx,d-plb = <0x1>;
xlnx,data-size = <0x20>;
xlnx,dcache-addr-tag = <0xb>;
xlnx,dcache-always-used = <0x1>;
xlnx,dcache-byte-size = <0x2000>;
xlnx,dcache-data-width = <0x0>;
xlnx,dcache-force-tag-lutram = <0x0>;
xlnx,dcache-interface = <0x0>;
xlnx,dcache-line-len = <0x4>;
xlnx,dcache-use-fsl = <0x1>;
xlnx,dcache-use-writeback = <0x0>;
xlnx,dcache-victims = <0x0>;
xlnx,debug-enabled = <0x1>;
xlnx,div-zero-exception = <0x1>;
xlnx,dynamic-bus-sizing = <0x1>;
xlnx,ecc-use-ce-exception = <0x0>;
xlnx,edge-is-positive = <0x1>;
xlnx,endianness = <0x0>;
xlnx,fault-tolerant = <0x0>;
xlnx,fpu-exception = <0x0>;
xlnx,freq = <0x2faf080>;
xlnx,fsl-data-size = <0x20>;
xlnx,fsl-exception = <0x0>;
xlnx,fsl-links = <0x0>;
xlnx,i-axi = <0x0>;
xlnx,i-lmb = <0x1>;
xlnx,i-plb = <0x1>;
xlnx,icache-always-used = <0x1>;
xlnx,icache-data-width = <0x0>;
xlnx,icache-force-tag-lutram = <0x0>;
xlnx,icache-interface = <0x0>;
xlnx,icache-line-len = <0x4>;
xlnx,icache-streams = <0x1>;
xlnx,icache-use-fsl = <0x1>;
xlnx,icache-victims = <0x8>;
xlnx,ill-opcode-exception = <0x1>;
xlnx,instance = "microblaze_0";
xlnx,interconnect = <0x1>;
xlnx,interrupt-is-edge = <0x0>;
xlnx,lockstep-slave = <0x0>;
xlnx,mmu-dtlb-size = <0x4>;
xlnx,mmu-itlb-size = <0x2>;
xlnx,mmu-privileged-instr = <0x0>;
xlnx,mmu-tlb-access = <0x3>;
xlnx,mmu-zones = <0x2>;
xlnx,number-of-pc-brk = <0x1>;
xlnx,number-of-rd-addr-brk = <0x0>;
xlnx,number-of-wr-addr-brk = <0x0>;
xlnx,opcode-0x0-illegal = <0x1>;
xlnx,optimization = <0x0>;
xlnx,pc-width = <0x20>;
xlnx,pvr = <0x0>;
xlnx,pvr-user1 = <0x0>;
xlnx,pvr-user2 = <0x0>;
xlnx,reset-msr = <0x0>;
xlnx,sco = <0x0>;
xlnx,stream-interconnect = <0x0>;
xlnx,unaligned-exceptions = <0x1>;
xlnx,use-barrel = <0x1>;
xlnx,use-branch-target-cache = <0x0>;
xlnx,use-dcache = <0x1>;
xlnx,use-div = <0x1>;
xlnx,use-ext-brk = <0x1>;
xlnx,use-ext-nm-brk = <0x1>;
xlnx,use-extended-fsl-instr = <0x0>;
xlnx,use-fpu = <0x0>;
xlnx,use-hw-mul = <0x1>;
xlnx,use-icache = <0x1>;
xlnx,use-interrupt = <0x1>;
xlnx,use-mmu = <0x3>;
xlnx,use-msr-instr = <0x1>;
xlnx,use-pcmp-instr = <0x1>;
xlnx,use-reorder-instr = <0x1>;
xlnx,use-stack-protection = <0x0>;
} ;
} ;
micron_ram: memory#85000000 {
device_type = "memory";
reg = <0x85000000 0x1000000>;
} ;
mb_plb: plb#0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,plb-v46-1.05.a", "xlnx,plb-v46-1.00.a", "simple-bus";
ranges ;
mdm_0: serial#84400000 {
compatible = "xlnx,mdm-2.10.a", "xlnx,xps-uartlite-1.00.a";
reg = <0x84400000 0x10000>;
xlnx,interconnect = <0x1>;
xlnx,jtag-chain = <0x2>;
xlnx,mb-dbg-ports = <0x1>;
xlnx,use-bscan = <0x0>;
xlnx,use-uart = <0x1>;
} ;
flash#85000000 {
bank-width = <2>;
compatible = "xlnx,xps-mch-emc-3.01.a", "cfi-flash";
reg = <0x85000000 0x1000000>;
xlnx,include-datawidth-matching-0 = <0x1>;
xlnx,include-datawidth-matching-1 = <0x0>;
xlnx,include-datawidth-matching-2 = <0x0>;
xlnx,include-datawidth-matching-3 = <0x0>;
xlnx,include-negedge-ioregs = <0x0>;
xlnx,include-plb-ipif = <0x1>;
xlnx,include-wrbuf = <0x1>;
xlnx,max-mem-width = <0x10>;
xlnx,mch-native-dwidth = <0x20>;
xlnx,mch-splb-awidth = <0x20>;
xlnx,mch-splb-clk-period-ps = <0x4e20>;
xlnx,mch0-accessbuf-depth = <0x10>;
xlnx,mch0-protocol = <0x0>;
xlnx,mch0-rddatabuf-depth = <0x10>;
xlnx,mch1-accessbuf-depth = <0x10>;
xlnx,mch1-protocol = <0x0>;
xlnx,mch1-rddatabuf-depth = <0x10>;
xlnx,mch2-accessbuf-depth = <0x10>;
xlnx,mch2-protocol = <0x0>;
xlnx,mch2-rddatabuf-depth = <0x10>;
xlnx,mch3-accessbuf-depth = <0x10>;
xlnx,mch3-protocol = <0x0>;
xlnx,mch3-rddatabuf-depth = <0x10>;
xlnx,mem0-width = <0x10>;
xlnx,mem1-width = <0x20>;
xlnx,mem2-width = <0x20>;
xlnx,mem3-width = <0x20>;
xlnx,num-banks-mem = <0x1>;
xlnx,num-channels = <0x2>;
xlnx,pagemode-flash-0 = <0x0>;
xlnx,pagemode-flash-1 = <0x0>;
xlnx,pagemode-flash-2 = <0x0>;
xlnx,pagemode-flash-3 = <0x0>;
xlnx,priority-mode = <0x0>;
xlnx,synch-mem-0 = <0x0>;
xlnx,synch-mem-1 = <0x0>;
xlnx,synch-mem-2 = <0x0>;
xlnx,synch-mem-3 = <0x0>;
xlnx,synch-pipedelay-0 = <0x2>;
xlnx,synch-pipedelay-1 = <0x2>;
xlnx,synch-pipedelay-2 = <0x2>;
xlnx,synch-pipedelay-3 = <0x2>;
xlnx,tavdv-ps-mem-0 = <0x14c08>;
xlnx,tavdv-ps-mem-1 = <0x3a98>;
xlnx,tavdv-ps-mem-2 = <0x3a98>;
xlnx,tavdv-ps-mem-3 = <0x3a98>;
xlnx,tcedv-ps-mem-0 = <0x14c08>;
xlnx,tcedv-ps-mem-1 = <0x3a98>;
xlnx,tcedv-ps-mem-2 = <0x3a98>;
xlnx,tcedv-ps-mem-3 = <0x3a98>;
xlnx,thzce-ps-mem-0 = <0x1f40>;
xlnx,thzce-ps-mem-1 = <0x1b58>;
xlnx,thzce-ps-mem-2 = <0x1b58>;
xlnx,thzce-ps-mem-3 = <0x1b58>;
xlnx,thzoe-ps-mem-0 = <0x1f40>;
xlnx,thzoe-ps-mem-1 = <0x1b58>;
xlnx,thzoe-ps-mem-2 = <0x1b58>;
xlnx,thzoe-ps-mem-3 = <0x1b58>;
xlnx,tlzwe-ps-mem-0 = <0x1388>;
xlnx,tlzwe-ps-mem-1 = <0x0>;
xlnx,tlzwe-ps-mem-2 = <0x0>;
xlnx,tlzwe-ps-mem-3 = <0x0>;
xlnx,tpacc-ps-flash-0 = <0x61a8>;
xlnx,tpacc-ps-flash-1 = <0x61a8>;
xlnx,tpacc-ps-flash-2 = <0x61a8>;
xlnx,tpacc-ps-flash-3 = <0x61a8>;
xlnx,twc-ps-mem-0 = <0x14c08>;
xlnx,twc-ps-mem-1 = <0x3a98>;
xlnx,twc-ps-mem-2 = <0x3a98>;
xlnx,twc-ps-mem-3 = <0x3a98>;
xlnx,twp-ps-mem-0 = <0xd6d8>;
xlnx,twp-ps-mem-1 = <0x2ee0>;
xlnx,twp-ps-mem-2 = <0x2ee0>;
xlnx,twp-ps-mem-3 = <0x2ee0>;
xlnx,xcl0-linesize = <0x4>;
xlnx,xcl0-writexfer = <0x1>;
xlnx,xcl1-linesize = <0x4>;
xlnx,xcl1-writexfer = <0x1>;
xlnx,xcl2-linesize = <0x4>;
xlnx,xcl2-writexfer = <0x1>;
xlnx,xcl3-linesize = <0x4>;
xlnx,xcl3-writexfer = <0x1>;
} ;
xps_intc_0: interrupt-controller#81800000 {
#interrupt-cells = <0x2>;
compatible = "xlnx,xps-intc-2.01.a", "xlnx,xps-intc-1.00.a";
interrupt-controller ;
reg = <0x81800000 0x10000>;
xlnx,kind-of-intr = <0x3>;
xlnx,num-intr-inputs = <0x2>;
} ;
xps_timer_0: timer#83c00000 {
compatible = "xlnx,xps-timer-1.02.a", "xlnx,xps-timer-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = <1 0>;
reg = <0x83c00000 0x10000>;
xlnx,count-width = <0x20>;
xlnx,gen0-assert = <0x1>;
xlnx,gen1-assert = <0x1>;
xlnx,one-timer-only = <0x0>;
xlnx,trig0-assert = <0x1>;
xlnx,trig1-assert = <0x1>;
} ;
xps_uartlite_0: serial#84000000 {
clock-frequency = <50000000>;
compatible = "xlnx,xps-uartlite-1.02.a", "xlnx,xps-uartlite-1.00.a";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&xps_intc_0>;
interrupts = <0 0>;
port-number = <0>;
reg = <0x84000000 0x10000>;
xlnx,baudrate = <0x1c200>;
xlnx,data-bits = <0x8>;
xlnx,odd-parity = <0x1>;
xlnx,use-parity = <0x0>;
} ;
} ;
} ;
and config file
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_HOTPLUG is not set
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_OPT_LIB_ASM is not set
CONFIG_KERNEL_BASE_ADDR=0x85000000
CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
CONFIG_XILINX_MICROBLAZE0_USE_FPU=0
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_MMU=3
CONFIG_XILINX_MICROBLAZE0_USE_ICACHE=1
CONFIG_XILINX_MICROBLAZE0_USE_INTERRUPT=1
CONFIG_XILINX_MICROBLAZE0_USE_DCACHE=1
CONFIG_XILINX_MICROBLAZE0_USE_BRANCH_TARGET-CACHE=0
CONFIG_XILINX_MICROBLAZE0_USE_REORDER_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_STACK_PROTECTION=0
CONFIG_XILINX_MICROBLAZE0_USE_EXT_BRK=1
CONFIG_XILINX_MICROBLAZE0_USE_EXT_NM_BRK=1
CONFIG_XILINX_MICROBLAZE0_USE_EXTENDED_FSL_INSTR=0
CONFIG_XILINX_MICROBLAZE0_HW_VER="8.50.a"
CONFIG_HZ_100=y
CONFIG_MMU=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE_FORCE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
# CONFIG_NETDEVICES=y
# CONFIG_NET_ETHERNET=y
# CONFIG_XILINX_EMACLITE=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
# CONFIG_DNOTIFY is not set
# CONFIG_NFS_FS=y
# CONFIG_NFS_V3=y
CONFIG_CIFS=y
CONFIG_CIFS_STATS=y
CONFIG_CIFS_STATS2=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_SLAB=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_INFO=y
CONFIG_EARLY_PRINTK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
any help..
Thank for reading
In your device-tree flash memory overlaps with RAM (micron_ram section) - do you execute the linux kernel directly from flash? Check that the kernel supports XIP (Execute in place).
Also check linux kernel in-memory log buffer (__log_buf) - maybe you found additional output:
http://www.wiki.xilinx.com/Debugging+PowerPC+Kernel+Boot+Problems
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I want to make GPIO-driven reset on 2 PHY chips inside DUAL EMAC on TI AM3352. Because drivers don't have the ability, I have made a mod in mdio_bus.c driver, function mdiobus_register_gpiod(): if (gpiod == NULL && mdiodev->bus && mdiodev->bus->dev.of_node) { gpiod = fwnode_get_named_gpiod(&mdiodev->bus->dev.of_node->fwnode, "phy-reset-gpios", mdiodev->addr, GPIOD_OUT_LOW, "PHY reset"); if (gpiod) printk("found gpiod for addr=%d\n", mdiodev->addr); } mdiodev->reset = gpiod; this is my device tree with added feature: &cpsw_emac0 { status = "okay"; phy_id = <&davinci_mdio>, <0>; phy-mode = "mii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { status = "okay"; phy_id = <&davinci_mdio>, <1>; phy-mode = "mii"; dual_emac_res_vlan = <2>; }; &davinci_mdio { status = "okay"; phy-reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>, <&gpio1 1 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&mdio_pins_default>; }; &mac { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&phy1_pins_default>,<&phy2_pins_default>; dual_emac = <1>; }; However GPIO controller is initialized long after MDIO drivers, so the mdio-bus cannot find GPIO chips. Is it possible to initialize GPIO earlier? Where is this priority configured?
ET035009DH6 lcd display config
The display (ET035009DH6) stays dark with the following configuration. The backlight is on. Touch is working. ETM035009EDH6 Spec Toradex Colibri iMX6ULL 512MB V1.1A Toradex Colibri Evaluation Board Rev. 3.2 ET035009DH6 angstrom-lxde-image Device Tree lcdif#021c8000 { compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; reg = <0x021c8000 0x00004000>; interrupts = <0x00000000 0x00000005 0x00000004>; clocks = <0x00000001 0x000000a2 0x00000001 0x000000a1 0x00000001 0x00000000>; clock-names = "pix", "axi", "disp_axi"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x0000003f 0x00000040>; display = <0x00000041>; lcd-display { bits-per-pixel = <0x00000010>; bus-width = <0x00000012>; linux,phandle = <0x00000041>; phandle = <0x00000041>; display-timings { native-mode = <0x00000042>; 320x240 { phandle = <0x00000042>; linux,phandle = <0x00000042>; clock-frequency = <0x00632ea0>; hactive = <0x00000140>; vactive = <0x000000f0>; hback-porch = <0x00000044>; hsync-len = <0x00000058>; hfront-porch = <0x00000014>; vback-porch = <0x00000012>; vsync-len = <0x00000016>; vfront-porch = <0x00000004>; hsync-active = <0x00000000>; vsync-active = <0x00000000>; de-active = <0x00000001>; pixelclk-active = <0x00000000>; }; 640x480 { clock-frequency = <0x018023d8>; hactive = <0x00000280>; vactive = <0x000001e0>; hback-porch = <0x00000028>; hfront-porch = <0x00000018>; vback-porch = <0x00000020>; vfront-porch = <0x0000000b>; hsync-len = <0x00000060>; vsync-len = <0x00000002>; de-active = <0x00000001>; hsync-active = <0x00000000>; vsync-active = <0x00000000>; pixelclk-active = <0x00000000>; }; 800x480 { }; 800x480pixclkact { }; 800x600 { }; 1024x600 { }; 1024x768 { }; }; U-Boot setenv vidargs video=mxsfb:320x240M-18#60 When connecting a screen via VGA to the Eval Board (Toradex Colibri Evaluation Board Rev3.2) and leave the default LCD timings to 640x480 (phandle and linux,phandle in 640x480) the screen shows the LXDE desktop.
Amchart with two lines
i have an amchart with two lines: <script type="text/javascript"> var chart; var graph; var chartData2 = [ {"year":"2014-10-04 23:30:03", "v1":9.1, "v2":0}, {"year":"2014-10-04 23:45:02", "v1":8.8, "v2":86.2}, ... {"year":"2014-10-05 23:30:02", "v1":8.7, "v2":98.7}, {"year":"2014-10-05 23:45:02", "v1":8.5, "v2":98.7}, {"year":"2014-10-06 00:00:01", "v1":8.4, "v2":98.5}, {"year":"2014-10-06 00:15:02", "v1":8.5, "v2":98.3}, {"year":"2014-10-06 00:30:01", "v1":8.4, "v2":97.9} ]; AmCharts.ready(function () { // SERIAL CHART chart = new AmCharts.AmSerialChart(); chart.pathToImages = "../amcharts/images/"; chart.dataProvider = chartData2; chart.marginLeft = 10; chart.categoryField = "year"; chart.dataDateFormat = "JJ:NN:SS"; //chart.addListener("dataUpdated", zoomChart); // AXES // category var categoryAxis = chart.categoryAxis; categoryAxis.parseDates = true; categoryAxis.minPeriod = "100"; categoryAxis.dashLength = 3; categoryAxis.minorGridEnabled = true; categoryAxis.minorGridAlpha = 0.1; // value var valueAxis = new AmCharts.ValueAxis(); valueAxis.id = "ax1"; valueAxis.axisAlpha = 0; valueAxis.inside = true; valueAxis.dashLength = 3; valueAxis.position = "right"; chart.addValueAxis(valueAxis); var valueAxis2 = new AmCharts.ValueAxis(); valueAxis2.id = "ax2"; valueAxis2.axisAlpha = 0; valueAxis2.inside = true; valueAxis2.dashLength = 3; valueAxis2.baseValue = -20; valueAxis2.position = "left"; chart.addValueAxis(valueAxis2); // GRAPH graph = new AmCharts.AmGraph(); graph.valueaxis = "ax1"; graph.type = "smoothedLine"; graph.lineColor = "#d1655d"; graph.negativeLineColor = "#637bb6"; graph.bullet = "square"; graph.bulletSize = 8; graph.bulletBorderColor = "#FFFFFF"; graph.bulletBorderAlpha = 1; graph.bulletBorderThickness = 2; graph.lineThickness = 2; graph.valueField = "v1"; graph.title = "title v1"; graph.balloonText = "[[category]]<br><b><span style='font-size:14px;'>[[value]]</span></b>"; chart.addGraph(graph); graph2 = new AmCharts.AmGraph(); graph2.valueAxis = "ax2"; graph2.type = "smoothedLine"; graph2.lineColor = "#d1655d"; graph2.negativeLineColor = "#637bb6"; graph2.bullet = "round"; graph2.bulletSize = 8; graph2.bulletBorderColor = "#FFFFFF"; graph2.bulletBorderAlpha = 1; graph2.bulletBorderThickness = 2; graph2.lineThickness = 2; graph2.valueField = "v2"; graph2.title = "title v2"; graph2.balloonText = "[[category]]<br><b><span style='font-size:14px;'>[[value]]</span></b>"; chart.addGraph(graph2); // CURSOR var chartCursor = new AmCharts.ChartCursor(); chartCursor.cursorAlpha = 0; chartCursor.cursorPosition = "mouse"; chartCursor.categoryBalloonDateFormat = "JJ:NN:SS"; chart.addChartCursor(chartCursor); // SCROLLBAR var chartScrollbar = new AmCharts.ChartScrollbar(); chart.addChartScrollbar(chartScrollbar); chart.creditsPosition = "bottom-right"; // WRITE chart.write("chartdiv2"); }); I can see the x-and y-axis, but no lines with values. Can anyone please help me?
Two problems: dataDateFormat is incorrect, should be: chart.dataDateFormat = "YYYY-MM-DD JJ:NN:SS"; minPeriod is incorrect, should be: categoryAxis.minPeriod = "ss";